From: James Zhu <James.Zhu@amd.com>
To: amd-gfx@lists.freedesktop.org
Cc: jamesz@amd.com
Subject: [PATCH v4 3/6] drm/amdgpu/vcn: move macro from vcn2.0 to share amdgpu_vcn
Date: Wed, 15 Jan 2020 11:53:43 -0500 [thread overview]
Message-ID: <1579107224-2471-1-git-send-email-James.Zhu@amd.com> (raw)
In-Reply-To: <1579040596-12728-4-git-send-email-James.Zhu@amd.com>
Move macro from vcn2.0 to amdgpu_vcn to share with vcn2.5
Signed-off-by: James Zhu <James.Zhu@amd.com>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 5 +++++
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 5 -----
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
index 5ce13c0..c4984c5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h
@@ -57,6 +57,11 @@
#define VCN_VID_IP_ADDRESS_2_0 0x0
#define VCN_AON_IP_ADDRESS_2_0 0x30000
+#define mmUVD_RBC_XX_IB_REG_CHECK 0x026b
+#define mmUVD_RBC_XX_IB_REG_CHECK_BASE_IDX 1
+#define mmUVD_REG_XX_MASK 0x026c
+#define mmUVD_REG_XX_MASK_BASE_IDX 1
+
/* 1 second timeout */
#define VCN_IDLE_TIMEOUT msecs_to_jiffies(1000)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
index 9ff59ac..f4db8af6 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
@@ -47,11 +47,6 @@
#define mmUVD_LMI_RBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET 0x5a7
#define mmUVD_RBC_IB_SIZE_INTERNAL_OFFSET 0x1e2
-#define mmUVD_RBC_XX_IB_REG_CHECK 0x026b
-#define mmUVD_RBC_XX_IB_REG_CHECK_BASE_IDX 1
-#define mmUVD_REG_XX_MASK 0x026c
-#define mmUVD_REG_XX_MASK_BASE_IDX 1
-
static void vcn_v2_0_set_dec_ring_funcs(struct amdgpu_device *adev);
static void vcn_v2_0_set_enc_ring_funcs(struct amdgpu_device *adev);
static void vcn_v2_0_set_irq_funcs(struct amdgpu_device *adev);
--
2.7.4
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next prev parent reply other threads:[~2020-01-15 16:53 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-14 22:23 [PATCH v3 0/5] support Arcturus IFM workaround James Zhu
2020-01-14 22:23 ` [PATCH v3 1/5] drm/amdgpu/vcn: support multiple-instance dpg pause mode James Zhu
2020-01-14 22:23 ` [PATCH v3 2/5] drm/amdgpu/vcn2.5: support multiple instance direct SRAM read and write James Zhu
2020-01-15 13:09 ` Leo Liu
2020-01-15 16:51 ` [PATCH v4 2/6] drm/amdgpu/vcn: " James Zhu
2020-01-14 22:23 ` [PATCH v3 3/5] drm/amdgpu/vcn2.5: add DPG mode start and stop James Zhu
2020-01-15 13:19 ` Leo Liu
2020-01-15 16:53 ` James Zhu [this message]
2020-01-15 16:53 ` [PATCH v4 4/6] " James Zhu
2020-01-14 22:23 ` [PATCH v3 4/5] drm/amdgpu/vcn2.5: add dpg pause mode James Zhu
2020-01-14 22:23 ` [PATCH v3 5/5] drm/amdgpu/vcn2.5: implement indirect DPG SRAM mode James Zhu
2020-01-15 13:24 ` [PATCH v3 0/5] support Arcturus IFM workaround Leo Liu
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