From: Anoob Joseph <anoobj@marvell.com>
To: Akhil Goyal <akhil.goyal@nxp.com>,
Declan Doherty <declan.doherty@intel.com>,
Thomas Monjalon <thomas@monjalon.net>
Cc: Archana Muniganti <marchana@marvell.com>,
Jerin Jacob <jerinj@marvell.com>,
Narayana Prasad <pathreya@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>,
Nithin Dabilpuram <ndabilpuram@marvell.com>,
"Pavan Nikhilesh" <pbhagavatula@marvell.com>,
Ankur Dwivedi <adwivedi@marvell.com>,
Anoob Joseph <anoobj@marvell.com>,
Tejasree Kondoj <ktejasree@marvell.com>,
Vamsi Attunuru <vattunuru@marvell.com>,
Lukasz Bartosik <lbartosik@marvell.com>, <dev@dpdk.org>
Subject: [dpdk-dev] [PATCH v2 12/15] drivers/octeontx2: add sec in compiler optimized RX fastpath framework
Date: Sat, 18 Jan 2020 16:19:10 +0530 [thread overview]
Message-ID: <1579344553-11428-13-git-send-email-anoobj@marvell.com> (raw)
In-Reply-To: <1579344553-11428-1-git-send-email-anoobj@marvell.com>
From: Archana Muniganti <marchana@marvell.com>
Added new flag for SECURITY in RX compiler optimized fastpath
framework. With this, compiler autogenerates functions which
have security enabled.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
---
drivers/event/octeontx2/otx2_evdev.c | 134 ++++++++-----
drivers/event/octeontx2/otx2_evdev.h | 2 +-
drivers/event/octeontx2/otx2_worker.c | 2 +-
drivers/event/octeontx2/otx2_worker_dual.c | 2 +-
drivers/net/octeontx2/otx2_ethdev.c | 3 +
drivers/net/octeontx2/otx2_rx.c | 27 +--
drivers/net/octeontx2/otx2_rx.h | 306 ++++++++++++++++++++---------
7 files changed, 320 insertions(+), 156 deletions(-)
diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c
index 2daeba4..f6c641a 100644
--- a/drivers/event/octeontx2/otx2_evdev.c
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -44,61 +44,64 @@ sso_fastpath_fns_set(struct rte_eventdev *event_dev)
{
struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
/* Single WS modes */
- const event_dequeue_t ssogws_deq[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_ ##name,
+ const event_dequeue_t ssogws_deq[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_burst_t ssogws_deq_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_burst_ ##name,
+ const event_dequeue_burst_t ssogws_deq_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_t ssogws_deq_timeout[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_timeout_ ##name,
+ const event_dequeue_t ssogws_deq_timeout[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_timeout_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
const event_dequeue_burst_t
- ssogws_deq_timeout_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = \
+ ssogws_deq_timeout_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
otx2_ssogws_deq_timeout_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_t ssogws_deq_seg[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_seg_ ##name,
+ const event_dequeue_t ssogws_deq_seg[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_seg_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_burst_t ssogws_deq_seg_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_seg_burst_ ##name,
+ const event_dequeue_burst_t
+ ssogws_deq_seg_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_deq_seg_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_t ssogws_deq_seg_timeout[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_deq_seg_timeout_ ##name,
+ const event_dequeue_t ssogws_deq_seg_timeout[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_deq_seg_timeout_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
const event_dequeue_burst_t
- ssogws_deq_seg_timeout_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = \
+ ssogws_deq_seg_timeout_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
otx2_ssogws_deq_seg_timeout_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
@@ -106,64 +109,69 @@ SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
/* Dual WS modes */
- const event_dequeue_t ssogws_dual_deq[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_ ##name,
+ const event_dequeue_t ssogws_dual_deq[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_burst_t ssogws_dual_deq_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_burst_ ##name,
+ const event_dequeue_burst_t
+ ssogws_dual_deq_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_dual_deq_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_t ssogws_dual_deq_timeout[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_timeout_ ##name,
+ const event_dequeue_t ssogws_dual_deq_timeout[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_dual_deq_timeout_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
const event_dequeue_burst_t
- ssogws_dual_deq_timeout_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_timeout_burst_ ##name,
+ ssogws_dual_deq_timeout_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_dual_deq_timeout_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_t ssogws_dual_deq_seg[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_seg_ ##name,
+ const event_dequeue_t ssogws_dual_deq_seg[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_ssogws_dual_deq_seg_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
const event_dequeue_burst_t
- ssogws_dual_deq_seg_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = \
- otx2_ssogws_dual_deq_seg_burst_ ##name,
+ ssogws_dual_deq_seg_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_dual_deq_seg_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
- const event_dequeue_t ssogws_dual_deq_seg_timeout[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = \
- otx2_ssogws_dual_deq_seg_timeout_ ##name,
+ const event_dequeue_t
+ ssogws_dual_deq_seg_timeout[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_dual_deq_seg_timeout_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
const event_dequeue_burst_t
- ssogws_dual_deq_seg_timeout_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = \
- otx2_ssogws_dual_deq_seg_timeout_burst_ ##name,
+ ssogws_dual_deq_seg_timeout_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = \
+ otx2_ssogws_dual_deq_seg_timeout_burst_ ##name,
SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
#undef R
};
@@ -209,6 +217,7 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
event_dev->enqueue_forward_burst = otx2_ssogws_enq_fwd_burst;
if (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {
event_dev->dequeue = ssogws_deq_seg
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
@@ -216,6 +225,7 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst = ssogws_deq_seg_burst
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
@@ -224,6 +234,7 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
if (dev->is_timeout_deq) {
event_dev->dequeue = ssogws_deq_seg_timeout
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
@@ -232,6 +243,7 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst =
ssogws_deq_seg_timeout_burst
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
@@ -241,6 +253,7 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
}
} else {
event_dev->dequeue = ssogws_deq
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
@@ -248,6 +261,7 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst = ssogws_deq_burst
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
@@ -256,6 +270,7 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
if (dev->is_timeout_deq) {
event_dev->dequeue = ssogws_deq_timeout
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
@@ -264,6 +279,7 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst =
ssogws_deq_timeout_burst
+ [!!(dev->rx_offloads & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
@@ -303,6 +319,8 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
if (dev->rx_offloads & NIX_RX_MULTI_SEG_F) {
event_dev->dequeue = ssogws_dual_deq_seg
[!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
+ [!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_MARK_UPDATE_F)]
@@ -313,6 +331,8 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_PTYPE_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst = ssogws_dual_deq_seg_burst
+ [!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_MARK_UPDATE_F)]
@@ -326,6 +346,8 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
event_dev->dequeue =
ssogws_dual_deq_seg_timeout
[!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
+ [!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_MARK_UPDATE_F)]
@@ -340,6 +362,8 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
event_dev->dequeue_burst =
ssogws_dual_deq_seg_timeout_burst
[!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
+ [!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_MARK_UPDATE_F)]
@@ -355,6 +379,8 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
} else {
event_dev->dequeue = ssogws_dual_deq
[!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
+ [!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_MARK_UPDATE_F)]
@@ -366,6 +392,8 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
[!!(dev->rx_offloads & NIX_RX_OFFLOAD_RSS_F)];
event_dev->dequeue_burst = ssogws_dual_deq_burst
[!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
+ [!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_MARK_UPDATE_F)]
@@ -379,6 +407,8 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
event_dev->dequeue =
ssogws_dual_deq_timeout
[!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
+ [!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_MARK_UPDATE_F)]
@@ -393,6 +423,8 @@ SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
event_dev->dequeue_burst =
ssogws_dual_deq_timeout_burst
[!!(dev->rx_offloads &
+ NIX_RX_OFFLOAD_SECURITY_F)]
+ [!!(dev->rx_offloads &
NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offloads &
NIX_RX_OFFLOAD_MARK_UPDATE_F)]
diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h
index ef523dc..5a44fd3 100644
--- a/drivers/event/octeontx2/otx2_evdev.h
+++ b/drivers/event/octeontx2/otx2_evdev.h
@@ -278,7 +278,7 @@ uint16_t otx2_ssogws_dual_enq_fwd_burst(void *port, const struct rte_event ev[],
uint16_t nb_events);
/* Auto generated API's */
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
uint16_t otx2_ssogws_deq_ ##name(void *port, struct rte_event *ev, \
uint64_t timeout_ticks); \
uint16_t otx2_ssogws_deq_burst_ ##name(void *port, struct rte_event ev[], \
diff --git a/drivers/event/octeontx2/otx2_worker.c b/drivers/event/octeontx2/otx2_worker.c
index 34d39f4..12445d9 100644
--- a/drivers/event/octeontx2/otx2_worker.c
+++ b/drivers/event/octeontx2/otx2_worker.c
@@ -81,7 +81,7 @@ otx2_ssogws_release_event(struct otx2_ssogws *ws)
otx2_ssogws_swtag_flush(ws);
}
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
uint16_t __hot \
otx2_ssogws_deq_ ##name(void *port, struct rte_event *ev, \
uint64_t timeout_ticks) \
diff --git a/drivers/event/octeontx2/otx2_worker_dual.c b/drivers/event/octeontx2/otx2_worker_dual.c
index 7016eee..22a4889 100644
--- a/drivers/event/octeontx2/otx2_worker_dual.c
+++ b/drivers/event/octeontx2/otx2_worker_dual.c
@@ -140,7 +140,7 @@ otx2_ssogws_dual_enq_fwd_burst(void *port, const struct rte_event ev[],
return 1;
}
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
uint16_t __hot \
otx2_ssogws_dual_deq_ ##name(void *port, struct rte_event *ev, \
uint64_t timeout_ticks) \
diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
index 131e883..c215078 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -626,6 +626,9 @@ nix_rx_offload_flags(struct rte_eth_dev *eth_dev)
if ((dev->rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP))
flags |= NIX_RX_OFFLOAD_TSTAMP_F;
+ if (dev->rx_offloads & DEV_RX_OFFLOAD_SECURITY)
+ flags |= NIX_RX_OFFLOAD_SECURITY_F;
+
if (!dev->ptype_disable)
flags |= NIX_RX_OFFLOAD_PTYPE_F;
diff --git a/drivers/net/octeontx2/otx2_rx.c b/drivers/net/octeontx2/otx2_rx.c
index 48565db..ffe6996 100644
--- a/drivers/net/octeontx2/otx2_rx.c
+++ b/drivers/net/octeontx2/otx2_rx.c
@@ -320,7 +320,7 @@ nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts,
#endif
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
static uint16_t __rte_noinline __hot \
otx2_nix_recv_pkts_ ## name(void *rx_queue, \
struct rte_mbuf **rx_pkts, uint16_t pkts) \
@@ -351,12 +351,13 @@ NIX_RX_FASTPATH_MODES
static inline void
pick_rx_func(struct rte_eth_dev *eth_dev,
- const eth_rx_burst_t rx_burst[2][2][2][2][2][2])
+ const eth_rx_burst_t rx_burst[2][2][2][2][2][2][2])
{
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
- /* [TSTMP] [MARK] [VLAN] [CKSUM] [PTYPE] [RSS] */
+ /* [SEC] [TSTMP] [MARK] [VLAN] [CKSUM] [PTYPE] [RSS] */
eth_dev->rx_pkt_burst = rx_burst
+ [!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_SECURITY_F)]
[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_TSTAMP_F)]
[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_MARK_UPDATE_F)]
[!!(dev->rx_offload_flags & NIX_RX_OFFLOAD_VLAN_STRIP_F)]
@@ -370,25 +371,25 @@ otx2_eth_set_rx_function(struct rte_eth_dev *eth_dev)
{
struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
- const eth_rx_burst_t nix_eth_rx_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_nix_recv_pkts_ ## name,
+ const eth_rx_burst_t nix_eth_rx_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_nix_recv_pkts_ ## name,
NIX_RX_FASTPATH_MODES
#undef R
};
- const eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_nix_recv_pkts_mseg_ ## name,
+ const eth_rx_burst_t nix_eth_rx_burst_mseg[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_nix_recv_pkts_mseg_ ## name,
NIX_RX_FASTPATH_MODES
#undef R
};
- const eth_rx_burst_t nix_eth_rx_vec_burst[2][2][2][2][2][2] = {
-#define R(name, f5, f4, f3, f2, f1, f0, flags) \
- [f5][f4][f3][f2][f1][f0] = otx2_nix_recv_pkts_vec_ ## name,
+ const eth_rx_burst_t nix_eth_rx_vec_burst[2][2][2][2][2][2][2] = {
+#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
+ [f6][f5][f4][f3][f2][f1][f0] = otx2_nix_recv_pkts_vec_ ## name,
NIX_RX_FASTPATH_MODES
#undef R
@@ -408,6 +409,6 @@ NIX_RX_FASTPATH_MODES
/* Copy multi seg version with no offload for tear down sequence */
if (rte_eal_process_type() == RTE_PROC_PRIMARY)
dev->rx_pkt_burst_no_offload =
- nix_eth_rx_burst_mseg[0][0][0][0][0][0];
+ nix_eth_rx_burst_mseg[0][0][0][0][0][0][0];
rte_mb();
}
diff --git a/drivers/net/octeontx2/otx2_rx.h b/drivers/net/octeontx2/otx2_rx.h
index e1715bd..2262777 100644
--- a/drivers/net/octeontx2/otx2_rx.h
+++ b/drivers/net/octeontx2/otx2_rx.h
@@ -29,6 +29,7 @@
#define NIX_RX_OFFLOAD_VLAN_STRIP_F BIT(3)
#define NIX_RX_OFFLOAD_MARK_UPDATE_F BIT(4)
#define NIX_RX_OFFLOAD_TSTAMP_F BIT(5)
+#define NIX_RX_OFFLOAD_SECURITY_F BIT(6)
/* Flags to control cqe_to_mbuf conversion function.
* Defining it from backwards to denote its been
@@ -297,7 +298,8 @@ otx2_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
if (flag & NIX_RX_OFFLOAD_MARK_UPDATE_F)
ol_flags = nix_update_match_id(rx->match_id, ol_flags, mbuf);
- if (cq->cqe_type == NIX_XQE_TYPE_RX_IPSECH) {
+ if ((flag & NIX_RX_OFFLOAD_SECURITY_F) &&
+ cq->cqe_type == NIX_XQE_TYPE_RX_IPSECH) {
*(uint64_t *)(&mbuf->rearm_data) = val;
ol_flags |= nix_rx_sec_mbuf_update(cq, mbuf, lookup_mem);
mbuf->ol_flags = ol_flags;
@@ -320,94 +322,220 @@ otx2_nix_cqe_to_mbuf(const struct nix_cqe_hdr_s *cq, const uint32_t tag,
#define RX_VLAN_F NIX_RX_OFFLOAD_VLAN_STRIP_F
#define MARK_F NIX_RX_OFFLOAD_MARK_UPDATE_F
#define TS_F NIX_RX_OFFLOAD_TSTAMP_F
+#define RX_SEC_F NIX_RX_OFFLOAD_SECURITY_F
-/* [TSMP] [MARK] [VLAN] [CKSUM] [PTYPE] [RSS] */
+/* [SEC] [TSMP] [MARK] [VLAN] [CKSUM] [PTYPE] [RSS] */
#define NIX_RX_FASTPATH_MODES \
-R(no_offload, 0, 0, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE) \
-R(rss, 0, 0, 0, 0, 0, 1, RSS_F) \
-R(ptype, 0, 0, 0, 0, 1, 0, PTYPE_F) \
-R(ptype_rss, 0, 0, 0, 0, 1, 1, PTYPE_F | RSS_F) \
-R(cksum, 0, 0, 0, 1, 0, 0, CKSUM_F) \
-R(cksum_rss, 0, 0, 0, 1, 0, 1, CKSUM_F | RSS_F) \
-R(cksum_ptype, 0, 0, 0, 1, 1, 0, CKSUM_F | PTYPE_F) \
-R(cksum_ptype_rss, 0, 0, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F)\
-R(vlan, 0, 0, 1, 0, 0, 0, RX_VLAN_F) \
-R(vlan_rss, 0, 0, 1, 0, 0, 1, RX_VLAN_F | RSS_F) \
-R(vlan_ptype, 0, 0, 1, 0, 1, 0, RX_VLAN_F | PTYPE_F) \
-R(vlan_ptype_rss, 0, 0, 1, 0, 1, 1, RX_VLAN_F | PTYPE_F | RSS_F)\
-R(vlan_cksum, 0, 0, 1, 1, 0, 0, RX_VLAN_F | CKSUM_F) \
-R(vlan_cksum_rss, 0, 0, 1, 1, 0, 1, RX_VLAN_F | CKSUM_F | RSS_F)\
-R(vlan_cksum_ptype, 0, 0, 1, 1, 1, 0, \
- RX_VLAN_F | CKSUM_F | PTYPE_F) \
-R(vlan_cksum_ptype_rss, 0, 0, 1, 1, 1, 1, \
- RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
-R(mark, 0, 1, 0, 0, 0, 0, MARK_F) \
-R(mark_rss, 0, 1, 0, 0, 0, 1, MARK_F | RSS_F) \
-R(mark_ptype, 0, 1, 0, 0, 1, 0, MARK_F | PTYPE_F) \
-R(mark_ptype_rss, 0, 1, 0, 0, 1, 1, MARK_F | PTYPE_F | RSS_F)\
-R(mark_cksum, 0, 1, 0, 1, 0, 0, MARK_F | CKSUM_F) \
-R(mark_cksum_rss, 0, 1, 0, 1, 0, 1, MARK_F | CKSUM_F | RSS_F)\
-R(mark_cksum_ptype, 0, 1, 0, 1, 1, 0, MARK_F | CKSUM_F | PTYPE_F)\
-R(mark_cksum_ptype_rss, 0, 1, 0, 1, 1, 1, \
- MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
-R(mark_vlan, 0, 1, 1, 0, 0, 0, MARK_F | RX_VLAN_F) \
-R(mark_vlan_rss, 0, 1, 1, 0, 0, 1, MARK_F | RX_VLAN_F | RSS_F)\
-R(mark_vlan_ptype, 0, 1, 1, 0, 1, 0, \
- MARK_F | RX_VLAN_F | PTYPE_F) \
-R(mark_vlan_ptype_rss, 0, 1, 1, 0, 1, 1, \
- MARK_F | RX_VLAN_F | PTYPE_F | RSS_F) \
-R(mark_vlan_cksum, 0, 1, 1, 1, 0, 0, \
- MARK_F | RX_VLAN_F | CKSUM_F) \
-R(mark_vlan_cksum_rss, 0, 1, 1, 1, 0, 1, \
- MARK_F | RX_VLAN_F | CKSUM_F | RSS_F) \
-R(mark_vlan_cksum_ptype, 0, 1, 1, 1, 1, 0, \
- MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
-R(mark_vlan_cksum_ptype_rss, 0, 1, 1, 1, 1, 1, \
- MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
-R(ts, 1, 0, 0, 0, 0, 0, TS_F) \
-R(ts_rss, 1, 0, 0, 0, 0, 1, TS_F | RSS_F) \
-R(ts_ptype, 1, 0, 0, 0, 1, 0, TS_F | PTYPE_F) \
-R(ts_ptype_rss, 1, 0, 0, 0, 1, 1, TS_F | PTYPE_F | RSS_F)\
-R(ts_cksum, 1, 0, 0, 1, 0, 0, TS_F | CKSUM_F) \
-R(ts_cksum_rss, 1, 0, 0, 1, 0, 1, TS_F | CKSUM_F | RSS_F)\
-R(ts_cksum_ptype, 1, 0, 0, 1, 1, 0, TS_F | CKSUM_F | PTYPE_F)\
-R(ts_cksum_ptype_rss, 1, 0, 0, 1, 1, 1, \
- TS_F | CKSUM_F | PTYPE_F | RSS_F) \
-R(ts_vlan, 1, 0, 1, 0, 0, 0, TS_F | RX_VLAN_F) \
-R(ts_vlan_rss, 1, 0, 1, 0, 0, 1, TS_F | RX_VLAN_F | RSS_F)\
-R(ts_vlan_ptype, 1, 0, 1, 0, 1, 0, TS_F | RX_VLAN_F | PTYPE_F)\
-R(ts_vlan_ptype_rss, 1, 0, 1, 0, 1, 1, \
- TS_F | RX_VLAN_F | PTYPE_F | RSS_F) \
-R(ts_vlan_cksum, 1, 0, 1, 1, 0, 0, \
- TS_F | RX_VLAN_F | CKSUM_F) \
-R(ts_vlan_cksum_rss, 1, 0, 1, 1, 0, 1, \
- MARK_F | RX_VLAN_F | CKSUM_F | RSS_F) \
-R(ts_vlan_cksum_ptype, 1, 0, 1, 1, 1, 0, \
- TS_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
-R(ts_vlan_cksum_ptype_rss, 1, 0, 1, 1, 1, 1, \
- TS_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
-R(ts_mark, 1, 1, 0, 0, 0, 0, TS_F | MARK_F) \
-R(ts_mark_rss, 1, 1, 0, 0, 0, 1, TS_F | MARK_F | RSS_F)\
-R(ts_mark_ptype, 1, 1, 0, 0, 1, 0, TS_F | MARK_F | PTYPE_F)\
-R(ts_mark_ptype_rss, 1, 1, 0, 0, 1, 1, \
- TS_F | MARK_F | PTYPE_F | RSS_F) \
-R(ts_mark_cksum, 1, 1, 0, 1, 0, 0, TS_F | MARK_F | CKSUM_F)\
-R(ts_mark_cksum_rss, 1, 1, 0, 1, 0, 1, \
- TS_F | MARK_F | CKSUM_F | RSS_F)\
-R(ts_mark_cksum_ptype, 1, 1, 0, 1, 1, 0, \
- TS_F | MARK_F | CKSUM_F | PTYPE_F) \
-R(ts_mark_cksum_ptype_rss, 1, 1, 0, 1, 1, 1, \
- TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
-R(ts_mark_vlan, 1, 1, 1, 0, 0, 0, TS_F | MARK_F | RX_VLAN_F)\
-R(ts_mark_vlan_rss, 1, 1, 1, 0, 0, 1, \
- TS_F | MARK_F | RX_VLAN_F | RSS_F)\
-R(ts_mark_vlan_ptype, 1, 1, 1, 0, 1, 0, \
- TS_F | MARK_F | RX_VLAN_F | PTYPE_F) \
-R(ts_mark_vlan_ptype_rss, 1, 1, 1, 0, 1, 1, \
- TS_F | MARK_F | RX_VLAN_F | PTYPE_F | RSS_F) \
-R(ts_mark_vlan_cksum_ptype, 1, 1, 1, 1, 1, 0, \
- TS_F | MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
-R(ts_mark_vlan_cksum_ptype_rss, 1, 1, 1, 1, 1, 1, \
- TS_F | MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F)
-
+R(no_offload, 0, 0, 0, 0, 0, 0, 0, NIX_RX_OFFLOAD_NONE) \
+R(rss, 0, 0, 0, 0, 0, 0, 1, RSS_F) \
+R(ptype, 0, 0, 0, 0, 0, 1, 0, PTYPE_F) \
+R(ptype_rss, 0, 0, 0, 0, 0, 1, 1, PTYPE_F | RSS_F) \
+R(cksum, 0, 0, 0, 0, 1, 0, 0, CKSUM_F) \
+R(cksum_rss, 0, 0, 0, 0, 1, 0, 1, CKSUM_F | RSS_F) \
+R(cksum_ptype, 0, 0, 0, 0, 1, 1, 0, CKSUM_F | PTYPE_F) \
+R(cksum_ptype_rss, 0, 0, 0, 0, 1, 1, 1, CKSUM_F | PTYPE_F | RSS_F)\
+R(vlan, 0, 0, 0, 1, 0, 0, 0, RX_VLAN_F) \
+R(vlan_rss, 0, 0, 0, 1, 0, 0, 1, RX_VLAN_F | RSS_F) \
+R(vlan_ptype, 0, 0, 0, 1, 0, 1, 0, RX_VLAN_F | PTYPE_F) \
+R(vlan_ptype_rss, 0, 0, 0, 1, 0, 1, 1, \
+ RX_VLAN_F | PTYPE_F | RSS_F) \
+R(vlan_cksum, 0, 0, 0, 1, 1, 0, 0, RX_VLAN_F | CKSUM_F) \
+R(vlan_cksum_rss, 0, 0, 0, 1, 1, 0, 1, \
+ RX_VLAN_F | CKSUM_F | RSS_F) \
+R(vlan_cksum_ptype, 0, 0, 0, 1, 1, 1, 0, \
+ RX_VLAN_F | CKSUM_F | PTYPE_F) \
+R(vlan_cksum_ptype_rss, 0, 0, 0, 1, 1, 1, 1, \
+ RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
+R(mark, 0, 0, 1, 0, 0, 0, 0, MARK_F) \
+R(mark_rss, 0, 0, 1, 0, 0, 0, 1, MARK_F | RSS_F) \
+R(mark_ptype, 0, 0, 1, 0, 0, 1, 0, MARK_F | PTYPE_F) \
+R(mark_ptype_rss, 0, 0, 1, 0, 0, 1, 1, MARK_F | PTYPE_F | RSS_F) \
+R(mark_cksum, 0, 0, 1, 0, 1, 0, 0, MARK_F | CKSUM_F) \
+R(mark_cksum_rss, 0, 0, 1, 0, 1, 0, 1, MARK_F | CKSUM_F | RSS_F) \
+R(mark_cksum_ptype, 0, 0, 1, 0, 1, 1, 0, \
+ MARK_F | CKSUM_F | PTYPE_F) \
+R(mark_cksum_ptype_rss, 0, 0, 1, 0, 1, 1, 1, \
+ MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
+R(mark_vlan, 0, 0, 1, 1, 0, 0, 0, MARK_F | RX_VLAN_F) \
+R(mark_vlan_rss, 0, 0, 1, 1, 0, 0, 1, \
+ MARK_F | RX_VLAN_F | RSS_F) \
+R(mark_vlan_ptype, 0, 0, 1, 1, 0, 1, 0, \
+ MARK_F | RX_VLAN_F | PTYPE_F) \
+R(mark_vlan_ptype_rss, 0, 0, 1, 1, 0, 1, 1, \
+ MARK_F | RX_VLAN_F | PTYPE_F | RSS_F) \
+R(mark_vlan_cksum, 0, 0, 1, 1, 1, 0, 0, \
+ MARK_F | RX_VLAN_F | CKSUM_F) \
+R(mark_vlan_cksum_rss, 0, 0, 1, 1, 1, 0, 1, \
+ MARK_F | RX_VLAN_F | CKSUM_F | RSS_F) \
+R(mark_vlan_cksum_ptype, 0, 0, 1, 1, 1, 1, 0, \
+ MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
+R(mark_vlan_cksum_ptype_rss, 0, 0, 1, 1, 1, 1, 1, \
+ MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
+R(ts, 0, 1, 0, 0, 0, 0, 0, TS_F) \
+R(ts_rss, 0, 1, 0, 0, 0, 0, 1, TS_F | RSS_F) \
+R(ts_ptype, 0, 1, 0, 0, 0, 1, 0, TS_F | PTYPE_F) \
+R(ts_ptype_rss, 0, 1, 0, 0, 0, 1, 1, TS_F | PTYPE_F | RSS_F) \
+R(ts_cksum, 0, 1, 0, 0, 1, 0, 0, TS_F | CKSUM_F) \
+R(ts_cksum_rss, 0, 1, 0, 0, 1, 0, 1, TS_F | CKSUM_F | RSS_F) \
+R(ts_cksum_ptype, 0, 1, 0, 0, 1, 1, 0, TS_F | CKSUM_F | PTYPE_F) \
+R(ts_cksum_ptype_rss, 0, 1, 0, 0, 1, 1, 1, \
+ TS_F | CKSUM_F | PTYPE_F | RSS_F) \
+R(ts_vlan, 0, 1, 0, 1, 0, 0, 0, TS_F | RX_VLAN_F) \
+R(ts_vlan_rss, 0, 1, 0, 1, 0, 0, 1, TS_F | RX_VLAN_F | RSS_F) \
+R(ts_vlan_ptype, 0, 1, 0, 1, 0, 1, 0, \
+ TS_F | RX_VLAN_F | PTYPE_F) \
+R(ts_vlan_ptype_rss, 0, 1, 0, 1, 0, 1, 1, \
+ TS_F | RX_VLAN_F | PTYPE_F | RSS_F) \
+R(ts_vlan_cksum, 0, 1, 0, 1, 1, 0, 0, \
+ TS_F | RX_VLAN_F | CKSUM_F) \
+R(ts_vlan_cksum_rss, 0, 1, 0, 1, 1, 0, 1, \
+ MARK_F | RX_VLAN_F | CKSUM_F | RSS_F) \
+R(ts_vlan_cksum_ptype, 0, 1, 0, 1, 1, 1, 0, \
+ TS_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
+R(ts_vlan_cksum_ptype_rss, 0, 1, 0, 1, 1, 1, 1, \
+ TS_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
+R(ts_mark, 0, 1, 1, 0, 0, 0, 0, TS_F | MARK_F) \
+R(ts_mark_rss, 0, 1, 1, 0, 0, 0, 1, TS_F | MARK_F | RSS_F) \
+R(ts_mark_ptype, 0, 1, 1, 0, 0, 1, 0, TS_F | MARK_F | PTYPE_F) \
+R(ts_mark_ptype_rss, 0, 1, 1, 0, 0, 1, 1, \
+ TS_F | MARK_F | PTYPE_F | RSS_F) \
+R(ts_mark_cksum, 0, 1, 1, 0, 1, 0, 0, TS_F | MARK_F | CKSUM_F) \
+R(ts_mark_cksum_rss, 0, 1, 1, 0, 1, 0, 1, \
+ TS_F | MARK_F | CKSUM_F | RSS_F) \
+R(ts_mark_cksum_ptype, 0, 1, 1, 0, 1, 1, 0, \
+ TS_F | MARK_F | CKSUM_F | PTYPE_F) \
+R(ts_mark_cksum_ptype_rss, 0, 1, 1, 0, 1, 1, 1, \
+ TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
+R(ts_mark_vlan, 0, 1, 1, 1, 0, 0, 0, TS_F | MARK_F | RX_VLAN_F)\
+R(ts_mark_vlan_rss, 0, 1, 1, 1, 0, 0, 1, \
+ TS_F | MARK_F | RX_VLAN_F | RSS_F) \
+R(ts_mark_vlan_ptype, 0, 1, 1, 1, 0, 1, 0, \
+ TS_F | MARK_F | RX_VLAN_F | PTYPE_F) \
+R(ts_mark_vlan_ptype_rss, 0, 1, 1, 1, 0, 1, 1, \
+ TS_F | MARK_F | RX_VLAN_F | PTYPE_F | RSS_F) \
+R(ts_mark_vlan_cksum_ptype, 0, 1, 1, 1, 1, 1, 0, \
+ TS_F | MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
+R(ts_mark_vlan_cksum_ptype_rss, 0, 1, 1, 1, 1, 1, 1, \
+ TS_F | MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
+R(sec, 1, 0, 0, 0, 0, 0, 0, RX_SEC_F) \
+R(sec_rss, 1, 0, 0, 0, 0, 0, 1, RX_SEC_F | RSS_F) \
+R(sec_ptype, 1, 0, 0, 0, 0, 1, 0, RX_SEC_F | PTYPE_F) \
+R(sec_ptype_rss, 1, 0, 0, 0, 0, 1, 1, \
+ RX_SEC_F | PTYPE_F | RSS_F) \
+R(sec_cksum, 1, 0, 0, 0, 1, 0, 0, RX_SEC_F | CKSUM_F) \
+R(sec_cksum_rss, 1, 0, 0, 0, 1, 0, 1, \
+ RX_SEC_F | CKSUM_F | RSS_F) \
+R(sec_cksum_ptype, 1, 0, 0, 0, 1, 1, 0, \
+ RX_SEC_F | CKSUM_F | PTYPE_F) \
+R(sec_cksum_ptype_rss, 1, 0, 0, 0, 1, 1, 1, \
+ RX_SEC_F | CKSUM_F | PTYPE_F | RSS_F) \
+R(sec_vlan, 1, 0, 0, 1, 0, 0, 0, RX_SEC_F | RX_VLAN_F) \
+R(sec_vlan_rss, 1, 0, 0, 1, 0, 0, 1, \
+ RX_SEC_F | RX_VLAN_F | RSS_F) \
+R(sec_vlan_ptype, 1, 0, 0, 1, 0, 1, 0, \
+ RX_SEC_F | RX_VLAN_F | PTYPE_F) \
+R(sec_vlan_ptype_rss, 1, 0, 0, 1, 0, 1, 1, \
+ RX_SEC_F | RX_VLAN_F | PTYPE_F | RSS_F) \
+R(sec_vlan_cksum, 1, 0, 0, 1, 1, 0, 0, \
+ RX_SEC_F | RX_VLAN_F | CKSUM_F) \
+R(sec_vlan_cksum_rss, 1, 0, 0, 1, 1, 0, 1, \
+ RX_SEC_F | RX_VLAN_F | CKSUM_F | RSS_F) \
+R(sec_vlan_cksum_ptype, 1, 0, 0, 1, 1, 1, 0, \
+ RX_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
+R(sec_vlan_cksum_ptype_rss, 1, 0, 0, 1, 1, 1, 1, \
+ RX_SEC_F | RX_VLAN_F | CKSUM_F | PTYPE_F | RSS_F) \
+R(sec_mark, 1, 0, 1, 0, 0, 0, 0, RX_SEC_F | MARK_F) \
+R(sec_mark_rss, 1, 0, 1, 0, 0, 0, 1, RX_SEC_F | MARK_F | RSS_F)\
+R(sec_mark_ptype, 1, 0, 1, 0, 0, 1, 0, \
+ RX_SEC_F | MARK_F | PTYPE_F) \
+R(sec_mark_ptype_rss, 1, 0, 1, 0, 0, 1, 1, \
+ RX_SEC_F | MARK_F | PTYPE_F | RSS_F) \
+R(sec_mark_cksum, 1, 0, 1, 0, 1, 0, 0, \
+ RX_SEC_F | MARK_F | CKSUM_F) \
+R(sec_mark_cksum_rss, 1, 0, 1, 0, 1, 0, 1, \
+ RX_SEC_F | MARK_F | CKSUM_F | RSS_F) \
+R(sec_mark_cksum_ptype, 1, 0, 1, 0, 1, 1, 0, \
+ RX_SEC_F | MARK_F | CKSUM_F | PTYPE_F) \
+R(sec_mark_cksum_ptype_rss, 1, 0, 1, 0, 1, 1, 1, \
+ RX_SEC_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
+R(sec_mark_vlan, 1, 0, 1, 1, 0, 0, 0, RX_SEC_F | RX_VLAN_F) \
+R(sec_mark_vlan_rss, 1, 0, 1, 1, 0, 0, 1, \
+ RX_SEC_F | MARK_F | RX_VLAN_F | RSS_F) \
+R(sec_mark_vlan_ptype, 1, 0, 1, 1, 0, 1, 0, \
+ RX_SEC_F | MARK_F | RX_VLAN_F | PTYPE_F) \
+R(sec_mark_vlan_ptype_rss, 1, 0, 1, 1, 0, 1, 1, \
+ RX_SEC_F | MARK_F | RX_VLAN_F | PTYPE_F | RSS_F) \
+R(sec_mark_vlan_cksum, 1, 0, 1, 1, 1, 0, 0, \
+ RX_SEC_F | MARK_F | RX_VLAN_F | CKSUM_F) \
+R(sec_mark_vlan_cksum_rss, 1, 0, 1, 1, 1, 0, 1, \
+ RX_SEC_F | MARK_F | RX_VLAN_F | CKSUM_F | RSS_F) \
+R(sec_mark_vlan_cksum_ptype, 1, 0, 1, 1, 1, 1, 0, \
+ RX_SEC_F | MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
+R(sec_mark_vlan_cksum_ptype_rss, \
+ 1, 0, 1, 1, 1, 1, 1, \
+ RX_SEC_F | MARK_F | RX_VLAN_F | CKSUM_F | PTYPE_F | \
+ RSS_F) \
+R(sec_ts, 1, 1, 0, 0, 0, 0, 0, RX_SEC_F | TS_F) \
+R(sec_ts_rss, 1, 1, 0, 0, 0, 0, 1, RX_SEC_F | TS_F | RSS_F) \
+R(sec_ts_ptype, 1, 1, 0, 0, 0, 1, 0, RX_SEC_F | TS_F | PTYPE_F)\
+R(sec_ts_ptype_rss, 1, 1, 0, 0, 0, 1, 1, \
+ RX_SEC_F | TS_F | PTYPE_F | RSS_F) \
+R(sec_ts_cksum, 1, 1, 0, 0, 1, 0, 0, RX_SEC_F | TS_F | CKSUM_F)\
+R(sec_ts_cksum_rss, 1, 1, 0, 0, 1, 0, 1, \
+ RX_SEC_F | TS_F | CKSUM_F | RSS_F) \
+R(sec_ts_cksum_ptype, 1, 1, 0, 0, 1, 1, 0, \
+ RX_SEC_F | CKSUM_F | PTYPE_F) \
+R(sec_ts_cksum_ptype_rss, 1, 1, 0, 0, 1, 1, 1, \
+ RX_SEC_F | TS_F | CKSUM_F | PTYPE_F | RSS_F) \
+R(sec_ts_vlan, 1, 1, 0, 1, 0, 0, 0, \
+ RX_SEC_F | TS_F | RX_VLAN_F) \
+R(sec_ts_vlan_rss, 1, 1, 0, 1, 0, 0, 1, \
+ RX_SEC_F | TS_F | RX_VLAN_F | RSS_F) \
+R(sec_ts_vlan_ptype, 1, 1, 0, 1, 0, 1, 0, \
+ RX_SEC_F | TS_F | RX_VLAN_F | PTYPE_F) \
+R(sec_ts_vlan_ptype_rss, 1, 1, 0, 1, 0, 1, 1, \
+ RX_SEC_F | TS_F | RX_VLAN_F | PTYPE_F | RSS_F) \
+R(sec_ts_vlan_cksum, 1, 1, 0, 1, 1, 0, 0, \
+ RX_SEC_F | TS_F | RX_VLAN_F | CKSUM_F) \
+R(sec_ts_vlan_cksum_rss, 1, 1, 0, 1, 1, 0, 1, \
+ RX_SEC_F | TS_F | RX_VLAN_F | CKSUM_F | RSS_F) \
+R(sec_ts_vlan_cksum_ptype, 1, 1, 0, 1, 1, 1, 0, \
+ RX_SEC_F | TS_F | RX_VLAN_F | CKSUM_F | PTYPE_F) \
+R(sec_ts_vlan_cksum_ptype_rss, 1, 1, 0, 1, 1, 1, 1, \
+ RX_SEC_F | TS_F | RX_VLAN_F | CKSUM_F | PTYPE_F | \
+ RSS_F) \
+R(sec_ts_mark, 1, 1, 1, 0, 0, 0, 0, RX_SEC_F | TS_F | MARK_F) \
+R(sec_ts_mark_rss, 1, 1, 1, 0, 0, 0, 1, \
+ RX_SEC_F | TS_F | MARK_F | RSS_F) \
+R(sec_ts_mark_ptype, 1, 1, 1, 0, 0, 1, 0, \
+ RX_SEC_F | TS_F | MARK_F | PTYPE_F) \
+R(sec_ts_mark_ptype_rss, 1, 1, 1, 0, 0, 1, 1, \
+ RX_SEC_F | TS_F | MARK_F | PTYPE_F | RSS_F) \
+R(sec_ts_mark_cksum, 1, 1, 1, 0, 1, 0, 0, \
+ RX_SEC_F | TS_F | MARK_F | CKSUM_F) \
+R(sec_ts_mark_cksum_rss, 1, 1, 1, 0, 1, 0, 1, \
+ RX_SEC_F | TS_F | MARK_F | CKSUM_F | RSS_F) \
+R(sec_ts_mark_cksum_ptype, 1, 1, 1, 0, 1, 1, 0, \
+ RX_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F) \
+R(sec_ts_mark_cksum_ptype_rss, 1, 1, 1, 0, 1, 1, 1, \
+ RX_SEC_F | TS_F | MARK_F | CKSUM_F | PTYPE_F | RSS_F) \
+R(sec_ts_mark_vlan, 1, 1, 1, 1, 0, 0, 0, \
+ RX_SEC_F | TS_F | MARK_F | RX_VLAN_F) \
+R(sec_ts_mark_vlan_rss, 1, 1, 1, 1, 0, 0, 1, \
+ RX_SEC_F | RX_VLAN_F | RSS_F) \
+R(sec_ts_mark_vlan_ptype, 1, 1, 1, 1, 0, 1, 0, \
+ RX_SEC_F | TS_F | MARK_F | RX_VLAN_F | PTYPE_F) \
+R(sec_ts_mark_vlan_ptype_rss, 1, 1, 1, 1, 0, 1, 1, \
+ RX_SEC_F | TS_F | MARK_F | RX_VLAN_F | PTYPE_F | RSS_F)\
+R(sec_ts_mark_vlan_cksum, 1, 1, 1, 1, 1, 0, 0, \
+ RX_SEC_F | TS_F | MARK_F | RX_VLAN_F | CKSUM_F) \
+R(sec_ts_mark_vlan_cksum_rss, 1, 1, 1, 1, 1, 0, 1, \
+ RX_SEC_F | TS_F | MARK_F | RX_VLAN_F | CKSUM_F | RSS_F)\
+R(sec_ts_mark_vlan_cksum_ptype, 1, 1, 1, 1, 1, 1, 0, \
+ RX_SEC_F | TS_F | MARK_F | RX_VLAN_F | CKSUM_F | \
+ PTYPE_F) \
+R(sec_ts_mark_vlan_cksum_ptype_rss, \
+ 1, 1, 1, 1, 1, 1, 1, \
+ RX_SEC_F | TS_F | MARK_F | RX_VLAN_F | CKSUM_F | \
+ PTYPE_F | RSS_F)
#endif /* __OTX2_RX_H__ */
--
2.7.4
next prev parent reply other threads:[~2020-01-18 10:51 UTC|newest]
Thread overview: 111+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-08 11:54 [dpdk-dev] [PATCH 00/15] add OCTEONTX2 inline IPsec support Anoob Joseph
2019-12-08 11:54 ` [dpdk-dev] [PATCH 01/15] common/octeontx2: add CPT LF mbox for inline inbound Anoob Joseph
2019-12-09 7:38 ` Jerin Jacob
2019-12-08 11:54 ` [dpdk-dev] [PATCH 02/15] common/octeontx2: add routine to check if rte_eth_dev belongs to otx2 Anoob Joseph
2019-12-09 7:42 ` Jerin Jacob
2019-12-08 11:54 ` [dpdk-dev] [PATCH 03/15] crypto/octeontx2: configure for inline IPsec Anoob Joseph
2019-12-09 7:46 ` Jerin Jacob
2019-12-09 7:52 ` [dpdk-dev] [EXT] " Anoob Joseph
2019-12-09 7:53 ` Jerin Jacob
2019-12-08 11:54 ` [dpdk-dev] [PATCH 04/15] crypto/octeontx2: create eth security ctx Anoob Joseph
2019-12-08 11:54 ` [dpdk-dev] [PATCH 05/15] crypto/octeontx2: add security in eth dev configure Anoob Joseph
2019-12-09 7:51 ` Jerin Jacob
2019-12-09 8:03 ` Anoob Joseph
2019-12-09 8:04 ` Jerin Jacob
2019-12-08 11:54 ` [dpdk-dev] [PATCH 06/15] crypto/octeontx2: add eth security capabilities Anoob Joseph
2019-12-08 11:54 ` [dpdk-dev] [PATCH 07/15] crypto/octeontx2: enable CPT to share QP with ethdev Anoob Joseph
2019-12-08 11:54 ` [dpdk-dev] [PATCH 08/15] crypto/octeontx2: add eth security session operations Anoob Joseph
2019-12-08 11:54 ` [dpdk-dev] [PATCH 09/15] crypto/octeontx2: add datapath ops in eth security ctx Anoob Joseph
2019-12-08 11:54 ` [dpdk-dev] [PATCH 10/15] crypto/octeontx2: add lookup mem changes to hold sa indices Anoob Joseph
2019-12-09 8:02 ` Jerin Jacob
2019-12-13 7:12 ` [dpdk-dev] [EXT] " Anoob Joseph
2019-12-08 11:54 ` [dpdk-dev] [PATCH 11/15] net/octeontx2: add inline ipsec rx path changes Anoob Joseph
2019-12-08 11:54 ` [dpdk-dev] [PATCH 12/15] drivers/octeontx2: add sec in compiler optimized RX fastpath framework Anoob Joseph
2019-12-08 11:54 ` [dpdk-dev] [PATCH 13/15] drivers/octeontx2: add sec in compiler optimized TX " Anoob Joseph
2019-12-08 11:54 ` [dpdk-dev] [PATCH 14/15] crypto/octeontx2: add inline tx path changes Anoob Joseph
2019-12-14 15:42 ` Gavin Hu (Arm Technology China)
2019-12-08 11:54 ` [dpdk-dev] [PATCH 15/15] crypto/octeontx2: sync inline tag type cfg with Rx adapter configuration Anoob Joseph
2019-12-09 8:06 ` [dpdk-dev] [PATCH 00/15] add OCTEONTX2 inline IPsec support Jerin Jacob
2019-12-10 22:54 ` Thomas Monjalon
2019-12-13 7:41 ` [dpdk-dev] [EXT] " Anoob Joseph
2019-12-13 10:18 ` Thomas Monjalon
2020-01-18 10:48 ` [dpdk-dev] [PATCH v2 " Anoob Joseph
2020-01-18 10:48 ` [dpdk-dev] [PATCH v2 01/15] common/octeontx2: add CPT LF mbox for inline inbound Anoob Joseph
2020-01-18 14:34 ` Jerin Jacob
2020-01-18 10:49 ` [dpdk-dev] [PATCH v2 02/15] common/octeontx2: add routine to check if sec capable otx2 Anoob Joseph
2020-01-18 14:35 ` Jerin Jacob
2020-01-27 7:01 ` Akhil Goyal
2020-01-27 8:02 ` Anoob Joseph
2020-01-27 8:12 ` Anoob Joseph
2020-01-18 10:49 ` [dpdk-dev] [PATCH v2 03/15] crypto/octeontx2: configure for inline IPsec Anoob Joseph
2020-01-18 10:49 ` [dpdk-dev] [PATCH v2 04/15] crypto/octeontx2: create eth security ctx Anoob Joseph
2020-01-18 10:49 ` [dpdk-dev] [PATCH v2 05/15] crypto/octeontx2: add security in eth dev configure Anoob Joseph
2020-01-18 10:49 ` [dpdk-dev] [PATCH v2 06/15] crypto/octeontx2: add eth security capabilities Anoob Joseph
2020-01-18 10:49 ` [dpdk-dev] [PATCH v2 07/15] crypto/octeontx2: enable CPT to share QP with ethdev Anoob Joseph
2020-01-18 10:49 ` [dpdk-dev] [PATCH v2 08/15] crypto/octeontx2: add eth security session operations Anoob Joseph
2020-01-18 10:49 ` [dpdk-dev] [PATCH v2 09/15] crypto/octeontx2: add datapath ops in eth security ctx Anoob Joseph
2020-01-18 10:49 ` [dpdk-dev] [PATCH v2 10/15] crypto/octeontx2: add lookup mem changes to hold sa indices Anoob Joseph
2020-01-18 10:49 ` [dpdk-dev] [PATCH v2 11/15] net/octeontx2: add inline ipsec rx path changes Anoob Joseph
2020-01-18 10:49 ` Anoob Joseph [this message]
2020-01-18 10:49 ` [dpdk-dev] [PATCH v2 13/15] drivers/octeontx2: add sec in compiler optimized TX fastpath framework Anoob Joseph
2020-01-18 10:49 ` [dpdk-dev] [PATCH v2 14/15] crypto/octeontx2: add inline tx path changes Anoob Joseph
2020-01-18 10:49 ` [dpdk-dev] [PATCH v2 15/15] crypto/octeontx2: sync inline tag type cfg with Rx adapter configuration Anoob Joseph
2020-01-18 14:38 ` [dpdk-dev] [PATCH v2 00/15] add OCTEONTX2 inline IPsec support Jerin Jacob
2020-01-19 10:43 ` Anoob Joseph
2020-01-19 10:53 ` Thomas Monjalon
2020-01-19 10:57 ` [dpdk-dev] [EXT] " Anoob Joseph
2020-01-22 10:16 ` [dpdk-dev] " Akhil Goyal
2020-01-22 10:55 ` Anoob Joseph
2020-01-22 12:56 ` Akhil Goyal
2020-01-22 14:18 ` Jerin Jacob
2020-01-27 2:55 ` [dpdk-dev] [EXT] " Anoob Joseph
2020-01-27 10:40 ` [dpdk-dev] " Akhil Goyal
2020-01-27 11:25 ` Jerin Jacob
2020-01-27 11:47 ` Akhil Goyal
2020-01-27 14:54 ` Anoob Joseph
2020-01-28 8:29 ` Jerin Jacob
2020-01-28 8:38 ` Akhil Goyal
2020-01-28 8:56 ` Jerin Jacob
2020-01-28 17:28 ` Ferruh Yigit
2020-01-29 4:01 ` [dpdk-dev] [EXT] " Anoob Joseph
2020-01-28 17:27 ` [dpdk-dev] " Ferruh Yigit
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 00/15] add OCTEON TX2 " Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 01/15] common/octeontx2: add CPT LF mbox for inline inbound Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 02/15] common/octeontx2: add routine to check if sec capable otx2 Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 03/15] crypto/octeontx2: configure for inline IPsec Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 04/15] net/octeontx2: create eth security ctx Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 05/15] net/octeontx2: add security in eth dev configure Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 06/15] net/octeontx2: add eth security capabilities Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 07/15] crypto/octeontx2: enable CPT to share QP with ethdev Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 08/15] net/octeontx2: add eth security session operations Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 09/15] net/octeontx2: add datapath ops in eth security ctx Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 10/15] net/octeontx2: add lookup mem changes to hold sa indices Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 11/15] net/octeontx2: add inline ipsec Rx path changes Anoob Joseph
2020-01-31 13:39 ` Akhil Goyal
2020-01-31 15:05 ` Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 12/15] drivers/octeontx2: add sec in Rx fastpath framework Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 13/15] drivers/octeontx2: add sec in Tx " Anoob Joseph
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 14/15] net/octeontx2: add inline Tx path changes Anoob Joseph
2020-01-31 13:36 ` Akhil Goyal
2020-01-31 15:33 ` Anoob Joseph
2020-02-01 9:35 ` Anoob Joseph
2020-02-03 13:25 ` Akhil Goyal
2020-01-31 10:03 ` [dpdk-dev] [PATCH v3 15/15] net/octeontx2: sync inline tag type Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 00/15] add OCTEON TX2 inline IPsec support Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 01/15] common/octeontx2: add CPT LF mbox for inline inbound Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 02/15] common/octeontx2: add routine to check if sec capable otx2 Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 03/15] crypto/octeontx2: configure for inline IPsec Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 04/15] net/octeontx2: create eth security ctx Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 05/15] net/octeontx2: add security in eth dev configure Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 06/15] net/octeontx2: add eth security capabilities Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 07/15] crypto/octeontx2: enable CPT to share QP with ethdev Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 08/15] net/octeontx2: add eth security session operations Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 09/15] net/octeontx2: add datapath ops in eth security ctx Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 10/15] net/octeontx2: add lookup mem changes to hold sa indices Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 11/15] net/octeontx2: add inline ipsec Rx path changes Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 12/15] drivers/octeontx2: add sec in Rx fastpath framework Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 13/15] drivers/octeontx2: add sec in Tx " Anoob Joseph
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 14/15] net/octeontx2: add inline Tx path changes Anoob Joseph
2020-02-05 23:19 ` Thomas Monjalon
2020-02-04 11:17 ` [dpdk-dev] [PATCH v4 15/15] net/octeontx2: sync inline tag type Anoob Joseph
2020-02-04 16:10 ` [dpdk-dev] [PATCH v4 00/15] add OCTEON TX2 inline IPsec support Akhil Goyal
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1579344553-11428-13-git-send-email-anoobj@marvell.com \
--to=anoobj@marvell.com \
--cc=adwivedi@marvell.com \
--cc=akhil.goyal@nxp.com \
--cc=declan.doherty@intel.com \
--cc=dev@dpdk.org \
--cc=jerinj@marvell.com \
--cc=kirankumark@marvell.com \
--cc=ktejasree@marvell.com \
--cc=lbartosik@marvell.com \
--cc=marchana@marvell.com \
--cc=ndabilpuram@marvell.com \
--cc=pathreya@marvell.com \
--cc=pbhagavatula@marvell.com \
--cc=thomas@monjalon.net \
--cc=vattunuru@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.