From: Greg Kurz <groug@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: Peter Maydell <peter.maydell@linaro.org>,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 1/3] pnv/phb3: Convert 1u to 1ull
Date: Wed, 12 Feb 2020 19:54:00 +0100 [thread overview]
Message-ID: <158153364010.3229002.8004283672455615950.stgit@bahia.lan> (raw)
In-Reply-To: <158153363409.3229002.13469293798150754920.stgit@bahia.lan>
As reported by Coverity defect CID 1419397, the 'j' variable goes up to
63 and shouldn't be used to left shift a 32-bit integer.
The result of the operation goes to a 64-bit integer : use a 64-bit
constant.
Reported-by: Coverity CID 1419397 Bad bit shift operation
Fixes: 9ae1329ee2fe "ppc/pnv: Add models for POWER8 PHB3 PCIe Host bridge"
Signed-off-by: Greg Kurz <groug@kaod.org>
---
hw/pci-host/pnv_phb3_msi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci-host/pnv_phb3_msi.c b/hw/pci-host/pnv_phb3_msi.c
index ecfc1b2c4e3d..d645468f4a6f 100644
--- a/hw/pci-host/pnv_phb3_msi.c
+++ b/hw/pci-host/pnv_phb3_msi.c
@@ -220,7 +220,7 @@ static void phb3_msi_resend(ICSState *ics)
if ((msi->rba[i] & (1ull << j)) == 0) {
continue;
}
- msi->rba[i] &= ~(1u << j);
+ msi->rba[i] &= ~(1ull << j);
phb3_msi_try_send(msi, i * 64 + j, true);
}
}
next prev parent reply other threads:[~2020-02-12 18:56 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-12 18:53 [PATCH 0/3] pnv: Fix a couple of issues reported by Coverity Greg Kurz
2020-02-12 18:54 ` Greg Kurz [this message]
2020-02-12 18:54 ` [PATCH 2/3] pnv/phb4: Fix error path in pnv_pec_realize() Greg Kurz
2020-02-12 18:54 ` [PATCH 3/3] pnv/phb3: Add missing break statement Greg Kurz
2020-02-12 23:49 ` [PATCH 0/3] pnv: Fix a couple of issues reported by Coverity David Gibson
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