From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.9 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 265E8C352A3 for ; Fri, 14 Feb 2020 02:44:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EAEB120848 for ; Fri, 14 Feb 2020 02:44:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="IPZYguxY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728193AbgBNCoN (ORCPT ); Thu, 13 Feb 2020 21:44:13 -0500 Received: from mail-pg1-f196.google.com ([209.85.215.196]:43666 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728089AbgBNCoN (ORCPT ); Thu, 13 Feb 2020 21:44:13 -0500 Received: by mail-pg1-f196.google.com with SMTP id u12so3816624pgb.10 for ; Thu, 13 Feb 2020 18:44:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:content-transfer-encoding:in-reply-to:references :subject:from:cc:to:date:message-id:user-agent; bh=niNApjCO06O7a+lFbqctq/E/HFCOZGM44slzM8VnlEo=; b=IPZYguxYwiX88hRwH7QTLPVac3hJ/RngX14B4KoZqW6OiO/2xsVmTwj+HhOFyfg7nh TT0vT38gm9VGUvEz2ocWIbn+qo8hKz8aOteojzMKPNJwdp3Ifg8ap0Hv7Ilq+x9zZLw8 7xsWgM62nwwp1kelkqj+SxQtFQoO+K1f4zu1I= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:content-transfer-encoding :in-reply-to:references:subject:from:cc:to:date:message-id :user-agent; bh=niNApjCO06O7a+lFbqctq/E/HFCOZGM44slzM8VnlEo=; b=IzJBvugzcMzETxzvlMEcYNZAqwBDLGtIfg8BZTNOG2l6SCrt1efUngwOYsC0qhj6yS 30kUYts7yyrTWx/LMbgps4ccbn8G3OfzIEylziAY8MXjN8xADcCsXzBKJ//UykkqL37x 4mMYQmLa9xPUCUjQozKqJoSOq8K9XfNfXFYdOnygSyIqVbjYjYQrtS/lZUtQwBDBAaNj nAUXdQRStCLEjYV7vefIOEoxGIJcsT4fahjr7qxHww/ELYKea9bn/d89SDTuHHxGW20B 6DrHpmD8xuLuKp8cZE7ad8yLm1QN3zo1Ch4VRbCbqANpkRTb7fMM5kRNOgphhXDSGCrP c+rg== X-Gm-Message-State: APjAAAUnFKRxc+n1YO3Kxt7E1cmFDAeWC7trC86rHTmwQEDdpMQdjvPj 3fS/UXDBPC9AXGNTts/jvgUD+g== X-Google-Smtp-Source: APXvYqwzYj+wvXbHesIqdU5LMCnildAw4yCq+8revIbEfOsWKVii3zdqeKtfxcBEcLKIdQKk+eTHGA== X-Received: by 2002:a63:74b:: with SMTP id 72mr1052514pgh.162.1581648252362; Thu, 13 Feb 2020 18:44:12 -0800 (PST) Received: from chromium.org ([2620:15c:202:1:fa53:7765:582b:82b9]) by smtp.gmail.com with ESMTPSA id c10sm4575360pgj.49.2020.02.13.18.44.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 18:44:11 -0800 (PST) Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: References: Subject: Re: [PATCH 1/2] iommu: arm-smmu-impl: Convert to a generic reset implementation From: Stephen Boyd Cc: iommu@lists.linux-foundation.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Matthias Kaehlcke , Bjorn Andersson , Rajendra Nayak , Tomasz Figa , Sai Prakash Ranjan To: Joerg Roedel , Jordan Crouse , Rob Clark , Robin Murphy , Sai Prakash Ranjan , Will Deacon Date: Thu, 13 Feb 2020 18:44:10 -0800 Message-ID: <158164825099.184098.18396989716299086067@swboyd.mtv.corp.google.com> User-Agent: alot/0.9 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Quoting Sai Prakash Ranjan (2020-01-22 03:48:01) > Currently the QCOM specific smmu reset implementation is very > specific to SDM845 SoC and has a wait-for-safe logic which > may not be required for other SoCs. So move the SDM845 specific > logic to its specific reset function. Also add SC7180 SMMU > compatible for calling into QCOM specific implementation. >=20 > Signed-off-by: Sai Prakash Ranjan > --- Reviewed-by: Stephen Boyd From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8AA7BC352A3 for ; Fri, 14 Feb 2020 02:44:17 +0000 (UTC) Received: from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 52E7420848 for ; Fri, 14 Feb 2020 02:44:17 +0000 (UTC) Authentication-Results: mail.kernel.org; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" Quoting Sai Prakash Ranjan (2020-01-22 03:48:01) > Currently the QCOM specific smmu reset implementation is very > specific to SDM845 SoC and has a wait-for-safe logic which > may not be required for other SoCs. So move the SDM845 specific > logic to its specific reset function. Also add SC7180 SMMU > compatible for calling into QCOM specific implementation. > > Signed-off-by: Sai Prakash Ranjan > --- Reviewed-by: Stephen Boyd _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E23EC3B18F for ; Fri, 14 Feb 2020 02:44:25 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 225B520848 for ; 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Thu, 13 Feb 2020 18:44:12 -0800 (PST) Received: from chromium.org ([2620:15c:202:1:fa53:7765:582b:82b9]) by smtp.gmail.com with ESMTPSA id c10sm4575360pgj.49.2020.02.13.18.44.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Feb 2020 18:44:11 -0800 (PST) MIME-Version: 1.0 In-Reply-To: References: Subject: Re: [PATCH 1/2] iommu: arm-smmu-impl: Convert to a generic reset implementation From: Stephen Boyd To: Joerg Roedel , Jordan Crouse , Rob Clark , Robin Murphy , Sai Prakash Ranjan , Will Deacon Date: Thu, 13 Feb 2020 18:44:10 -0800 Message-ID: <158164825099.184098.18396989716299086067@swboyd.mtv.corp.google.com> User-Agent: alot/0.9 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200213_184413_254992_75EE22A6 X-CRM114-Status: UNSURE ( 7.33 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sai Prakash Ranjan , Rajendra Nayak , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bjorn Andersson , iommu@lists.linux-foundation.org, Matthias Kaehlcke , Tomasz Figa , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Quoting Sai Prakash Ranjan (2020-01-22 03:48:01) > Currently the QCOM specific smmu reset implementation is very > specific to SDM845 SoC and has a wait-for-safe logic which > may not be required for other SoCs. So move the SDM845 specific > logic to its specific reset function. Also add SC7180 SMMU > compatible for calling into QCOM specific implementation. > > Signed-off-by: Sai Prakash Ranjan > --- Reviewed-by: Stephen Boyd _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel