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From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Akeem G Abodunrin" <akeem.g.abodunrin@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Security mitigation for Intel Gen7/7.5 HWs
Date: Wed, 19 Feb 2020 05:13:08 -0000	[thread overview]
Message-ID: <158208918827.21060.3522472447647365897@emeril.freedesktop.org> (raw)
In-Reply-To: <20200218162105.12537-1-akeem.g.abodunrin@intel.com>

== Series Details ==

Series: Security mitigation for Intel Gen7/7.5 HWs
URL   : https://patchwork.freedesktop.org/series/73615/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: Add mechanism to submit a context WA on ring submission
Okay!

Commit: drm/i915/gen7: Clear all EU/L3 residual contexts
+drivers/gpu/drm/i915/gt/gen7_5_clearbuffer.h:14:11: warning: symbol 'hsw_eu_kernel' was not declared. Should it be static?
+drivers/gpu/drm/i915/gt/gen7_clearbuffer.h:14:11: warning: symbol 'ivb_eu_kernel' was not declared. Should it be static?

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  parent reply	other threads:[~2020-02-19  5:13 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-18 16:21 [PATCH v2 0/2] Security mitigation for Intel Gen7/7.5 HWs Akeem G Abodunrin
2020-02-18 16:21 ` [Intel-gfx] " Akeem G Abodunrin
2020-02-18 16:21 ` [PATCH v2 1/2] drm/i915: Add mechanism to submit a context WA on ring submission Akeem G Abodunrin
2020-02-18 16:21   ` [Intel-gfx] " Akeem G Abodunrin
2020-02-18 16:21 ` [PATCH v2 2/2] drm/i915/gen7: Clear all EU/L3 residual contexts Akeem G Abodunrin
2020-02-18 16:21   ` [Intel-gfx] " Akeem G Abodunrin
2020-02-19  5:11 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Security mitigation for Intel Gen7/7.5 HWs Patchwork
2020-02-19  5:13 ` Patchwork [this message]
2020-02-19  5:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-02-20 19:42 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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