From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Imre Deak" <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Clean up DPLL output/refclock tracking (rev2)
Date: Fri, 28 Feb 2020 17:55:28 -0000 [thread overview]
Message-ID: <158291252863.7476.7331892471565096711@emeril.freedesktop.org> (raw)
In-Reply-To: <20200226203455.23032-1-imre.deak@intel.com>
== Series Details ==
Series: drm/i915: Clean up DPLL output/refclock tracking (rev2)
URL : https://patchwork.freedesktop.org/series/73977/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915: Fix bounds check in intel_get_shared_dpll_id()
Okay!
Commit: drm/i915: Move DPLL HW readout/sanitize fns to intel_dpll_mgr.c
Okay!
Commit: drm/i915: Keep the global DPLL state in a DPLL specific struct
Okay!
Commit: drm/i915: Move the DPLL vfunc inits after the func defines
Okay!
Commit: drm/i915/hsw: Use the DPLL ID when calculating DPLL clock
Okay!
Commit: drm/i915: Move DPLL frequency calculation to intel_dpll_mgr.c
Okay!
Commit: drm/i915/skl: Parametrize the DPLL ref clock instead of open-coding it
Okay!
Commit: drm/i915/hsw: Rename the get HDMI/DP DPLL funcs to get WRPLL/LCPLL
Okay!
Commit: drm/i915/hsw: Split out the SPLL parameter calculation
Okay!
Commit: drm/i915/hsw: Split out the WRPLL, LCPLL, SPLL frequency calculation
Okay!
Commit: drm/i915/skl, cnl: Split out the WRPLL/LCPLL frequency calculation
+drivers/gpu/drm/i915/display/intel_dpll_mgr.c:2514:5: warning: symbol 'cnl_hdmi_pll_ref_clock' was not declared. Should it be static?
Commit: drm/i915/hsw: Use the read-out WRPLL/SPLL state instead of reading out again
Okay!
Commit: drm/i915: Unify the DPLL ref clock frequency tracking
-O:drivers/gpu/drm/i915/display/intel_dpll_mgr.c:2511:5: warning: symbol 'cnl_hdmi_pll_ref_clock' was not declared. Should it be static?
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next prev parent reply other threads:[~2020-02-28 17:55 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-26 20:34 [Intel-gfx] [PATCH 00/13] drm/i915: Clean up DPLL output/refclock tracking Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 01/13] drm/i915: Fix bounds check in intel_get_shared_dpll_id() Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 02/13] drm/i915: Move DPLL HW readout/sanitize fns to intel_dpll_mgr.c Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 03/13] drm/i915: Keep the global DPLL state in a DPLL specific struct Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 04/13] drm/i915: Move the DPLL vfunc inits after the func defines Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 05/13] drm/i915/hsw: Use the DPLL ID when calculating DPLL clock Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 06/13] drm/i915: Move DPLL frequency calculation to intel_dpll_mgr.c Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 07/13] drm/i915/skl: Parametrize the DPLL ref clock instead of open-coding it Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 08/13] drm/i915/hsw: Rename the get HDMI/DP DPLL funcs to get WRPLL/LCPLL Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 09/13] drm/i915/hsw: Split out the SPLL parameter calculation Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 10/13] drm/i915/hsw: Split out the WRPLL, LCPLL, SPLL frequency calculation Imre Deak
2020-02-26 20:34 ` [Intel-gfx] [PATCH 11/13] drm/i915/skl, cnl: Split out the WRPLL/LCPLL " Imre Deak
2020-02-27 17:57 ` Ville Syrjälä
2020-02-27 18:34 ` Imre Deak
2020-02-27 18:49 ` Ville Syrjälä
2020-02-26 20:34 ` [Intel-gfx] [PATCH 12/13] drm/i915/hsw: Use the read-out WRPLL/SPLL state instead of reading out again Imre Deak
2020-02-27 17:58 ` Ville Syrjälä
2020-02-26 20:34 ` [Intel-gfx] [PATCH 13/13] drm/i915: Unify the DPLL ref clock frequency tracking Imre Deak
2020-02-27 18:13 ` Ville Syrjälä
2020-02-27 19:01 ` Imre Deak
2020-02-28 15:33 ` [Intel-gfx] [PATCH v2 " Imre Deak
2020-02-27 4:08 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Clean up DPLL output/refclock tracking Patchwork
2020-02-27 4:14 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-02-27 4:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-02-28 0:22 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-02-28 17:49 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Clean up DPLL output/refclock tracking (rev2) Patchwork
2020-02-28 17:55 ` Patchwork [this message]
2020-02-28 18:40 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-01 14:06 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-03-02 13:31 ` Imre Deak
2020-03-02 14:30 ` Vudum, Lakshminarayana
2020-03-02 13:56 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2020-03-02 17:39 ` Imre Deak
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