From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E02B8C43331 for ; Tue, 31 Mar 2020 11:10:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B247320838 for ; Tue, 31 Mar 2020 11:10:12 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="LgmxMr6B" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730469AbgCaLKM (ORCPT ); Tue, 31 Mar 2020 07:10:12 -0400 Received: from mail27.static.mailgun.info ([104.130.122.27]:48565 "EHLO mail27.static.mailgun.info" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730436AbgCaLKL (ORCPT ); Tue, 31 Mar 2020 07:10:11 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1585653011; h=Message-Id: Date: Subject: Cc: To: From: Sender; bh=jJMKMk36Y7t8WhmCvEnz3agtnMJW8aQbsoGEIU+ecJM=; b=LgmxMr6Bv3uO5HQgmf2W/8NWAo6kXQKW8HpEa/hTODXnJaXSydOQkmWFzsGeAfJKpj3U91Kq 67pSMATM9HgdTpKmiNQYWJztygwEWzRJzjSOMyHeRl1qaazljkH60vU2LgoalWazO0VQiu3S GQVzitaHjldA398tySIUCRjkONk= X-Mailgun-Sending-Ip: 104.130.122.27 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by mxa.mailgun.org with ESMTP id 5e832512.7fab01e27880-smtp-out-n05; Tue, 31 Mar 2020 11:10:10 -0000 (UTC) Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 574D0C44791; Tue, 31 Mar 2020 11:10:10 +0000 (UTC) Received: from akashast-linux.qualcomm.com (blr-c-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: akashast) by smtp.codeaurora.org (Postfix) with ESMTPSA id E2949C43637; Tue, 31 Mar 2020 11:09:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E2949C43637 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=none smtp.mailfrom=akashast@codeaurora.org From: Akash Asthana To: gregkh@linuxfoundation.org, agross@kernel.org, bjorn.andersson@linaro.org, wsa@the-dreams.de, broonie@kernel.org, mark.rutland@arm.com, robh+dt@kernel.org, georgi.djakov@linaro.org Cc: linux-i2c@vger.kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, swboyd@chromium.org, mgautam@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org, mka@chromium.org, dianders@chromium.org, evgreen@chromium.org, Akash Asthana Subject: [PATCH V3 0/8] Add interconnect support to QSPI and QUP drivers Date: Tue, 31 Mar 2020 16:39:28 +0530 Message-Id: <1585652976-17481-1-git-send-email-akashast@codeaurora.org> X-Mailer: git-send-email 2.7.4 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org dt-binding patch for QUP drivers. - https://patchwork.kernel.org/patch/11436621/ [Convert QUP bindings to YAML and add ICC, pin swap doc] dt-binding patch for QSPI. - https://patchwork.kernel.org/patch/11436719/ [Convert QSPI binding to YAML and add interconnect doc] High level design: - QUP wrapper/common driver. Vote for QUP core on behalf of earlycon from probe. Remove BW vote during earlycon exit call - SERIAL driver. Vote only for CPU/CORE path because driver is in FIFO mode only Vote/unvote from qcom_geni_serial_pm func. Bump up the CPU vote from set_termios call based on real time need - I2C driver. Vote for CORE/CPU/DDR path Vote/unvote from runtime resume/suspend callback As bus speed for I2C is fixed from probe itself no need for bump up. - SPI QUP driver. Vote only for CPU/CORE path because driver is in FIFO mode only Vote/unvote from runtime resume/suspend callback Bump up CPU vote based on real time need per transfer. - QSPI driver. Vote only for CPU path Vote/unvote from runtime resume/suspend callback Bump up CPU vote based on real time need per transfer. Changes in V2: - Add devm_of_icc_get() API interconnect core. - Add ICC support to common driver to fix earlyconsole crash. Changes in V3: - Define common ICC APIs in geni-se driver and use it across geni based I2C,SPI and UART driver. Akash Asthana (8): interconnect: Add devm_of_icc_get() as exported API for users soc: qcom: geni: Support for ICC voting soc: qcom-geni-se: Add interconnect support to fix earlycon crash i2c: i2c-qcom-geni: Add interconnect support spi: spi-geni-qcom: Add interconnect support tty: serial: qcom_geni_serial: Add interconnect support spi: spi-qcom-qspi: Add interconnect support arm64: dts: sc7180: Add interconnect for QUP and QSPI arch/arm64/boot/dts/qcom/sc7180.dtsi | 127 +++++++++++++++++++++++++++++ drivers/i2c/busses/i2c-qcom-geni.c | 30 ++++++- drivers/interconnect/core.c | 25 ++++++ drivers/soc/qcom/qcom-geni-se.c | 149 ++++++++++++++++++++++++++++++++++ drivers/spi/spi-geni-qcom.c | 31 ++++++- drivers/spi/spi-qcom-qspi.c | 46 ++++++++++- drivers/tty/serial/qcom_geni_serial.c | 35 +++++++- include/linux/interconnect.h | 7 ++ include/linux/qcom-geni-se.h | 38 +++++++++ 9 files changed, 482 insertions(+), 6 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project