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Wed, 15 Apr 2020 14:45:30 -0700 (PDT) Received: from localhost ([203.18.28.220]) by smtp.gmail.com with ESMTPSA id g11sm505015pjs.17.2020.04.15.14.45.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Apr 2020 14:45:29 -0700 (PDT) Date: Thu, 16 Apr 2020 07:45:09 +1000 From: Nicholas Piggin Subject: Powerpc Linux 'scv' system call ABI proposal take 2 To: linuxppc-dev@lists.ozlabs.org MIME-Version: 1.0 Message-Id: <1586931450.ub4c8cq8dj.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: libc-dev@lists.llvm.org, libc-alpha@sourceware.org, musl@lists.openwall.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" I would like to enable Linux support for the powerpc 'scv' instruction, as a faster system call instruction. This requires two things to be defined: Firstly a way to advertise to=20 userspace that kernel supports scv, and a way to allocate and advertise support for individual scv vectors. Secondly, a calling convention ABI for this new instruction. Thanks to those who commented last time, since then I have removed my answered questions and unpopular alternatives but you can find them here https://lists.ozlabs.org/pipermail/linuxppc-dev/2020-January/203545.html Let me try one more with a wider cc list, and then we'll get something merged. Any questions or counter-opinions are welcome. System Call Vectored (scv) ABI =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D The scv instruction is introduced with POWER9 / ISA3, it comes with an rfscv counter-part. The benefit of these instructions is performance (trading slower SRR0/1 with faster LR/CTR registers, and entering the kernel with MSR[EE] and MSR[RI] left enabled, which can reduce MSR=20 updates. The scv instruction has 128 interrupt entry points (not enough=20 to cover the Linux system call space). The proposal is to assign scv numbers very conservatively and allocate=20 them as individual HWCAP features as we add support for more. The zero=20 vector ('scv 0') will be used for normal system calls, equivalent to 'sc'. Advertisement Linux has not enabled FSCR[SCV] yet, so the instruction will cause a SIGILL in current environments. Linux has defined a HWCAP2 bit=20 PPC_FEATURE2_SCV for SCV support, but does not set it. When scv instruction support and the scv 0 vector for system calls are=20 added, PPC_FEATURE2_SCV will indicate support for these. Other vectors=20 should not be used without future HWCAP bits indicating support, which is how we will allocate them. (Should unallocated ones generate SIGILL, or return -ENOSYS in r3?) Calling convention The proposal is for scv 0 to provide the standard Linux system call ABI=20 with the following differences from sc convention[1]: - LR is to be volatile across scv calls. This is necessary because the=20 scv instruction clobbers LR. From previous discussion, this should be=20 possible to deal with in GCC clobbers and CFI. - CR1 and CR5-CR7 are volatile. This matches the C ABI and would allow the kernel system call exit to avoid restoring the CR register (although=20 we probably still would anyway to avoid information leak). - Error handling: I think the consensus has been to move to using negative return value in r3 rather than CR0[SO]=3D1 to indicate error, which match= es most other architectures and is closer to a function call. The number of scratch registers (r9-r12) at kernel entry seems=20 sufficient that we don't have any costly spilling, patch is here[2]. =20 [1] https://github.com/torvalds/linux/blob/master/Documentation/powerpc/sys= call64-abi.rst [2] https://lists.ozlabs.org/pipermail/linuxppc-dev/2020-February/204840.ht= ml