From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 428AEC432BE for ; Fri, 30 Jul 2021 16:50:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2BD5360F3A for ; Fri, 30 Jul 2021 16:50:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229708AbhG3QvB (ORCPT ); Fri, 30 Jul 2021 12:51:01 -0400 Received: from mail.kernel.org ([198.145.29.99]:48832 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229479AbhG3Qu6 (ORCPT ); Fri, 30 Jul 2021 12:50:58 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 59F1360E09; Fri, 30 Jul 2021 16:50:53 +0000 (UTC) Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1m9Vil-0023AS-Ha; Fri, 30 Jul 2021 17:50:51 +0100 MIME-Version: 1.0 Date: Fri, 30 Jul 2021 17:50:51 +0100 From: Marc Zyngier To: Sam Protsenko Cc: Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Linus Walleij , Tomasz Figa , Rob Herring , Stephen Boyd , Michael Turquette , Jiri Slaby , Greg Kroah-Hartman , Charles Keepax , Ryu Euiyoul , Tom Gall , Sumit Semwal , John Stultz , Amit Pundir , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-serial@vger.kernel.org Subject: Re: [PATCH 12/12] arm64: dts: exynos: Add Exynos850 SoC support In-Reply-To: <20210730144922.29111-13-semen.protsenko@linaro.org> References: <20210730144922.29111-1-semen.protsenko@linaro.org> <20210730144922.29111-13-semen.protsenko@linaro.org> User-Agent: Roundcube Webmail/1.4.11 Message-ID: <15871f8ced3c757fad1ab3b6e62c4e64@misterjones.org> X-Sender: maz@kernel.org Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: semen.protsenko@linaro.org, s.nawrocki@samsung.com, cw00.choi@samsung.com, krzysztof.kozlowski@canonical.com, linus.walleij@linaro.org, tomasz.figa@gmail.com, robh+dt@kernel.org, sboyd@kernel.org, mturquette@baylibre.com, jirislaby@kernel.org, gregkh@linuxfoundation.org, ckeepax@opensource.wolfsonmicro.com, ryu.real@samsung.com, tom.gall@linaro.org, sumit.semwal@linaro.org, john.stultz@linaro.org, amit.pundir@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-serial@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On 2021-07-30 15:49, Sam Protsenko wrote: > Samsung Exynos850 is ARMv8-based mobile-oriented SoC. > > Features: > * CPU: Cortex-A55 Octa (8 cores), up to 2 GHz > * Memory interface: LPDDR4/4x 2 channels (12.8 GB/s) > * SD/MMC: SD 3.0, eMMC5.1 DDR 8-bit > * Modem: 4G LTE, 3G, GSM/GPRS/EDGE > * RF: Quad GNSS, WiFi 5 (802.11ac), Bluetooth 5.0 > * GPU: Mali-G52 MP1 > * Codec: 1080p 60fps H64, HEVC, JPEG HW Codec > * Display: Full HD+ (2520x1080)@60fps LCD > * Camera: 16+5MP/13+8MP ISP, MIPI CSI 4/4/2, FD, DRC > * Connectivity: USB 2.0 DRD, USI (SPI/UART/I2C), HSI2C, I3C, ADC, > Audio > > This patch adds minimal SoC support. Particular board device tree files > can include exynos850.dtsi file to get SoC related nodes, and then > reference those nodes further as needed. > > Signed-off-by: Sam Protsenko > --- > .../boot/dts/exynos/exynos850-pinctrl.dtsi | 782 ++++++++++++++++++ > arch/arm64/boot/dts/exynos/exynos850-usi.dtsi | 30 + > arch/arm64/boot/dts/exynos/exynos850.dtsi | 245 ++++++ > 3 files changed, 1057 insertions(+) > create mode 100644 arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > create mode 100644 arch/arm64/boot/dts/exynos/exynos850-usi.dtsi > create mode 100644 arch/arm64/boot/dts/exynos/exynos850.dtsi > > diff --git a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > new file mode 100644 > index 000000000000..4cf0a22cc6db [...] > + gic: interrupt-controller@12a00000 { > + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; One thing for sure, it cannot be both. And given that it is an A55-based SoC, it isn't either. It is more likely a GIC400. > + #interrupt-cells = <3>; > + #address-cells = <0>; > + interrupt-controller; > + reg = <0x0 0x12a01000 0x1000>, > + <0x0 0x12a02000 0x1000>, This is wrong. It is architecturally set to 8kB. > + <0x0 0x12a04000 0x2000>, > + <0x0 0x12a06000 0x2000>; > + interrupts = + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 4? With 8 CPUs? I also find it curious that you went through the unusual (and IMO confusing) effort to allocate a name to each and every SPI in the system, but didn't do it for any on the PPIs... > + }; > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupts = + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; > + clock-frequency = <26000000>; No, please. Fix the firmware to program CNTFRQ_EL0 on each and every CPU. This isn't 2012 anymore. You are also missing the hypervisor virtual timer interrupt. > + use-clocksource-only; > + use-physical-timer; Thankfully, these two properties do not exist. Thanks, M. -- Jazz is not dead. It just smells funny... From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.7 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17A91C4338F for ; Fri, 30 Jul 2021 16:53:04 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D5D3360EB2 for ; Fri, 30 Jul 2021 16:53:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org D5D3360EB2 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; 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Fri, 30 Jul 2021 16:50:57 +0000 Received: from mail.kernel.org ([198.145.29.99]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1m9Vin-009Ylw-Nm for linux-arm-kernel@lists.infradead.org; Fri, 30 Jul 2021 16:50:55 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 59F1360E09; Fri, 30 Jul 2021 16:50:53 +0000 (UTC) Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1m9Vil-0023AS-Ha; Fri, 30 Jul 2021 17:50:51 +0100 MIME-Version: 1.0 Date: Fri, 30 Jul 2021 17:50:51 +0100 From: Marc Zyngier To: Sam Protsenko Cc: Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Linus Walleij , Tomasz Figa , Rob Herring , Stephen Boyd , Michael Turquette , Jiri Slaby , Greg Kroah-Hartman , Charles Keepax , Ryu Euiyoul , Tom Gall , Sumit Semwal , John Stultz , Amit Pundir , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-serial@vger.kernel.org Subject: Re: [PATCH 12/12] arm64: dts: exynos: Add Exynos850 SoC support In-Reply-To: <20210730144922.29111-13-semen.protsenko@linaro.org> References: <20210730144922.29111-1-semen.protsenko@linaro.org> <20210730144922.29111-13-semen.protsenko@linaro.org> User-Agent: Roundcube Webmail/1.4.11 Message-ID: <15871f8ced3c757fad1ab3b6e62c4e64@misterjones.org> X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: semen.protsenko@linaro.org, s.nawrocki@samsung.com, cw00.choi@samsung.com, krzysztof.kozlowski@canonical.com, linus.walleij@linaro.org, tomasz.figa@gmail.com, robh+dt@kernel.org, sboyd@kernel.org, mturquette@baylibre.com, jirislaby@kernel.org, gregkh@linuxfoundation.org, ckeepax@opensource.wolfsonmicro.com, ryu.real@samsung.com, tom.gall@linaro.org, sumit.semwal@linaro.org, john.stultz@linaro.org, amit.pundir@linaro.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-serial@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210730_095053_868768_F0BF50AB X-CRM114-Status: GOOD ( 22.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2021-07-30 15:49, Sam Protsenko wrote: > Samsung Exynos850 is ARMv8-based mobile-oriented SoC. > > Features: > * CPU: Cortex-A55 Octa (8 cores), up to 2 GHz > * Memory interface: LPDDR4/4x 2 channels (12.8 GB/s) > * SD/MMC: SD 3.0, eMMC5.1 DDR 8-bit > * Modem: 4G LTE, 3G, GSM/GPRS/EDGE > * RF: Quad GNSS, WiFi 5 (802.11ac), Bluetooth 5.0 > * GPU: Mali-G52 MP1 > * Codec: 1080p 60fps H64, HEVC, JPEG HW Codec > * Display: Full HD+ (2520x1080)@60fps LCD > * Camera: 16+5MP/13+8MP ISP, MIPI CSI 4/4/2, FD, DRC > * Connectivity: USB 2.0 DRD, USI (SPI/UART/I2C), HSI2C, I3C, ADC, > Audio > > This patch adds minimal SoC support. Particular board device tree files > can include exynos850.dtsi file to get SoC related nodes, and then > reference those nodes further as needed. > > Signed-off-by: Sam Protsenko > --- > .../boot/dts/exynos/exynos850-pinctrl.dtsi | 782 ++++++++++++++++++ > arch/arm64/boot/dts/exynos/exynos850-usi.dtsi | 30 + > arch/arm64/boot/dts/exynos/exynos850.dtsi | 245 ++++++ > 3 files changed, 1057 insertions(+) > create mode 100644 arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > create mode 100644 arch/arm64/boot/dts/exynos/exynos850-usi.dtsi > create mode 100644 arch/arm64/boot/dts/exynos/exynos850.dtsi > > diff --git a/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > b/arch/arm64/boot/dts/exynos/exynos850-pinctrl.dtsi > new file mode 100644 > index 000000000000..4cf0a22cc6db [...] > + gic: interrupt-controller@12a00000 { > + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; One thing for sure, it cannot be both. And given that it is an A55-based SoC, it isn't either. It is more likely a GIC400. > + #interrupt-cells = <3>; > + #address-cells = <0>; > + interrupt-controller; > + reg = <0x0 0x12a01000 0x1000>, > + <0x0 0x12a02000 0x1000>, This is wrong. It is architecturally set to 8kB. > + <0x0 0x12a04000 0x2000>, > + <0x0 0x12a06000 0x2000>; > + interrupts = + (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 4? With 8 CPUs? I also find it curious that you went through the unusual (and IMO confusing) effort to allocate a name to each and every SPI in the system, but didn't do it for any on the PPIs... > + }; > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupts = + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, > + + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; > + clock-frequency = <26000000>; No, please. Fix the firmware to program CNTFRQ_EL0 on each and every CPU. This isn't 2012 anymore. You are also missing the hypervisor virtual timer interrupt. > + use-clocksource-only; > + use-physical-timer; Thankfully, these two properties do not exist. Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel