From: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
To: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org
Cc: lorenzo.pieralisi@arm.com, bhelgaas@google.com,
rgummal@xilinx.com,
Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
Subject: [PATCH v6 0/2] Adding support for Versal CPM as Root Port driver
Date: Fri, 24 Apr 2020 17:34:02 +0530 [thread overview]
Message-ID: <1587729844-20798-1-git-send-email-bharat.kumar.gogada@xilinx.com> (raw)
- Adding support for Versal CPM as Root port.
- The Versal ACAP devices include CCIX-PCIe Module (CPM). The integrated
block for CPM along with the integrated bridge can function
as PCIe Root Port.
- Versal CPM uses GICv3 ITS feature for assigning MSI/MSI-X
vectors and handling MSI/MSI-X interrupts.
- Bridge error and legacy interrupts in Versal CPM are handled using
Versal CPM specific MISC interrupt line.
Changes for v6:
- Using pci_generic_ecam_ops for ECAM registration.
- Fixed INTX registration handling
Bharat Kumar Gogada (2):
PCI: xilinx-cpm: Add device tree binding for Versal CPM Root Port
PCI: xilinx-cpm: Add Versal CPM Root Port driver
.../devicetree/bindings/pci/xilinx-versal-cpm.txt | 68 +++
drivers/pci/controller/Kconfig | 9 +
drivers/pci/controller/Makefile | 1 +
drivers/pci/controller/pcie-xilinx-cpm.c | 521 +++++++++++++++++++++
4 files changed, 599 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/xilinx-versal-cpm.txt
create mode 100644 drivers/pci/controller/pcie-xilinx-cpm.c
--
2.7.4
next reply other threads:[~2020-04-24 12:04 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-24 12:04 Bharat Kumar Gogada [this message]
2020-04-24 12:04 ` [PATCH v6 1/2] PCI: xilinx-cpm: Add device tree binding for Versal CPM Root Port Bharat Kumar Gogada
2020-04-29 18:55 ` Rob Herring
2020-04-30 7:11 ` Bharat Kumar Gogada
2020-04-24 12:04 ` [PATCH v6 2/2] PCI: xilinx-cpm: Add Versal CPM Root Port driver Bharat Kumar Gogada
2020-04-29 19:14 ` Rob Herring
2020-05-05 9:19 ` Bharat Kumar Gogada
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