From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=0.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,SUBJECT_NEEDS_ENCODING, SUBJ_ILLEGAL_CHARS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0D45C4724C for ; Thu, 30 Apr 2020 16:30:27 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5B44C2070B for ; Thu, 30 Apr 2020 16:30:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5B44C2070B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=chris-wilson.co.uk Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0F25F6E934; Thu, 30 Apr 2020 16:30:27 +0000 (UTC) Received: from fireflyinternet.com (mail.fireflyinternet.com [109.228.58.192]) by gabe.freedesktop.org (Postfix) with ESMTPS id D78066E934; Thu, 30 Apr 2020 16:30:24 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from localhost (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP (TLS) id 21074051-1500050 for multiple; Thu, 30 Apr 2020 17:30:20 +0100 MIME-Version: 1.0 In-Reply-To: <158826395564.31920.10899877855410388780@emeril.freedesktop.org> References: <20200430154735.22434-1-mika.kuoppala@linux.intel.com> <158826395564.31920.10899877855410388780@emeril.freedesktop.org> To: Mika Kuoppala , Patchwork , intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/9] Revert "drm/i915/tgl: Include ro parts of l3 to invalidate" From: Chris Wilson Message-ID: <158826421955.7361.3520534534194174604@build.alporthouse.com> User-Agent: alot/0.8.1 Date: Thu, 30 Apr 2020 17:30:19 +0100 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: intel-gfx@lists.freedesktop.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Quoting Patchwork (2020-04-30 17:25:55) > == Series Details == > > Series: series starting with [1/9] Revert "drm/i915/tgl: Include ro parts of l3 to invalidate" > URL : https://patchwork.freedesktop.org/series/76777/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_8401 -> Patchwork_17529 > ==================================================== > > Summary > ------- > > **SUCCESS** Coherency/pipecontrol are the worst. How do we design tests to even detect and probe for unknown missed flushes? I wonder if there are some debug [context] registers that can tell us the status of all caches? Set to nonzero for a dirty cache, and we're allowed to set, but is then cleared by pipecontrol. Seems worth asking. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx