From: Bhaumik Bhatt <bbhatt@codeaurora.org>
To: manivannan.sadhasivam@linaro.org
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
hemantk@codeaurora.org, jhugo@codeaurora.org,
Bhaumik Bhatt <bbhatt@codeaurora.org>
Subject: [PATCH v7 8/8] bus: mhi: core: Ensure non-zero session or sequence ID values are used
Date: Fri, 8 May 2020 19:26:48 -0700 [thread overview]
Message-ID: <1588991208-26928-9-git-send-email-bbhatt@codeaurora.org> (raw)
In-Reply-To: <1588991208-26928-1-git-send-email-bbhatt@codeaurora.org>
While writing any sequence or session identifiers, it is possible that
the host could write a zero value, whereas only non-zero values should
be supported writes to those registers. Ensure that the host does not
write a non-zero value for them and also log them in debug messages. A
macro is introduced to simplify this check and the existing checks are
also converted to use this macro.
Signed-off-by: Bhaumik Bhatt <bbhatt@codeaurora.org>
Reviewed-by: Jeffrey Hugo <jhugo@codeaurora.org>
---
drivers/bus/mhi/core/boot.c | 15 +++++++--------
drivers/bus/mhi/core/internal.h | 1 +
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/bus/mhi/core/boot.c b/drivers/bus/mhi/core/boot.c
index 80e4d76..0b38014 100644
--- a/drivers/bus/mhi/core/boot.c
+++ b/drivers/bus/mhi/core/boot.c
@@ -43,10 +43,7 @@ void mhi_rddm_prepare(struct mhi_controller *mhi_cntrl,
lower_32_bits(mhi_buf->dma_addr));
mhi_write_reg(mhi_cntrl, base, BHIE_RXVECSIZE_OFFS, mhi_buf->len);
- sequence_id = prandom_u32() & BHIE_RXVECSTATUS_SEQNUM_BMSK;
-
- if (unlikely(!sequence_id))
- sequence_id = 1;
+ sequence_id = MHI_RANDOM_U32_NONZERO(BHIE_RXVECSTATUS_SEQNUM_BMSK);
mhi_write_reg_field(mhi_cntrl, base, BHIE_RXVECDB_OFFS,
BHIE_RXVECDB_SEQNUM_BMSK, BHIE_RXVECDB_SEQNUM_SHFT,
@@ -189,7 +186,9 @@ static int mhi_fw_load_amss(struct mhi_controller *mhi_cntrl,
return -EIO;
}
- dev_dbg(dev, "Starting AMSS download via BHIe\n");
+ sequence_id = MHI_RANDOM_U32_NONZERO(BHIE_TXVECSTATUS_SEQNUM_BMSK);
+ dev_dbg(dev, "Starting AMSS download via BHIe. Sequence ID:%u\n",
+ sequence_id);
mhi_write_reg(mhi_cntrl, base, BHIE_TXVECADDR_HIGH_OFFS,
upper_32_bits(mhi_buf->dma_addr));
@@ -198,7 +197,6 @@ static int mhi_fw_load_amss(struct mhi_controller *mhi_cntrl,
mhi_write_reg(mhi_cntrl, base, BHIE_TXVECSIZE_OFFS, mhi_buf->len);
- sequence_id = prandom_u32() & BHIE_TXVECSTATUS_SEQNUM_BMSK;
mhi_write_reg_field(mhi_cntrl, base, BHIE_TXVECDB_OFFS,
BHIE_TXVECDB_SEQNUM_BMSK, BHIE_TXVECDB_SEQNUM_SHFT,
sequence_id);
@@ -246,14 +244,15 @@ static int mhi_fw_load_sbl(struct mhi_controller *mhi_cntrl,
goto invalid_pm_state;
}
- dev_dbg(dev, "Starting SBL download via BHI\n");
+ session_id = MHI_RANDOM_U32_NONZERO(BHI_TXDB_SEQNUM_BMSK);
+ dev_dbg(dev, "Starting SBL download via BHI. Session ID:%u\n",
+ session_id);
mhi_write_reg(mhi_cntrl, base, BHI_STATUS, 0);
mhi_write_reg(mhi_cntrl, base, BHI_IMGADDR_HIGH,
upper_32_bits(dma_addr));
mhi_write_reg(mhi_cntrl, base, BHI_IMGADDR_LOW,
lower_32_bits(dma_addr));
mhi_write_reg(mhi_cntrl, base, BHI_IMGSIZE, size);
- session_id = prandom_u32() & BHI_TXDB_SEQNUM_BMSK;
mhi_write_reg(mhi_cntrl, base, BHI_IMGTXDB, session_id);
read_unlock_bh(pm_lock);
diff --git a/drivers/bus/mhi/core/internal.h b/drivers/bus/mhi/core/internal.h
index 0965ca3..80b32c2 100644
--- a/drivers/bus/mhi/core/internal.h
+++ b/drivers/bus/mhi/core/internal.h
@@ -452,6 +452,7 @@ enum mhi_pm_state {
#define PRIMARY_CMD_RING 0
#define MHI_DEV_WAKE_DB 127
#define MHI_MAX_MTU 0xffff
+#define MHI_RANDOM_U32_NONZERO(bmsk) (prandom_u32_max(bmsk) + 1)
enum mhi_er_type {
MHI_ER_TYPE_INVALID = 0x0,
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2020-05-09 2:27 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-09 2:26 [PATCH v7 0/8] Bug fixes and improved logging in MHI Bhaumik Bhatt
2020-05-09 2:26 ` [PATCH v7 1/8] bus: mhi: core: Refactor mhi queue APIs Bhaumik Bhatt
2020-05-09 5:46 ` Manivannan Sadhasivam
2020-05-09 2:26 ` [PATCH v7 2/8] bus: mhi: core: Cache intmod from mhi event to mhi channel Bhaumik Bhatt
2020-05-09 5:47 ` Manivannan Sadhasivam
2020-05-09 2:26 ` [PATCH v7 3/8] bus: mhi: core: Add range check for channel id received in event ring Bhaumik Bhatt
2020-05-09 5:48 ` Manivannan Sadhasivam
2020-05-09 2:26 ` [PATCH v7 4/8] bus: mhi: core: Read transfer length from an event properly Bhaumik Bhatt
2020-05-09 5:49 ` Manivannan Sadhasivam
2020-05-09 2:26 ` [PATCH v7 5/8] bus: mhi: core: Handle firmware load using state worker Bhaumik Bhatt
2020-05-09 5:49 ` Manivannan Sadhasivam
2020-05-09 2:26 ` [PATCH v7 6/8] bus: mhi: core: Return appropriate error codes for AMSS load failure Bhaumik Bhatt
2020-05-09 5:50 ` Manivannan Sadhasivam
2020-05-09 2:26 ` [PATCH v7 7/8] bus: mhi: core: Improve debug logs for loading firmware Bhaumik Bhatt
2020-05-09 5:50 ` Manivannan Sadhasivam
2020-05-09 2:26 ` Bhaumik Bhatt [this message]
2020-05-09 5:51 ` [PATCH v7 8/8] bus: mhi: core: Ensure non-zero session or sequence ID values are used Manivannan Sadhasivam
2020-05-09 8:32 ` [PATCH v7 0/8] Bug fixes and improved logging in MHI Manivannan Sadhasivam
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