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From: "tip-bot2 for Thomas Gleixner" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Alexandre Chartre <alexandre.chartre@oracle.com>,
	Andy Lutomirski <luto@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>, x86 <x86@kernel.org>,
	LKML <linux-kernel@vger.kernel.org>
Subject: [tip: x86/entry] x86/entry: Convert Coprocessor segment overrun exception to IDTENTRY
Date: Tue, 19 May 2020 19:58:32 -0000	[thread overview]
Message-ID: <158991831249.17951.483771477465100275.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20200505134905.838823510@linutronix.de>

The following commit has been merged into the x86/entry branch of tip:

Commit-ID:     2c1a8d98ef858628327b260362258549c816cf18
Gitweb:        https://git.kernel.org/tip/2c1a8d98ef858628327b260362258549c816cf18
Author:        Thomas Gleixner <tglx@linutronix.de>
AuthorDate:    Tue, 25 Feb 2020 23:16:20 +01:00
Committer:     Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Tue, 19 May 2020 16:04:00 +02:00

x86/entry: Convert Coprocessor segment overrun exception to IDTENTRY

Convert #OLD_MF to IDTENTRY:
  - Implement the C entry point with DEFINE_IDTENTRY
  - Emit the ASM stub with DECLARE_IDTENTRY
  - Remove the ASM idtentry in 64bit
  - Remove the open coded ASM entry code in 32bit
  - Fixup the XEN/PV code
  - Remove the old prototypes

No functional change.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
Acked-by: Andy Lutomirski <luto@kernel.org>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200505134905.838823510@linutronix.de



---
 arch/x86/entry/entry_32.S       | 7 -------
 arch/x86/entry/entry_64.S       | 1 -
 arch/x86/include/asm/idtentry.h | 1 +
 arch/x86/include/asm/traps.h    | 3 ---
 arch/x86/kernel/idt.c           | 2 +-
 arch/x86/kernel/traps.c         | 7 ++++++-
 arch/x86/xen/enlighten_pv.c     | 2 +-
 arch/x86/xen/xen-asm_64.S       | 2 +-
 8 files changed, 10 insertions(+), 15 deletions(-)

diff --git a/arch/x86/entry/entry_32.S b/arch/x86/entry/entry_32.S
index 7d7f283..916ce82 100644
--- a/arch/x86/entry/entry_32.S
+++ b/arch/x86/entry/entry_32.S
@@ -1318,13 +1318,6 @@ SYM_CODE_START(native_iret)
 SYM_CODE_END(native_iret)
 #endif
 
-SYM_CODE_START(coprocessor_segment_overrun)
-	ASM_CLAC
-	pushl	$0
-	pushl	$do_coprocessor_segment_overrun
-	jmp	common_exception
-SYM_CODE_END(coprocessor_segment_overrun)
-
 SYM_CODE_START(invalid_TSS)
 	ASM_CLAC
 	pushl	$do_invalid_TSS
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index d7cf000..423c3a9 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -1073,7 +1073,6 @@ apicinterrupt IRQ_WORK_VECTOR			irq_work_interrupt		smp_irq_work_interrupt
  */
 
 idtentry	X86_TRAP_BP		int3			do_int3				has_error_code=0
-idtentry	X86_TRAP_OLD_MF		coprocessor_segment_overrun	do_coprocessor_segment_overrun	has_error_code=0
 idtentry	X86_TRAP_TS		invalid_TSS		do_invalid_TSS			has_error_code=1
 idtentry	X86_TRAP_NP		segment_not_present	do_segment_not_present		has_error_code=1
 idtentry	X86_TRAP_SS		stack_segment		do_stack_segment		has_error_code=1
diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentry.h
index fd6f996..0c33740 100644
--- a/arch/x86/include/asm/idtentry.h
+++ b/arch/x86/include/asm/idtentry.h
@@ -82,5 +82,6 @@ DECLARE_IDTENTRY(X86_TRAP_OF,		exc_overflow);
 DECLARE_IDTENTRY(X86_TRAP_BR,		exc_bounds);
 DECLARE_IDTENTRY(X86_TRAP_UD,		exc_invalid_op);
 DECLARE_IDTENTRY(X86_TRAP_NM,		exc_device_not_available);
+DECLARE_IDTENTRY(X86_TRAP_OLD_MF,	exc_coproc_segment_overrun);
 
 #endif
diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h
index e5f2c90..5e9d402 100644
--- a/arch/x86/include/asm/traps.h
+++ b/arch/x86/include/asm/traps.h
@@ -17,7 +17,6 @@ asmlinkage void int3(void);
 #ifdef CONFIG_X86_64
 asmlinkage void double_fault(void);
 #endif
-asmlinkage void coprocessor_segment_overrun(void);
 asmlinkage void invalid_TSS(void);
 asmlinkage void segment_not_present(void);
 asmlinkage void stack_segment(void);
@@ -37,7 +36,6 @@ asmlinkage void xen_xennmi(void);
 asmlinkage void xen_xendebug(void);
 asmlinkage void xen_int3(void);
 asmlinkage void xen_double_fault(void);
-asmlinkage void xen_coprocessor_segment_overrun(void);
 asmlinkage void xen_invalid_TSS(void);
 asmlinkage void xen_segment_not_present(void);
 asmlinkage void xen_stack_segment(void);
@@ -56,7 +54,6 @@ dotraplinkage void do_debug(struct pt_regs *regs, long error_code);
 dotraplinkage void do_nmi(struct pt_regs *regs, long error_code);
 dotraplinkage void do_int3(struct pt_regs *regs, long error_code);
 dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code, unsigned long cr2);
-dotraplinkage void do_coprocessor_segment_overrun(struct pt_regs *regs, long error_code);
 dotraplinkage void do_invalid_TSS(struct pt_regs *regs, long error_code);
 dotraplinkage void do_segment_not_present(struct pt_regs *regs, long error_code);
 dotraplinkage void do_stack_segment(struct pt_regs *regs, long error_code);
diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c
index cdc2d8b..758d325 100644
--- a/arch/x86/kernel/idt.c
+++ b/arch/x86/kernel/idt.c
@@ -78,7 +78,7 @@ static const __initconst struct idt_data def_idts[] = {
 	INTG(X86_TRAP_BR,		asm_exc_bounds),
 	INTG(X86_TRAP_UD,		asm_exc_invalid_op),
 	INTG(X86_TRAP_NM,		asm_exc_device_not_available),
-	INTG(X86_TRAP_OLD_MF,		coprocessor_segment_overrun),
+	INTG(X86_TRAP_OLD_MF,		asm_exc_coproc_segment_overrun),
 	INTG(X86_TRAP_TS,		invalid_TSS),
 	INTG(X86_TRAP_NP,		segment_not_present),
 	INTG(X86_TRAP_SS,		stack_segment),
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index b8af5eb..3ce1f66 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -246,6 +246,12 @@ DEFINE_IDTENTRY(exc_invalid_op)
 	handle_invalid_op(regs);
 }
 
+DEFINE_IDTENTRY(exc_coproc_segment_overrun)
+{
+	do_error_trap(regs, 0, "coprocessor segment overrun",
+		      X86_TRAP_OLD_MF, SIGFPE, 0, NULL);
+}
+
 #define IP ((void __user *)uprobe_get_trap_addr(regs))
 #define DO_ERROR(trapnr, signr, sicode, addr, str, name)		   \
 dotraplinkage void do_##name(struct pt_regs *regs, long error_code)	   \
@@ -253,7 +259,6 @@ dotraplinkage void do_##name(struct pt_regs *regs, long error_code)	   \
 	do_error_trap(regs, error_code, str, trapnr, signr, sicode, addr); \
 }
 
-DO_ERROR(X86_TRAP_OLD_MF, SIGFPE,           0, NULL, "coprocessor segment overrun", coprocessor_segment_overrun)
 DO_ERROR(X86_TRAP_TS,     SIGSEGV,          0, NULL, "invalid TSS",         invalid_TSS)
 DO_ERROR(X86_TRAP_NP,     SIGBUS,           0, NULL, "segment not present", segment_not_present)
 DO_ERROR(X86_TRAP_SS,     SIGBUS,           0, NULL, "stack segment",       stack_segment)
diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c
index 3ca2abf..a3bfc1f 100644
--- a/arch/x86/xen/enlighten_pv.c
+++ b/arch/x86/xen/enlighten_pv.c
@@ -627,7 +627,7 @@ static struct trap_array_entry trap_array[] = {
 	TRAP_ENTRY(exc_bounds,				false ),
 	TRAP_ENTRY(exc_invalid_op,			false ),
 	TRAP_ENTRY(exc_device_not_available,		false ),
-	{ coprocessor_segment_overrun, xen_coprocessor_segment_overrun, false },
+	TRAP_ENTRY(exc_coproc_segment_overrun,		false ),
 	{ invalid_TSS,                 xen_invalid_TSS,                 false },
 	{ segment_not_present,         xen_segment_not_present,         false },
 	{ stack_segment,               xen_stack_segment,               false },
diff --git a/arch/x86/xen/xen-asm_64.S b/arch/x86/xen/xen-asm_64.S
index 5215e57..7ac9c26 100644
--- a/arch/x86/xen/xen-asm_64.S
+++ b/arch/x86/xen/xen-asm_64.S
@@ -38,7 +38,7 @@ xen_pv_trap asm_exc_bounds
 xen_pv_trap asm_exc_invalid_op
 xen_pv_trap asm_exc_device_not_available
 xen_pv_trap double_fault
-xen_pv_trap coprocessor_segment_overrun
+xen_pv_trap asm_exc_coproc_segment_overrun
 xen_pv_trap invalid_TSS
 xen_pv_trap segment_not_present
 xen_pv_trap stack_segment

  parent reply	other threads:[~2020-05-19 20:01 UTC|newest]

Thread overview: 129+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-05 13:43 [patch V4 part 3 00/29] x86/entry: Entry/exception code rework, simple exceptions Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 01/29] x86/traps: Mark fixup_bad_iret() noinstr Thomas Gleixner
2020-05-09  0:39   ` Andy Lutomirski
2020-05-13  1:51     ` Steven Rostedt
2020-05-14  0:41       ` Mathieu Desnoyers
2020-05-14  1:35         ` Andy Lutomirski
2020-05-11 12:28   ` Masami Hiramatsu
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 02/29] x86/traps: Mark sync_regs() noinstr Thomas Gleixner
2020-05-09  0:39   ` Andy Lutomirski
2020-05-11 12:08   ` Masami Hiramatsu
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 03/29] x86/entry: Disable interrupts for native_load_gs_index() in C code Thomas Gleixner
2020-05-09  0:40   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 04/29] x86/traps: Make interrupt enable/disable symmetric " Thomas Gleixner
2020-05-07 15:25   ` Alexandre Chartre
2020-05-07 17:14     ` Thomas Gleixner
2020-05-09  0:44   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:43 ` [patch V4 part 3 05/29] x86/traps: Split trap numbers out in a seperate header Thomas Gleixner
2020-05-07 15:34   ` Alexandre Chartre
2020-05-19 19:58   ` [tip: x86/entry] x86/traps: Split trap numbers out in a separate header tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 06/29] x86/entry/64: Reorder idtentries Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 07/29] x86/entry: Distangle idtentry Thomas Gleixner
2020-05-10 20:31   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 08/29] x86/entry/64: Provide sane error entry/exit Thomas Gleixner
2020-05-10 21:02   ` Andy Lutomirski
2020-05-13  2:10   ` Steven Rostedt
2020-05-13  6:35     ` Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 09/29] x86/entry/32: Provide macro to emit IDT entry stubs Thomas Gleixner
2020-05-11  0:55   ` Andy Lutomirski
2020-05-14  1:44   ` Mathieu Desnoyers
2020-05-14  4:31     ` Andy Lutomirski
2020-05-14 13:38       ` Mathieu Desnoyers
2020-05-14 14:08         ` Thomas Gleixner
2020-05-14 14:43           ` Mathieu Desnoyers
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 10/29] x86/idtentry: Provide macros to define/declare IDT entry points Thomas Gleixner
2020-05-11  0:58   ` Andy Lutomirski
2020-05-11 10:39     ` Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 11/29] rcu: Provide rcu_irq_exit_preempt() Thomas Gleixner
2020-05-05 22:02   ` Paul E. McKenney
2020-05-05 22:05     ` Thomas Gleixner
2020-05-05 22:24       ` Paul E. McKenney
2020-05-14  1:03   ` Mathieu Desnoyers
2020-05-14  2:41   ` Joel Fernandes
2020-05-14  2:46     ` Joel Fernandes
2020-05-14 14:43     ` Thomas Gleixner
2020-05-15 19:00       ` Joel Fernandes
2020-05-19 19:52   ` [tip: core/rcu] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 12/29] x86/entry/common: Provide idtentry_enter/exit() Thomas Gleixner
2020-05-07 16:27   ` Alexandre Chartre
2020-05-11  4:34   ` Andy Lutomirski
2020-05-11 10:59     ` [patch V5 " Thomas Gleixner
2020-05-11 15:31       ` Andy Lutomirski
2020-05-11 18:42         ` Thomas Gleixner
2020-05-12 16:49           ` [patch V6 " Thomas Gleixner
2020-05-14  0:51             ` Andy Lutomirski
2020-05-14  1:08   ` [patch V4 " Mathieu Desnoyers
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 13/29] x86/traps: Prepare for using DEFINE_IDTENTRY Thomas Gleixner
2020-05-14  4:37   ` Andy Lutomirski
2020-05-14 12:16     ` Thomas Gleixner
2020-05-14 12:33       ` Peter Zijlstra
2020-05-15 13:42       ` Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 14/29] x86/entry: Convert Divide Error to IDTENTRY Thomas Gleixner
2020-05-14  4:38   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-10-11 15:25     ` Dmitry Vyukov
2020-10-11 17:50       ` Thomas Gleixner
2020-10-12 13:19       ` [tip: x86/urgent] x86/traps: Fix #DE Oops message regression tip-bot2 for Thomas Gleixner
2020-10-12 20:30       ` [tip: x86/entry] x86/entry: Convert Divide Error to IDTENTRY Kees Cook
2020-10-13 10:19         ` Dmitry Vyukov
2020-10-13 17:41       ` [tip: x86/urgent] x86/traps: Fix #DE Oops message regression tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 15/29] x86/entry: Convert Overflow exception to IDTENTRY Thomas Gleixner
2020-05-14  4:39   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 16/29] x86/entry: Convert Bounds " Thomas Gleixner
2020-05-14  4:42   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 17/29] x86/entry: Convert Invalid Opcode " Thomas Gleixner
2020-05-14  4:45   ` Andy Lutomirski
2020-05-14 12:33     ` Thomas Gleixner
2020-05-14 15:00       ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 18/29] x86/entry: Convert Device not available " Thomas Gleixner
2020-05-14  4:45   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 19/29] x86/entry: Convert Coprocessor segment overrun " Thomas Gleixner
2020-05-14  4:46   ` Andy Lutomirski
2020-05-05 13:44 ` [patch V4 part 3 20/29] x86/entry: Provide IDTENTRY_ERRORCODE Thomas Gleixner
2020-05-14  4:46   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] x86/idtentry: " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 21/29] x86/entry: Convert Invalid TSS exception to IDTENTRY Thomas Gleixner
2020-05-14  4:48   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 22/29] x86/entry: Convert Segment not present " Thomas Gleixner
2020-05-14  4:47   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 23/29] x86/entry: Convert Stack segment " Thomas Gleixner
2020-05-14  4:49   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 24/29] x86/entry: Convert General protection " Thomas Gleixner
2020-05-14  4:50   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 25/29] x86/entry: Convert Spurious interrupt bug " Thomas Gleixner
2020-05-14  4:47   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 26/29] x86/entry: Convert Coprocessor error " Thomas Gleixner
2020-05-14  4:49   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-19 19:58   ` tip-bot2 for Thomas Gleixner [this message]
2020-05-05 13:44 ` [patch V4 part 3 27/29] x86/entry: Convert Alignment check " Thomas Gleixner
2020-05-14  4:50   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 28/29] x86/entry: Convert SIMD coprocessor error " Thomas Gleixner
2020-05-14  4:56   ` Andy Lutomirski
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner
2020-05-05 13:44 ` [patch V4 part 3 29/29] x86/entry/32: Convert IRET exception to IDTENTRY_SW Thomas Gleixner
2020-05-07 16:47   ` Alexandre Chartre
2020-05-14  4:54   ` Andy Lutomirski
2020-05-15 14:11     ` Thomas Gleixner
2020-05-19 19:58   ` [tip: x86/entry] " tip-bot2 for Thomas Gleixner

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