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MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS32DR.mediatek.inc (172.27.6.104) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 25 May 2020 14:24:04 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 25 May 2020 14:24:04 +0800 Message-ID: <1590387743.13912.11.camel@mhfsdcap03> Subject: Re: [PATCH v3 4/7] iommu/mediatek: Move inv_sel_reg into the plat_data From: Yong Wu To: Chao Hao CC: Joerg Roedel , Rob Herring , Matthias Brugger , , , , , , , FY Yang , Jun Yan Date: Mon, 25 May 2020 14:22:23 +0800 In-Reply-To: <20200509083654.5178-5-chao.hao@mediatek.com> References: <20200509083654.5178-1-chao.hao@mediatek.com> <20200509083654.5178-5-chao.hao@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: 92AFEB32F57DC18BC921CA743F7ED817C952B9384976B2765F29D5F4525EE1A02000:8 X-MTK: N Content-Transfer-Encoding: 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[1.203.163.81]) by fraxinus.osuosl.org (Postfix) with ESMTP id DF29D8641E for ; Mon, 25 May 2020 06:29:14 +0000 (UTC) X-UUID: dc3d5c5a54ba4ee3bd05c71fa17d7cfb-20200525 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=P1I8TepixZCqsFw/5SDkpIp4t3EBgZjjh17TkYpSIn0=; b=O46lawTeob/nLYdbqT5TlZGztNQNKqS0Nyyrh1WRftTrCWvWvBl3ZjxTqKnHeTtHe7ZyjScxXunVYnttekCchCl3OsTbqDyHn3b9oPelNaQGp7L4hM4TVdu3+KTJnCVy58RpIiTrwHjPEhOiAeYnekxPqmbn9AKeL7Ol/E1LV3U=; X-UUID: dc3d5c5a54ba4ee3bd05c71fa17d7cfb-20200525 Received: from mtkcas32.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 775050014; Mon, 25 May 2020 14:24:05 +0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS32DR.mediatek.inc (172.27.6.104) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 25 May 2020 14:24:04 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 25 May 2020 14:24:04 +0800 Message-ID: <1590387743.13912.11.camel@mhfsdcap03> Subject: Re: [PATCH v3 4/7] iommu/mediatek: Move inv_sel_reg into the plat_data From: Yong Wu To: Chao Hao Date: Mon, 25 May 2020 14:22:23 +0800 In-Reply-To: <20200509083654.5178-5-chao.hao@mediatek.com> References: <20200509083654.5178-1-chao.hao@mediatek.com> <20200509083654.5178-5-chao.hao@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: 92AFEB32F57DC18BC921CA743F7ED817C952B9384976B2765F29D5F4525EE1A02000:8 X-MTK: N Cc: devicetree@vger.kernel.org, FY Yang , wsd_upstream@mediatek.com, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , Jun Yan , linux-arm-kernel@lists.infradead.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" On Sat, 2020-05-09 at 16:36 +0800, Chao Hao wrote: > For mt6779, MMU_INVLDT_SEL register's offset is changed from At this patch, the register is still called by "MMU_INV_SEL". > 0x38 to 0x2c, so we can put inv_sel_reg in the plat_data to > use it. > In addition, we renamed it to REG_MMU_INV_SEL_GEN1 and use it > before mt6779. > > Signed-off-by: Chao Hao > --- > drivers/iommu/mtk_iommu.c | 9 ++++++--- > drivers/iommu/mtk_iommu.h | 1 + > 2 files changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > index 9ede327a418d..d73de987f8be 100644 > --- a/drivers/iommu/mtk_iommu.c > +++ b/drivers/iommu/mtk_iommu.c > @@ -37,7 +37,7 @@ > #define REG_MMU_INVLD_START_A 0x024 > #define REG_MMU_INVLD_END_A 0x028 > > -#define REG_MMU_INV_SEL 0x038 > +#define REG_MMU_INV_SEL_GEN1 0x038 > #define F_INVLD_EN0 BIT(0) > #define F_INVLD_EN1 BIT(1) > > @@ -167,7 +167,7 @@ static void mtk_iommu_tlb_flush_all(void *cookie) > > for_each_m4u(data) { > writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0, > - data->base + REG_MMU_INV_SEL); > + data->base + data->plat_data->inv_sel_reg); > writel_relaxed(F_ALL_INVLD, data->base + REG_MMU_INVALIDATE); > wmb(); /* Make sure the tlb flush all done */ > } > @@ -184,7 +184,7 @@ static void mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size, > for_each_m4u(data) { > spin_lock_irqsave(&data->tlb_lock, flags); > writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0, > - data->base + REG_MMU_INV_SEL); > + data->base + data->plat_data->inv_sel_reg); > > writel_relaxed(iova, data->base + REG_MMU_INVLD_START_A); > writel_relaxed(iova + size - 1, > @@ -784,6 +784,7 @@ static const struct mtk_iommu_plat_data mt2712_data = { > .has_4gb_mode = true, > .has_bclk = true, > .has_vld_pa_rng = true, > + .inv_sel_reg = REG_MMU_INV_SEL_GEN1, nitpick: align '=' with the next line. > .larbid_remap = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9}, > }; > > @@ -792,12 +793,14 @@ static const struct mtk_iommu_plat_data mt8173_data = { > .has_4gb_mode = true, > .has_bclk = true, > .reset_axi = true, > + .inv_sel_reg = REG_MMU_INV_SEL_GEN1, align '=' > .larbid_remap = {0, 1, 2, 3, 4, 5}, /* Linear mapping. */ > }; > > static const struct mtk_iommu_plat_data mt8183_data = { > .m4u_plat = M4U_MT8183, > .reset_axi = true, > + .inv_sel_reg = REG_MMU_INV_SEL_GEN1, > .larbid_remap = {0, 4, 5, 6, 7, 2, 3, 1}, > }; > > diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h > index d711ac630037..afd7a2de5c1e 100644 > --- a/drivers/iommu/mtk_iommu.h > +++ b/drivers/iommu/mtk_iommu.h > @@ -43,6 +43,7 @@ struct mtk_iommu_plat_data { > bool has_misc_ctrl; > bool has_vld_pa_rng; > bool reset_axi; > + u32 inv_sel_reg; > unsigned char larbid_remap[MTK_LARB_NR_MAX]; > }; > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_SANE_2 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8DE1CC433DF for ; Mon, 25 May 2020 06:27:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) 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+0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 25 May 2020 14:24:04 +0800 Message-ID: <1590387743.13912.11.camel@mhfsdcap03> Subject: Re: [PATCH v3 4/7] iommu/mediatek: Move inv_sel_reg into the plat_data From: Yong Wu To: Chao Hao Date: Mon, 25 May 2020 14:22:23 +0800 In-Reply-To: <20200509083654.5178-5-chao.hao@mediatek.com> References: <20200509083654.5178-1-chao.hao@mediatek.com> <20200509083654.5178-5-chao.hao@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: 92AFEB32F57DC18BC921CA743F7ED817C952B9384976B2765F29D5F4525EE1A02000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200524_232724_905728_64D0910B X-CRM114-Status: GOOD ( 15.72 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, FY Yang , wsd_upstream@mediatek.com, Joerg Roedel , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , Jun Yan , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Sat, 2020-05-09 at 16:36 +0800, Chao Hao wrote: > For mt6779, MMU_INVLDT_SEL register's offset is changed from At this patch, the register is still called by "MMU_INV_SEL". > 0x38 to 0x2c, so we can put inv_sel_reg in the plat_data to > use it. > In addition, we renamed it to REG_MMU_INV_SEL_GEN1 and use it > before mt6779. > > Signed-off-by: Chao Hao > --- > drivers/iommu/mtk_iommu.c | 9 ++++++--- > drivers/iommu/mtk_iommu.h | 1 + > 2 files changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > index 9ede327a418d..d73de987f8be 100644 > --- a/drivers/iommu/mtk_iommu.c > +++ b/drivers/iommu/mtk_iommu.c > @@ -37,7 +37,7 @@ > #define REG_MMU_INVLD_START_A 0x024 > #define REG_MMU_INVLD_END_A 0x028 > > -#define REG_MMU_INV_SEL 0x038 > +#define REG_MMU_INV_SEL_GEN1 0x038 > #define F_INVLD_EN0 BIT(0) > #define F_INVLD_EN1 BIT(1) > > @@ -167,7 +167,7 @@ static void mtk_iommu_tlb_flush_all(void *cookie) > > for_each_m4u(data) { > writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0, > - data->base + REG_MMU_INV_SEL); > + data->base + data->plat_data->inv_sel_reg); > writel_relaxed(F_ALL_INVLD, data->base + REG_MMU_INVALIDATE); > wmb(); /* Make sure the tlb flush all done */ > } > @@ -184,7 +184,7 @@ static void mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size, > for_each_m4u(data) { > spin_lock_irqsave(&data->tlb_lock, flags); > writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0, > - data->base + REG_MMU_INV_SEL); > + data->base + data->plat_data->inv_sel_reg); > > writel_relaxed(iova, data->base + REG_MMU_INVLD_START_A); > writel_relaxed(iova + size - 1, > @@ -784,6 +784,7 @@ static const struct mtk_iommu_plat_data mt2712_data = { > .has_4gb_mode = true, > .has_bclk = true, > .has_vld_pa_rng = true, > + .inv_sel_reg = REG_MMU_INV_SEL_GEN1, nitpick: align '=' with the next line. > .larbid_remap = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9}, > }; > > @@ -792,12 +793,14 @@ static const struct mtk_iommu_plat_data mt8173_data = { > .has_4gb_mode = true, > .has_bclk = true, > .reset_axi = true, > + .inv_sel_reg = REG_MMU_INV_SEL_GEN1, align '=' > .larbid_remap = {0, 1, 2, 3, 4, 5}, /* Linear mapping. */ > }; > > static const struct mtk_iommu_plat_data mt8183_data = { > .m4u_plat = M4U_MT8183, > .reset_axi = true, > + .inv_sel_reg = REG_MMU_INV_SEL_GEN1, > .larbid_remap = {0, 4, 5, 6, 7, 2, 3, 1}, > }; > > diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h > index d711ac630037..afd7a2de5c1e 100644 > --- a/drivers/iommu/mtk_iommu.h > +++ b/drivers/iommu/mtk_iommu.h > @@ -43,6 +43,7 @@ struct mtk_iommu_plat_data { > bool has_misc_ctrl; > bool has_vld_pa_rng; > bool reset_axi; > + u32 inv_sel_reg; > unsigned char larbid_remap[MTK_LARB_NR_MAX]; > }; > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,USER_AGENT_SANE_2 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04EAFC433DF for ; Mon, 25 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bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jd6a4-0002sD-Rm; Mon, 25 May 2020 06:27:26 +0000 X-UUID: c1652ce0a9c0403ba4ca3c6ac127711a-20200524 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=P1I8TepixZCqsFw/5SDkpIp4t3EBgZjjh17TkYpSIn0=; b=O46lawTeob/nLYdbqT5TlZGztNQNKqS0Nyyrh1WRftTrCWvWvBl3ZjxTqKnHeTtHe7ZyjScxXunVYnttekCchCl3OsTbqDyHn3b9oPelNaQGp7L4hM4TVdu3+KTJnCVy58RpIiTrwHjPEhOiAeYnekxPqmbn9AKeL7Ol/E1LV3U=; X-UUID: c1652ce0a9c0403ba4ca3c6ac127711a-20200524 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1870454957; Sun, 24 May 2020 22:27:22 -0800 Received: from MTKMBS32DR.mediatek.inc (172.27.6.104) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 24 May 2020 23:24:09 -0700 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS32DR.mediatek.inc (172.27.6.104) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 25 May 2020 14:24:04 +0800 Received: from [10.17.3.153] (10.17.3.153) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 25 May 2020 14:24:04 +0800 Message-ID: <1590387743.13912.11.camel@mhfsdcap03> Subject: Re: [PATCH v3 4/7] iommu/mediatek: Move inv_sel_reg into the plat_data From: Yong Wu To: Chao Hao Date: Mon, 25 May 2020 14:22:23 +0800 In-Reply-To: <20200509083654.5178-5-chao.hao@mediatek.com> References: <20200509083654.5178-1-chao.hao@mediatek.com> <20200509083654.5178-5-chao.hao@mediatek.com> X-Mailer: Evolution 3.10.4-0ubuntu2 MIME-Version: 1.0 X-TM-SNTS-SMTP: 92AFEB32F57DC18BC921CA743F7ED817C952B9384976B2765F29D5F4525EE1A02000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200524_232724_905728_64D0910B X-CRM114-Status: GOOD ( 15.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, FY Yang , wsd_upstream@mediatek.com, Joerg Roedel , linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, Rob Herring , linux-mediatek@lists.infradead.org, Matthias Brugger , Jun Yan , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sat, 2020-05-09 at 16:36 +0800, Chao Hao wrote: > For mt6779, MMU_INVLDT_SEL register's offset is changed from At this patch, the register is still called by "MMU_INV_SEL". > 0x38 to 0x2c, so we can put inv_sel_reg in the plat_data to > use it. > In addition, we renamed it to REG_MMU_INV_SEL_GEN1 and use it > before mt6779. > > Signed-off-by: Chao Hao > --- > drivers/iommu/mtk_iommu.c | 9 ++++++--- > drivers/iommu/mtk_iommu.h | 1 + > 2 files changed, 7 insertions(+), 3 deletions(-) > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c > index 9ede327a418d..d73de987f8be 100644 > --- a/drivers/iommu/mtk_iommu.c > +++ b/drivers/iommu/mtk_iommu.c > @@ -37,7 +37,7 @@ > #define REG_MMU_INVLD_START_A 0x024 > #define REG_MMU_INVLD_END_A 0x028 > > -#define REG_MMU_INV_SEL 0x038 > +#define REG_MMU_INV_SEL_GEN1 0x038 > #define F_INVLD_EN0 BIT(0) > #define F_INVLD_EN1 BIT(1) > > @@ -167,7 +167,7 @@ static void mtk_iommu_tlb_flush_all(void *cookie) > > for_each_m4u(data) { > writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0, > - data->base + REG_MMU_INV_SEL); > + data->base + data->plat_data->inv_sel_reg); > writel_relaxed(F_ALL_INVLD, data->base + REG_MMU_INVALIDATE); > wmb(); /* Make sure the tlb flush all done */ > } > @@ -184,7 +184,7 @@ static void mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size, > for_each_m4u(data) { > spin_lock_irqsave(&data->tlb_lock, flags); > writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0, > - data->base + REG_MMU_INV_SEL); > + data->base + data->plat_data->inv_sel_reg); > > writel_relaxed(iova, data->base + REG_MMU_INVLD_START_A); > writel_relaxed(iova + size - 1, > @@ -784,6 +784,7 @@ static const struct mtk_iommu_plat_data mt2712_data = { > .has_4gb_mode = true, > .has_bclk = true, > .has_vld_pa_rng = true, > + .inv_sel_reg = REG_MMU_INV_SEL_GEN1, nitpick: align '=' with the next line. > .larbid_remap = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9}, > }; > > @@ -792,12 +793,14 @@ static const struct mtk_iommu_plat_data mt8173_data = { > .has_4gb_mode = true, > .has_bclk = true, > .reset_axi = true, > + .inv_sel_reg = REG_MMU_INV_SEL_GEN1, align '=' > .larbid_remap = {0, 1, 2, 3, 4, 5}, /* Linear mapping. */ > }; > > static const struct mtk_iommu_plat_data mt8183_data = { > .m4u_plat = M4U_MT8183, > .reset_axi = true, > + .inv_sel_reg = REG_MMU_INV_SEL_GEN1, > .larbid_remap = {0, 4, 5, 6, 7, 2, 3, 1}, > }; > > diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h > index d711ac630037..afd7a2de5c1e 100644 > --- a/drivers/iommu/mtk_iommu.h > +++ b/drivers/iommu/mtk_iommu.h > @@ -43,6 +43,7 @@ struct mtk_iommu_plat_data { > bool has_misc_ctrl; > bool has_vld_pa_rng; > bool reset_axi; > + u32 inv_sel_reg; > unsigned char larbid_remap[MTK_LARB_NR_MAX]; > }; > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel