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S2390325AbgFXIIZ (ORCPT ); Wed, 24 Jun 2020 04:08:25 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:64628 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2387732AbgFXIIT (ORCPT ); Wed, 24 Jun 2020 04:08:19 -0400 X-UUID: 199102f603f84d1f8ba3d2693085b402-20200624 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:MIME-Version:Content-Type:References:In-Reply-To:Date:CC:To:From:Subject:Message-ID; bh=CCHMN9qL4dQrHQnU3AHaAsV5OJrodyKmwwPg4tWH3tE=; b=MEuxbop/JpAXJ0d6xapQLAULCpnLWnfoh+nrZHmwgO4vHzvLotucZEFn8hqZYEPfB9gSgOpM6TTQPx96JYqVpN+qpoSUHJdt+sKckh0CoFXU+F6DNL4hKXUz/n1VF6EzK1UsyAQbyCj1caYGnKmnaIB78UOaMjtebIU/+Q9O3xQ=; X-UUID: 199102f603f84d1f8ba3d2693085b402-20200624 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1837080630; Wed, 24 Jun 2020 16:08:02 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 24 Jun 2020 16:07:58 +0800 Received: from [172.21.77.33] (172.21.77.33) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 24 Jun 2020 16:07:58 +0800 Message-ID: <1592986080.14160.11.camel@mtkswgap22> Subject: Re: [PATCH v2 2/2] soc: mediatek: devapc: add devapc-mt6873 driver From: Neal Liu To: Matthias Brugger CC: Neal Liu , Rob Herring , , , , , Date: Wed, 24 Jun 2020 16:08:00 +0800 In-Reply-To: <0c8a88a5-3caa-b121-87ee-3396d204fb1b@gmail.com> References: <1592559720-8482-1-git-send-email-neal.liu@mediatek.com> <1592559720-8482-3-git-send-email-neal.liu@mediatek.com> <0c8a88a5-3caa-b121-87ee-3396d204fb1b@gmail.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-TM-SNTS-SMTP: 95BCE145C111093D0D4FF93E0CD196F31928225984C736B56976269825C62F702000:8 X-MTK: N Content-Transfer-Encoding: base64 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org T24gTW9uLCAyMDIwLTA2LTIyIGF0IDEyOjA1ICswMjAwLCBNYXR0aGlhcyBCcnVnZ2VyIHdyb3Rl Og0KPiANCj4gT24gMTkvMDYvMjAyMCAxMTo0MiwgTmVhbCBMaXUgd3JvdGU6DQo+ID4gTVQ2ODcz IGJ1cyBmcmFicmljIHByb3ZpZGVzIFRydXN0Wm9uZSBzZWN1cml0eSBzdXBwb3J0IGFuZCBkYXRh DQo+ID4gcHJvdGVjdGlvbiB0byBwcmV2ZW50IHNsYXZlcyBmcm9tIGJlaW5nIGFjY2Vzc2VkIGJ5 IHVuZXhwZWN0ZWQNCj4gPiBtYXN0ZXJzLg0KPiA+IFRoZSBzZWN1cml0eSB2aW9sYXRpb25zIGFy ZSBsb2dnZWQgYW5kIHNlbnQgdG8gdGhlIHByb2Nlc3NvciBmb3INCj4gPiBmdXJ0aGVyIGFuYWx5 c2lzIG9yIGNvdW50ZXJtZWFzdXJlcy4NCj4gPiANCj4gPiBBbnkgb2NjdXJyZW5jZSBvZiBzZWN1 cml0eSB2aW9sYXRpb24gd291bGQgcmFpc2UgYW4gaW50ZXJydXB0LCBhbmQNCj4gPiBpdCB3aWxs IGJlIGhhbmRsZWQgYnkgZGV2YXBjLW10Njg3MyBkcml2ZXIuIFRoZSB2aW9sYXRpb24NCj4gPiBp bmZvcm1hdGlvbiBpcyBwcmludGVkIGluIG9yZGVyIHRvIGZpbmQgdGhlIG11cmRlcmVyLg0KPiAN Cj4gV2h5IGRvbid0IHdlIGhhbmRsZSB0aGlzIGluIHRoZSBUcnVzdFpvbmUgZGlyZWN0bHk/DQoN ClRoZXJlIGlzIG5vIHJlYXNvbiB0aGF0IGl0IHNob3VsZCBiZSBoYW5kbGVkIGluIFRydXN0Wm9u ZSBvbmx5LiBBbmQgaXQNCmhhcyBubyBzZWN1cml0eSBpc3N1ZSB0byBoYW5kbGUgaXQgaW4gTm9y bWFsIFdvcmxkLg0KDQo+IA0KPiA+IA0KPiA+IFNpZ25lZC1vZmYtYnk6IE5lYWwgTGl1IDxuZWFs LmxpdUBtZWRpYXRlay5jb20+DQo+IA0KPiBUaGlzIGlzIGEgcmVhbGx5IGJpZyBwYXRjaCBhbmQg aXQgd2lsbCBiZSBkaWZmaWN1bHQgdG8gcmV2aWV3Lg0KPiANCj4gUGxlYXNlIGRvIHJldmlldyB0 aGUgY29kZSBhbmQgZGVsZXRlIGFsbCB0aGUgZGF0YSBzdHJ1Y3R1cmVzIHRoYXQgYXJlIG5vdCB1 c2VkDQo+IChJIGFscmVhZHkgZm91bmQgdHdvKS4NCj4gDQo+IFBsZWFzZSBhbHNvIGNoZWNrIGZv ciBjb2RlIGR1cGxpY2F0aW9uIChlLmcuIGNoZWNrX3Zpb19tYXNrIGFuZCBjaGVja192aW9fc3Rh dHVzDQo+IGFyZSB1c2luZyA5OSUgdGhlIHNhbWUgY29kZSkuDQo+IA0KPiBQbGVhc2UgcmV2aWV3 IHlvdXIgZGF0YSBzdHJ1Y3R1cmVzIGFuZCB0cnkgdG8gZ3JvdXAgdGhlIGluZm9ybWF0aW9uIGlu IGxvZ2ljYWwNCj4gc3RydWN0cy4gRm9yIGV4YW1wbGUgSSBkb24ndCB1bmRlcnN0YW5kIHdoeSB3 ZSBuZWVkIG10a19kZXZhcGNfY29udGV4dC4gSXQgc2VlbXMNCj4gdG8gbWUgdGhhdCBhbGwgdGhl IHZhbHVlcyBpbiB0aGVyZSBhcmUgU29DIHNwZWNpZmljLg0KPiANCj4gVGhpbmsgaG93IHlvdSBj b3VsZCBzcGxpdCB0aGUgZHJpdmVyIHVwIGluIHNldmVyYWwgY29tbWl0cyBhZGRpbmcgbW9yZQ0K PiBmdW5jdGlvbmFsaXR5IGJ5IGVhY2ggY29tbWl0LiBXaXRoIGEgZ29vZCBjb21taXQgbWVzc2Fn ZSBpdCB3aWxsIGJlIGVhc2llciB0bw0KPiB1bmRlcnN0YW5kIHdoYXQgdGhlIGNvZGUgZG9lcy4N Cj4gDQoNClRoYW5rcyBmb3IgeW91ciBhbGwgc3VnZ2VzdGlvbiwgaXQncyByZWFsbHkgaGVscGZ1 bC4gSSdsbCByZXZpZXcgYWdhaW4NCmFuZCB0cnkgdG8gbWFrZSBwYXRjaGVzIG1vcmUgcmVhZGFi bGUuDQoNCj4gT24gd2hpY2ggU29DIGlzIHRoZSBkZXZpY2UgdXNlZD8gSSBkb24ndCBzZWUgYW55 IHN1cHBvcnQgZm9yIG10Njg3MyBpbiB0aGUNCj4ga2VybmVsIG9yIHRoZSBtYWlsaW5nIGxpc3Qu IFdoeSBkbyB3ZSB3YW50IHRvIHN1cHBvcnQgdGhpcyBkcml2ZXIgdXBzdHJlYW0gaWYNCj4gaXQn cyBub3QgdXNhYmxlIGF0IGFsbD8NCj4gDQoNCk91ciBtdDY4NzMgdXBzdHJlYW0gdGFza3MgaXMg b24gZ29pbmcsIHdlJ2xsIHNlbmQgYmFzaWMgcGxhdGZvcm0gZHJpdmVycw0KQVNBUC4NCg0KPiBU cnkgdG8gdW5kZXJzdGFuZCBob3cgdGhlIHVwc3RyZWFtIGtlcm5lbCBkZXZpY2UgbW9kZWwgd29y a3MuIEl0IGxvb2tzIHRvIG1lIGFzDQo+IGlmIGFsbCB0aGUgaW5mb3JtYXRpb24gaXMgaGFyZGNv ZGVkLiBXb3VsZCBpdCBtYWtlIHNlbnNlIHRvIHBhc3Mgc29tZSBvZiB0aGUNCj4gaW5mb3JtYXRp b24gdmlhIERUPyBTb3JyeSBmb3IgdGhlIGdlbmVyaWMgcXVlc3Rpb24sIGJ1dCBJIGhhZG4ndCBo YWQgdGhlIHRpbWUgdG8NCj4gZ290IHRocm91Z2ggdGhlIHdob2xlIGRyaXZlciB0byB1bmRlcnN0 YW5kIHdoYXQgaXQgZG9lcy4NCj4gDQo+IFJlZ2FyZHMsDQo+IE1hdHRoaWFzDQo+IA0KPiA+IC0t LQ0KPiA+ICBkcml2ZXJzL3NvYy9tZWRpYXRlay9LY29uZmlnICAgICAgICAgICAgICAgICAgICAg IHwgICAgNiArDQo+ID4gIGRyaXZlcnMvc29jL21lZGlhdGVrL01ha2VmaWxlICAgICAgICAgICAg ICAgICAgICAgfCAgICAxICsNCj4gPiAgZHJpdmVycy9zb2MvbWVkaWF0ZWsvZGV2YXBjL0tjb25m aWcgICAgICAgICAgICAgICB8ICAgMjUgKw0KPiA+ICBkcml2ZXJzL3NvYy9tZWRpYXRlay9kZXZh cGMvTWFrZWZpbGUgICAgICAgICAgICAgIHwgICAxMyArDQo+ID4gIGRyaXZlcnMvc29jL21lZGlh dGVrL2RldmFwYy9kZXZhcGMtbXQ2ODczLmMgICAgICAgfCAxNjUyICsrKysrKysrKysrKysrKysr KysrKw0KPiA+ICBkcml2ZXJzL3NvYy9tZWRpYXRlay9kZXZhcGMvZGV2YXBjLW10Njg3My5oICAg ICAgIHwgIDExMSArKw0KPiA+ICBkcml2ZXJzL3NvYy9tZWRpYXRlay9kZXZhcGMvZGV2YXBjLW10 ay1tdWx0aS1hby5jIHwgIDc1NiArKysrKysrKysrDQo+ID4gIGRyaXZlcnMvc29jL21lZGlhdGVr L2RldmFwYy9kZXZhcGMtbXRrLW11bHRpLWFvLmggfCAgMTgyICsrKw0KPiA+ICA4IGZpbGVzIGNo YW5nZWQsIDI3NDYgaW5zZXJ0aW9ucygrKQ0KPiA+ICBjcmVhdGUgbW9kZSAxMDA2NDQgZHJpdmVy cy9zb2MvbWVkaWF0ZWsvZGV2YXBjL0tjb25maWcNCj4gPiAgY3JlYXRlIG1vZGUgMTAwNjQ0IGRy aXZlcnMvc29jL21lZGlhdGVrL2RldmFwYy9NYWtlZmlsZQ0KPiA+ICBjcmVhdGUgbW9kZSAxMDA2 NDQgZHJpdmVycy9zb2MvbWVkaWF0ZWsvZGV2YXBjL2RldmFwYy1tdDY4NzMuYw0KPiA+ICBjcmVh dGUgbW9kZSAxMDA2NDQgZHJpdmVycy9zb2MvbWVkaWF0ZWsvZGV2YXBjL2RldmFwYy1tdDY4NzMu aA0KPiA+ICBjcmVhdGUgbW9kZSAxMDA2NDQgZHJpdmVycy9zb2MvbWVkaWF0ZWsvZGV2YXBjL2Rl dmFwYy1tdGstbXVsdGktYW8uYw0KPiA+ICBjcmVhdGUgbW9kZSAxMDA2NDQgZHJpdmVycy9zb2Mv bWVkaWF0ZWsvZGV2YXBjL2RldmFwYy1tdGstbXVsdGktYW8uaA0KPiA+IA0KPiA+IGRpZmYgLS1n aXQgYS9kcml2ZXJzL3NvYy9tZWRpYXRlay9LY29uZmlnIGIvZHJpdmVycy9zb2MvbWVkaWF0ZWsv S2NvbmZpZw0KPiA+IGluZGV4IDU5YTU2Y2QuLjJjOWFkMWYgMTAwNjQ0DQo+ID4gLS0tIGEvZHJp dmVycy9zb2MvbWVkaWF0ZWsvS2NvbmZpZw0KPiA+ICsrKyBiL2RyaXZlcnMvc29jL21lZGlhdGVr L0tjb25maWcNCj4gPiBAQCAtNTEsNCArNTEsMTAgQEAgY29uZmlnIE1US19NTVNZUw0KPiA+ICAJ ICBTYXkgeWVzIGhlcmUgdG8gYWRkIHN1cHBvcnQgZm9yIHRoZSBNZWRpYVRlayBNdWx0aW1lZGlh DQo+ID4gIAkgIFN1YnN5c3RlbSAoTU1TWVMpLg0KPiA+ICANCj4gPiArbWVudSAiU2VjdXJpdHki DQo+ID4gKw0KPiA+ICtzb3VyY2UgImRyaXZlcnMvc29jL21lZGlhdGVrL2RldmFwYy9LY29uZmln Ig0KPiA+ICsNCj4gPiArZW5kbWVudSAjIFNlY3VyaXR5DQo+ID4gKw0KPiA+ICBlbmRtZW51DQo+ ID4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvc29jL21lZGlhdGVrL01ha2VmaWxlIGIvZHJpdmVycy9z b2MvbWVkaWF0ZWsvTWFrZWZpbGUNCj4gPiBpbmRleCAwMWY5Zjg3Li5kNjcxN2E4MSAxMDA2NDQN Cj4gPiAtLS0gYS9kcml2ZXJzL3NvYy9tZWRpYXRlay9NYWtlZmlsZQ0KPiA+ICsrKyBiL2RyaXZl cnMvc29jL21lZGlhdGVrL01ha2VmaWxlDQo+ID4gQEAgLTEsNSArMSw2IEBADQo+ID4gICMgU1BE WC1MaWNlbnNlLUlkZW50aWZpZXI6IEdQTC0yLjAtb25seQ0KPiA+ICBvYmotJChDT05GSUdfTVRL X0NNRFEpICs9IG10ay1jbWRxLWhlbHBlci5vDQo+ID4gK29iai0kKENPTkZJR19NVEtfREVWQVBD KSArPSBkZXZhcGMvDQo+ID4gIG9iai0kKENPTkZJR19NVEtfSU5GUkFDRkcpICs9IG10ay1pbmZy YWNmZy5vDQo+ID4gIG9iai0kKENPTkZJR19NVEtfUE1JQ19XUkFQKSArPSBtdGstcG1pYy13cmFw Lm8NCj4gPiAgb2JqLSQoQ09ORklHX01US19TQ1BTWVMpICs9IG10ay1zY3BzeXMubw0KPiA+IGRp ZmYgLS1naXQgYS9kcml2ZXJzL3NvYy9tZWRpYXRlay9kZXZhcGMvS2NvbmZpZyBiL2RyaXZlcnMv c29jL21lZGlhdGVrL2RldmFwYy9LY29uZmlnDQo+ID4gbmV3IGZpbGUgbW9kZSAxMDA2NDQNCj4g PiBpbmRleCAwMDAwMDAwLi45NDI4MzYwDQo+ID4gLS0tIC9kZXYvbnVsbA0KPiA+ICsrKyBiL2Ry aXZlcnMvc29jL21lZGlhdGVrL2RldmFwYy9LY29uZmlnDQo+ID4gQEAgLTAsMCArMSwyNSBAQA0K PiA+ICtjb25maWcgTVRLX0RFVkFQQw0KPiA+ICsJdHJpc3RhdGUgIk1lZGlhdGVrIERldmljZSBB UEMgU3VwcG9ydCINCj4gPiArCWhlbHANCj4gPiArCSAgRGV2aWNlIEFQQyBpcyBhIGtlcm5lbCBk cml2ZXIgY29udHJvbGxpbmcgaW50ZXJuYWwgZGV2aWNlIHNlY3VyaXR5Lg0KPiA+ICsJICBJZiBz b21lb25lIHRyaWVzIHRvIGFjY2VzcyBhIGRldmljZSwgd2hpY2ggaXMgbm90IGFsbG93ZWQgYnkg dGhlDQo+ID4gKwkgIGRldmljZSwgaXQgY2Fubm90IGFjY2VzcyB0aGUgZGV2aWNlIGFuZCB3aWxs IGdldCBhIHZpb2xhdGlvbg0KPiA+ICsJICBpbnRlcnJ1cHQuIERldmljZSBBUEMgcHJldmVudHMg bWFsaWNpb3VzIGFjY2VzcyB0byBpbnRlcm5hbCBkZXZpY2VzLg0KPiA+ICsNCj4gPiArY29uZmln IERFVkFQQ19BUkNIX01VTFRJDQo+ID4gKwl0cmlzdGF0ZSAiTWVkaWF0ZWsgRGV2aWNlIEFQQyBk cml2ZXIgYXJjaGl0ZWN0dXJlIG11bHRpIg0KPiA+ICsJaGVscA0KPiA+ICsJICBTYXkgeWVzIGhl cmUgdG8gZW5hYmxlIHN1cHBvcnQgTWVkaWF0ZWsNCj4gPiArCSAgRGV2aWNlIEFQQyBkcml2ZXIg d2hpY2ggaXMgYmFzZWQgb24gSW5mcmENCj4gPiArCSAgYXJjaGl0ZWN0dXJlLg0KPiA+ICsJICBU aGlzIGFyY2hpdGVjdHVyZSBzdXBwb3J0cyBtdWx0aXBsZSBJbmZyYSBBTy4NCj4gPiArDQo+ID4g K2NvbmZpZyBERVZBUENfTVQ2ODczDQo+ID4gKwl0cmlzdGF0ZSAiTWVkaWF0ZWsgTVQ2ODczIERl dmljZSBBUEMgZHJpdmVyIg0KPiA+ICsJc2VsZWN0IE1US19ERVZBUEMNCj4gPiArCXNlbGVjdCBE RVZBUENfQVJDSF9NVUxUSQ0KPiA+ICsJaGVscA0KPiA+ICsJICBTYXkgeWVzIGhlcmUgdG8gZW5h YmxlIHN1cHBvcnQgTWVkaWF0ZWsgTVQ2ODczDQo+ID4gKwkgIERldmljZSBBUEMgZHJpdmVyLg0K PiA+ICsJICBUaGlzIGRyaXZlciBpcyBjb21iaW5lZCB3aXRoIERFVkFQQ19BUkNIX01VTFRJIGZv cg0KPiA+ICsJICBjb21tb24gaGFuZGxlIGZsb3cuDQo+ID4gZGlmZiAtLWdpdCBhL2RyaXZlcnMv c29jL21lZGlhdGVrL2RldmFwYy9NYWtlZmlsZSBiL2RyaXZlcnMvc29jL21lZGlhdGVrL2RldmFw Yy9NYWtlZmlsZQ0KPiA+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0DQo+ID4gaW5kZXggMDAwMDAwMC4u YmQ0NzFmMg0KPiA+IC0tLSAvZGV2L251bGwNCj4gPiArKysgYi9kcml2ZXJzL3NvYy9tZWRpYXRl ay9kZXZhcGMvTWFrZWZpbGUNCj4gPiBAQCAtMCwwICsxLDEzIEBADQo+ID4gKyMgU1BEWC1MaWNl bnNlLUlkZW50aWZpZXI6IEdQTC0yLjANCj4gPiArDQo+ID4gK2lmZXEgKCQoQ09ORklHX01US19H Q09WX0tFUk5FTCkseSkNCj4gPiArR0NPVl9QUk9GSUxFIDo9IHkNCj4gPiArZW5kaWYNCj4gPiAr DQo+ID4gK29iai0kKENPTkZJR19NVEtfREVWQVBDKSA6PSBkZXZhcGMubw0KPiA+ICsNCj4gPiAr IyBDb3JlDQo+ID4gK2RldmFwYy0kKENPTkZJR19ERVZBUENfQVJDSF9NVUxUSSkgKz0gZGV2YXBj LW10ay1tdWx0aS1hby5vDQo+ID4gKw0KPiA+ICsjIFBsYXRmb3JtDQo+ID4gK2RldmFwYy0kKENP TkZJR19ERVZBUENfTVQ2ODczKSArPSBkZXZhcGMtbXQ2ODczLm8NCj4gPiBkaWZmIC0tZ2l0IGEv ZHJpdmVycy9zb2MvbWVkaWF0ZWsvZGV2YXBjL2RldmFwYy1tdDY4NzMuYyBiL2RyaXZlcnMvc29j L21lZGlhdGVrL2RldmFwYy9kZXZhcGMtbXQ2ODczLmMNCj4gPiBuZXcgZmlsZSBtb2RlIDEwMDY0 NA0KPiA+IGluZGV4IDAwMDAwMDAuLjc1YTIxNDANCj4gPiAtLS0gL2Rldi9udWxsDQo+ID4gKysr IGIvZHJpdmVycy9zb2MvbWVkaWF0ZWsvZGV2YXBjL2RldmFwYy1tdDY4NzMuYw0KPiA+IEBAIC0w LDAgKzEsMTY1MiBAQA0KPiA+ICsvLyBTUERYLUxpY2Vuc2UtSWRlbnRpZmllcjogR1BMLTIuMA0K PiA+ICsvKg0KPiA+ICsgKiBDb3B5cmlnaHQgKEMpIDIwMjAgTWVkaWFUZWsgSW5jLg0KPiA+ICsg Ki8NCj4gPiArDQo+ID4gKyNpbmNsdWRlIDxsaW51eC9idWcuaD4NCj4gPiArI2luY2x1ZGUgPGxp bnV4L21vZHVsZS5oPg0KPiA+ICsjaW5jbHVkZSA8bGludXgvb2YuaD4NCj4gPiArI2luY2x1ZGUg PGxpbnV4L3BsYXRmb3JtX2RldmljZS5oPg0KPiA+ICsjaW5jbHVkZSA8YXNtLWdlbmVyaWMvaW8u aD4NCj4gPiArDQo+ID4gKyNpbmNsdWRlICJkZXZhcGMtbXQ2ODczLmgiDQo+ID4gKyNpbmNsdWRl ICJkZXZhcGMtbXRrLW11bHRpLWFvLmgiDQo+ID4gKw0KPiA+ICtzdGF0aWMgc3RydWN0IG10a19k ZXZpY2VfaW5mbyBtdDY4NzNfZGV2aWNlc19pbmZyYVtdID0gew0KPiA+ICsJLyogc3lzX2lkeCwg Y3RybF9pZHgsIHZpb19pZHggKi8NCj4gPiArCS8qIDAgKi8NCj4gPiArCXswLCAwLCAwfSwNCj4g PiArCXswLCAxLCAxfSwNCj4gPiArCXswLCAyLCAyfSwNCj4gPiArCXswLCAzLCAzfSwNCj4gPiAr CXswLCA0LCA0fSwNCj4gPiArCXswLCA1LCA1fSwNCj4gPiArCXswLCA2LCA2fSwNCj4gPiArCXsw LCA3LCA3fSwNCj4gPiArCXswLCA4LCA4fSwNCj4gPiArCXswLCA5LCA5fSwNCj4gPiArDQo+ID4g KwkvKiAxMCAqLw0KPiA+ICsJezAsIDEwLCAxMH0sDQo+ID4gKwl7MCwgMTEsIDExfSwNCj4gPiAr CXswLCAxMiwgMTJ9LA0KPiA+ICsJezAsIDEzLCAxM30sDQo+ID4gKwl7MCwgMTQsIDE0fSwNCj4g PiArCXswLCAxNSwgMTV9LA0KPiA+ICsJezAsIDE2LCAxNn0sDQo+ID4gKwl7MCwgMTcsIDE3fSwN Cj4gPiArCXswLCAxOCwgMTh9LA0KPiA+ICsJezAsIDE5LCAxOX0sDQo+ID4gKw0KPiA+ICsJLyog MjAgKi8NCj4gPiArCXswLCAyMCwgMjB9LA0KPiA+ICsJezAsIDIxLCAyMX0sDQo+ID4gKwl7MCwg MjIsIDM1Mn0sDQo+ID4gKwl7MSwgMCwgMjJ9LA0KPiA+ICsJezEsIDEsIDIzfSwNCj4gPiArCXsx LCAyLCAyNH0sDQo+ID4gKwl7MSwgMywgMjV9LA0KPiA+ICsJezEsIDQsIDI2fSwNCj4gPiArCXsx LCA1LCAyN30sDQo+ID4gKwl7MSwgNiwgMjh9LA0KPiA+ICsNCj4gPiArCS8qIDMwICovDQo+ID4g Kwl7MSwgNywgMjl9LA0KPiA+ICsJezEsIDgsIDMwfSwNCj4gPiArCXsxLCA5LCAzMX0sDQo+ID4g Kwl7MSwgMTAsIDMyfSwNCj4gPiArCXsxLCAxMSwgMzN9LA0KPiA+ICsJezEsIDEyLCAzNH0sDQo+ ID4gKwl7MSwgMTMsIDM1fSwNCj4gPiArCXsxLCAxNCwgMzZ9LA0KPiA+ICsJezEsIDE1LCAzN30s DQo+ID4gKwl7MSwgMTYsIDM4fSwNCj4gPiArDQo+ID4gKwkvKiA0MCAqLw0KPiA+ICsJezEsIDE3 LCAzOX0sDQo+ID4gKwl7MSwgMTgsIDQwfSwNCj4gPiArCXsxLCAxOSwgNDF9LA0KPiA+ICsJezEs IDIwLCA0Mn0sDQo+ID4gKwl7MSwgMjEsIDQzfSwNCj4gPiArCXsxLCAyMiwgNDR9LA0KPiA+ICsJ ezEsIDIzLCA0NX0sDQo+ID4gKwl7MSwgMjQsIDQ2fSwNCj4gPiArCXsxLCAyNSwgNDd9LA0KPiA+ ICsJezEsIDI2LCA0OH0sDQo+ID4gKw0KPiA+ICsJLyogNTAgKi8NCj4gPiArCXsxLCAyNywgNDl9 LA0KPiA+ICsJezEsIDI4LCA1MH0sDQo+ID4gKwl7MSwgMjksIDUxfSwNCj4gPiArCXsxLCAzMCwg NTJ9LA0KPiA+ICsJezEsIDMxLCA1M30sDQo+ID4gKwl7MSwgMzIsIDU0fSwNCj4gPiArCXsxLCAz MywgNTV9LA0KPiA+ICsJezEsIDM0LCA1Nn0sDQo+ID4gKwl7MSwgMzUsIDU3fSwNCj4gPiArCXsx LCAzNiwgNTh9LA0KPiA+ICsNCj4gPiArCS8qIDYwICovDQo+ID4gKwl7MSwgMzcsIDU5fSwNCj4g PiArCXsxLCAzOCwgNjB9LA0KPiA+ICsJezEsIDM5LCA2MX0sDQo+ID4gKwl7MSwgNDAsIDYyfSwN Cj4gPiArCXsxLCA0MSwgNjN9LA0KPiA+ICsJezEsIDQyLCA2NH0sDQo+ID4gKwl7MSwgNDMsIDY1 fSwNCj4gPiArCXsxLCA0NCwgNjZ9LA0KPiA+ICsJezEsIDQ1LCA2N30sDQo+ID4gKwl7MSwgNDYs IDY4fSwNCj4gPiArDQo+ID4gKwkvKiA3MCAqLw0KPiA+ICsJezEsIDQ3LCA2OX0sDQo+ID4gKwl7 MSwgNDgsIDcwfSwNCj4gPiArCXsxLCA0OSwgNzF9LA0KPiA+ICsJezEsIDUwLCA3Mn0sDQo+ID4g Kwl7MSwgNTEsIDczfSwNCj4gPiArCXsxLCA1MiwgNzR9LA0KPiA+ICsJezEsIDUzLCA3NX0sDQo+ ID4gKwl7MSwgNTQsIDc2fSwNCj4gPiArCXsxLCA1NSwgNzd9LA0KPiA+ICsJezEsIDU2LCA3OH0s DQo+ID4gKw0KPiA+ICsJLyogODAgKi8NCj4gPiArCXsxLCA1NywgNzl9LA0KPiA+ICsJezEsIDU4 LCA4MH0sDQo+ID4gKwl7MSwgNTksIDgxfSwNCj4gPiArCXsxLCA2MCwgODJ9LA0KPiA+ICsJezEs IDYxLCA4M30sDQo+ID4gKwl7MSwgNjIsIDg0fSwNCj4gPiArCXsxLCA2MywgODV9LA0KPiA+ICsJ ezEsIDY0LCA4Nn0sDQo+ID4gKwl7MSwgNjUsIDg3fSwNCj4gPiArCXsxLCA2NiwgODh9LA0KPiA+ ICsNCj4gPiArCS8qIDkwICovDQo+ID4gKwl7MSwgNjcsIDg5fSwNCj4gPiArCXsxLCA2OCwgOTB9 LA0KPiA+ICsJezEsIDY5LCA5MX0sDQo+ID4gKwl7MSwgNzAsIDkyfSwNCj4gPiArCXsxLCA3MSwg OTN9LA0KPiA+ICsJezEsIDcyLCA5NH0sDQo+ID4gKwl7MSwgNzMsIDk1fSwNCj4gPiArCXsxLCA3 NCwgOTZ9LA0KPiA+ICsJezEsIDc1LCA5N30sDQo+ID4gKwl7MSwgNzYsIDk4fSwNCj4gPiArDQo+ ID4gKwkvKiAxMDAgKi8NCj4gPiArCXsxLCA3NywgOTl9LA0KPiA+ICsJezEsIDc4LCAxMDB9LA0K PiA+ICsJezEsIDc5LCAxMDF9LA0KPiA+ICsJezEsIDgwLCAxMDJ9LA0KPiA+ICsJezEsIDgxLCAx MDN9LA0KPiA+ICsJezEsIDgyLCAxMDR9LA0KPiA+ICsJezEsIDgzLCAxMDV9LA0KPiA+ICsJezEs IDg0LCAxMDZ9LA0KPiA+ICsJezEsIDg1LCAxMDd9LA0KPiA+ICsJezEsIDg2LCAxMDh9LA0KPiA+ ICsNCj4gPiArCS8qIDExMCAqLw0KPiA+ICsJezEsIDg3LCAxMDl9LA0KPiA+ICsJezEsIDg4LCAx MTB9LA0KPiA+ICsJezEsIDg5LCAxMTF9LA0KPiA+ICsJezEsIDkwLCAxMTJ9LA0KPiA+ICsJezEs IDkxLCAxMTN9LA0KPiA+ICsJezEsIDkyLCAxMTR9LA0KPiA+ICsJezEsIDkzLCAxMTV9LA0KPiA+ ICsJezEsIDk0LCAxMTZ9LA0KPiA+ICsJezEsIDk1LCAxMTd9LA0KPiA+ICsJezEsIDk2LCAxMTh9 LA0KPiA+ICsNCj4gPiArCS8qIDEyMCAqLw0KPiA+ICsJezEsIDk3LCAxMTl9LA0KPiA+ICsJezEs IDk4LCAxMjB9LA0KPiA+ICsJezEsIDk5LCAxMjF9LA0KPiA+ICsJezEsIDEwMCwgMTIyfSwNCj4g PiArCXsxLCAxMDEsIDEyM30sDQo+ID4gKwl7MSwgMTAyLCAxMjR9LA0KPiA+ICsJezEsIDEwMywg MTI1fSwNCj4gPiArCXsxLCAxMDQsIDEyNn0sDQo+ID4gKwl7MSwgMTA1LCAxMjd9LA0KPiA+ICsJ ezEsIDEwNiwgMTI4fSwNCj4gPiArDQo+ID4gKwkvKiAxMzAgKi8NCj4gPiArCXsxLCAxMDcsIDEy OX0sDQo+ID4gKwl7MSwgMTA4LCAxMzB9LA0KPiA+ICsJezEsIDEwOSwgMTMxfSwNCj4gPiArCXsx LCAxMTAsIDEzMn0sDQo+ID4gKwl7MSwgMTExLCAxMzN9LA0KPiA+ICsJezEsIDExMiwgMTM0fSwN Cj4gPiArCXsxLCAxMTMsIDEzNX0sDQo+ID4gKwl7MSwgMTE0LCAxMzZ9LA0KPiA+ICsJezEsIDEx NSwgMTM3fSwNCj4gPiArCXsxLCAxMTYsIDEzOH0sDQo+ID4gKw0KPiA+ICsJLyogMTQwICovDQo+ ID4gKwl7MSwgMTE3LCAxMzl9LA0KPiA+ICsJezEsIDExOCwgMTQwfSwNCj4gPiArCXsxLCAxMTks IDE0MX0sDQo+ID4gKwl7MSwgMTIwLCAxNDJ9LA0KPiA+ICsJezEsIDEyMSwgMTQzfSwNCj4gPiAr CXsxLCAxMjIsIDE0NH0sDQo+ID4gKwl7MSwgMTIzLCAxNDV9LA0KPiA+ICsJezEsIDEyNCwgMTQ2 fSwNCj4gPiArCXsxLCAxMjUsIDE0N30sDQo+ID4gKwl7MSwgMTI2LCAxNDh9LA0KPiA+ICsNCj4g PiArCS8qIDE1MCAqLw0KPiA+ICsJezEsIDEyNywgMTQ5fSwNCj4gPiArCXsxLCAxMjgsIDE1MH0s DQo+ID4gKwl7MSwgMTI5LCAxNTF9LA0KPiA+ICsJezEsIDEzMCwgMTUyfSwNCj4gPiArCXsxLCAx MzEsIDE1M30sDQo+ID4gKwl7MSwgMTMyLCAxNTR9LA0KPiA+ICsJezEsIDEzMywgMTU1fSwNCj4g PiArCXsxLCAxMzQsIDE1Nn0sDQo+ID4gKwl7MSwgMTM1LCAxNTd9LA0KPiA+ICsJezEsIDEzNiwg MTU4fSwNCj4gPiArDQo+ID4gKwkvKiAxNjAgKi8NCj4gPiArCXsxLCAxMzcsIDE1OX0sDQo+ID4g Kwl7MSwgMTM4LCAxNjB9LA0KPiA+ICsJezEsIDEzOSwgMTYxfSwNCj4gPiArCXsxLCAxNDAsIDE2 Mn0sDQo+ID4gKwl7MSwgMTQxLCAxNjN9LA0KPiA+ICsJezEsIDE0MiwgMTY0fSwNCj4gPiArCXsx LCAxNDMsIDE2NX0sDQo+ID4gKwl7MSwgMTQ0LCAxNjZ9LA0KPiA+ICsJezEsIDE0NSwgMTY3fSwN Cj4gPiArCXsxLCAxNDYsIDE2OH0sDQo+ID4gKw0KPiA+ICsJLyogMTcwICovDQo+ID4gKwl7MSwg MTQ3LCAxNjl9LA0KPiA+ICsJezEsIDE0OCwgMTcwfSwNCj4gPiArCXsxLCAxNDksIDE3MX0sDQo+ ID4gKwl7MSwgMTUwLCAxNzJ9LA0KPiA+ICsJezEsIDE1MSwgMTczfSwNCj4gPiArCXsxLCAxNTIs IDE3NH0sDQo+ID4gKwl7MSwgMTUzLCAxNzV9LA0KPiA+ICsJezEsIDE1NCwgMTc2fSwNCj4gPiAr CXsxLCAxNTUsIDE3N30sDQo+ID4gKwl7MSwgMTU2LCAxNzh9LA0KPiA+ICsNCj4gPiArCS8qIDE4 MCAqLw0KPiA+ICsJezEsIDE1NywgMTc5fSwNCj4gPiArCXsxLCAxNTgsIDE4MH0sDQo+ID4gKwl7 MSwgMTU5LCAxODF9LA0KPiA+ICsJezEsIDE2MCwgMTgyfSwNCj4gPiArCXsxLCAxNjEsIDE4M30s DQo+ID4gKwl7MSwgMTYyLCAxODR9LA0KPiA+ICsJezEsIDE2MywgMTg1fSwNCj4gPiArCXsxLCAx NjQsIDE4Nn0sDQo+ID4gKwl7MSwgMTY1LCAxODd9LA0KPiA+ICsJezEsIDE2NiwgMTg4fSwNCj4g PiArDQo+ID4gKwkvKiAxOTAgKi8NCj4gPiArCXsxLCAxNjcsIDE4OX0sDQo+ID4gKwl7MSwgMTY4 LCAxOTB9LA0KPiA+ICsJezEsIDE2OSwgMTkxfSwNCj4gPiArCXsxLCAxNzAsIDE5Mn0sDQo+ID4g Kwl7MSwgMTcxLCAxOTN9LA0KPiA+ICsJezEsIDE3MiwgMTk0fSwNCj4gPiArCXsxLCAxNzMsIDE5 NX0sDQo+ID4gKwl7MSwgMTc0LCAxOTZ9LA0KPiA+ICsJezEsIDE3NSwgMTk3fSwNCj4gPiArCXsx LCAxNzYsIDE5OH0sDQo+ID4gKw0KPiA+ICsJLyogMjAwICovDQo+ID4gKwl7MSwgMTc3LCAxOTl9 LA0KPiA+ICsJezEsIDE3OCwgMjAwfSwNCj4gPiArCXsxLCAxNzksIDIwMX0sDQo+ID4gKwl7MSwg MTgwLCAyMDJ9LA0KPiA+ICsJezEsIDE4MSwgMjAzfSwNCj4gPiArCXsxLCAxODIsIDIwNH0sDQo+ ID4gKwl7MSwgMTgzLCAyMDV9LA0KPiA+ICsJezEsIDE4NCwgMjA2fSwNCj4gPiArCXsxLCAxODUs IDIwN30sDQo+ID4gKwl7MSwgMTg2LCAyMDh9LA0KPiA+ICsNCj4gPiArCS8qIDIxMCAqLw0KPiA+ ICsJezEsIDE4NywgMjA5fSwNCj4gPiArCXsxLCAxODgsIDIxMH0sDQo+ID4gKwl7MSwgMTg5LCAy MTF9LA0KPiA+ICsJezEsIDE5MCwgMjEyfSwNCj4gPiArCXsxLCAxOTEsIDIxM30sDQo+ID4gKwl7 MSwgMTkyLCAyMTR9LA0KPiA+ICsJezEsIDE5MywgMjE1fSwNCj4gPiArCXsxLCAxOTQsIDIxNn0s DQo+ID4gKwl7MSwgMTk1LCAyMTd9LA0KPiA+ICsJezEsIDE5NiwgMjE4fSwNCj4gPiArDQo+ID4g KwkvKiAyMjAgKi8NCj4gPiArCXsxLCAxOTcsIDIxOX0sDQo+ID4gKwl7MSwgMTk4LCAyMjB9LA0K PiA+ICsJezEsIDE5OSwgMjIxfSwNCj4gPiArCXsxLCAyMDAsIDIyMn0sDQo+ID4gKwl7MSwgMjAx LCAyMjN9LA0KPiA+ICsJezEsIDIwMiwgMjI0fSwNCj4gPiArCXsxLCAyMDMsIDIyNX0sDQo+ID4g Kwl7MSwgMjA0LCAyMjZ9LA0KPiA+ICsJezEsIDIwNSwgMjI3fSwNCj4gPiArCXsxLCAyMDYsIDIy OH0sDQo+ID4gKw0KPiA+ICsJLyogMjMwICovDQo+ID4gKwl7MSwgMjA3LCAyMjl9LA0KPiA+ICsJ ezEsIDIwOCwgMjMwfSwNCj4gPiArCXsxLCAyMDksIDIzMX0sDQo+ID4gKwl7MSwgMjEwLCAyMzJ9 LA0KPiA+ICsJezEsIDIxMSwgMjMzfSwNCj4gPiArCXsxLCAyMTIsIDIzNH0sDQo+ID4gKwl7MSwg MjEzLCAyMzV9LA0KPiA+ICsJezEsIDIxNCwgMjM2fSwNCj4gPiArCXsxLCAyMTUsIDIzN30sDQo+ ID4gKwl7MSwgMjE2LCAyMzh9LA0KPiA+ICsNCj4gPiArCS8qIDI0MCAqLw0KPiA+ICsJezEsIDIx NywgMjM5fSwNCj4gPiArCXsxLCAyMTgsIDI0MH0sDQo+ID4gKwl7MSwgMjE5LCAyNDF9LA0KPiA+ ICsJezEsIDIyMCwgMjQyfSwNCj4gPiArCXsxLCAyMjEsIDI0M30sDQo+ID4gKwl7MSwgMjIyLCAy NDR9LA0KPiA+ICsJezEsIDIyMywgMjQ1fSwNCj4gPiArCXsxLCAyMjQsIDI0Nn0sDQo+ID4gKwl7 MSwgMjI1LCAyNDd9LA0KPiA+ICsJezEsIDIyNiwgMjQ4fSwNCj4gPiArDQo+ID4gKwkvKiAyNTAg Ki8NCj4gPiArCXsxLCAyMjcsIDI0OX0sDQo+ID4gKwl7MSwgMjI4LCAyNTB9LA0KPiA+ICsJezEs IDIyOSwgMjUxfSwNCj4gPiArCXsxLCAyMzAsIDI1Mn0sDQo+ID4gKwl7MSwgMjMxLCAyNTN9LA0K PiA+ICsJezEsIDIzMiwgMjU0fSwNCj4gPiArCXsxLCAyMzMsIDI1NX0sDQo+ID4gKwl7MSwgMjM0 LCAyNTZ9LA0KPiA+ICsJezEsIDIzNSwgMjU3fSwNCj4gPiArCXsxLCAyMzYsIDI1OH0sDQo+ID4g Kw0KPiA+ICsJLyogMjYwICovDQo+ID4gKwl7MSwgMjM3LCAyNTl9LA0KPiA+ICsJezEsIDIzOCwg MjYwfSwNCj4gPiArCXsxLCAyMzksIDI2MX0sDQo+ID4gKwl7MSwgMjQwLCAyNjJ9LA0KPiA+ICsJ ezEsIDI0MSwgMjYzfSwNCj4gPiArCXsxLCAyNDIsIDI2NH0sDQo+ID4gKwl7MSwgMjQzLCAyNjV9 LA0KPiA+ICsJezEsIDI0NCwgMjY2fSwNCj4gPiArCXsxLCAyNDUsIDI2N30sDQo+ID4gKwl7MSwg MjQ2LCAyNjh9LA0KPiA+ICsNCj4gPiArCS8qIDI3MCAqLw0KPiA+ICsJezEsIDI0NywgMjY5fSwN Cj4gPiArCXsxLCAyNDgsIDI3MH0sDQo+ID4gKwl7MSwgMjQ5LCAyNzF9LA0KPiA+ICsJezEsIDI1 MCwgMjcyfSwNCj4gPiArCXsxLCAyNTEsIDI3M30sDQo+ID4gKwl7MSwgMjUyLCAyNzR9LA0KPiA+ ICsJezEsIDI1MywgMjc1fSwNCj4gPiArCXsxLCAyNTQsIDI3Nn0sDQo+ID4gKwl7MSwgMjU1LCAy Nzd9LA0KPiA+ICsJezIsIDAsIDI3OH0sDQo+ID4gKw0KPiA+ICsJLyogMjgwICovDQo+ID4gKwl7 MiwgMSwgMjc5fSwNCj4gPiArCXsyLCAyLCAyODB9LA0KPiA+ICsJezIsIDMsIDI4MX0sDQo+ID4g Kwl7MiwgNCwgMjgyfSwNCj4gPiArCXsyLCA1LCAyODN9LA0KPiA+ICsJezIsIDYsIDI4NH0sDQo+ ID4gKwl7MiwgNywgMjg1fSwNCj4gPiArCXsyLCA4LCAyODZ9LA0KPiA+ICsJezIsIDksIDI4N30s DQo+ID4gKwl7MiwgMTAsIDI4OH0sDQo+ID4gKw0KPiA+ICsJLyogMjkwICovDQo+ID4gKwl7Miwg MTEsIDI4OX0sDQo+ID4gKwl7MiwgMTIsIDI5MH0sDQo+ID4gKwl7MiwgMTMsIDI5MX0sDQo+ID4g Kwl7MiwgMTQsIDI5Mn0sDQo+ID4gKwl7MiwgMTUsIDI5M30sDQo+ID4gKwl7MiwgMTYsIDI5NH0s DQo+ID4gKwl7MiwgMTcsIDI5NX0sDQo+ID4gKwl7MiwgMTgsIDI5Nn0sDQo+ID4gKwl7MiwgMTks IDI5N30sDQo+ID4gKwl7MiwgMjAsIDI5OH0sDQo+ID4gKw0KPiA+ICsJLyogMzAwICovDQo+ID4g Kwl7MiwgMjEsIDI5OX0sDQo+ID4gKwl7MiwgMjIsIDMwMH0sDQo+ID4gKwl7MiwgMjMsIDMwMX0s DQo+ID4gKwl7MiwgMjQsIDMwMn0sDQo+ID4gKwl7MiwgMjUsIDMwM30sDQo+ID4gKwl7MiwgMjYs IDMwNH0sDQo+ID4gKwl7MiwgMjcsIDMwNX0sDQo+ID4gKwl7MiwgMjgsIDMwNn0sDQo+ID4gKwl7 MiwgMjksIDMwN30sDQo+ID4gKwl7MiwgMzAsIDMwOH0sDQo+ID4gKw0KPiA+ICsJLyogMzEwICov DQo+ID4gKwl7MiwgMzEsIDMwOX0sDQo+ID4gKwl7MiwgMzIsIDMxMH0sDQo+ID4gKwl7MiwgMzMs IDMxMX0sDQo+ID4gKwl7MiwgMzQsIDMxMn0sDQo+ID4gKwl7MiwgMzUsIDMxM30sDQo+ID4gKwl7 MiwgMzYsIDMxNH0sDQo+ID4gKwl7MiwgMzcsIDMxNX0sDQo+ID4gKwl7MiwgMzgsIDMxNn0sDQo+ ID4gKwl7MiwgMzksIDMxN30sDQo+ID4gKwl7MiwgNDAsIDMxOH0sDQo+ID4gKw0KPiA+ICsJLyog MzIwICovDQo+ID4gKwl7MiwgNDEsIDMxOX0sDQo+ID4gKwl7MiwgNDIsIDMyMH0sDQo+ID4gKwl7 MiwgNDMsIDMyMX0sDQo+ID4gKwl7MiwgNDQsIDMyMn0sDQo+ID4gKwl7MiwgNDUsIDMyM30sDQo+ ID4gKwl7MiwgNDYsIDMyNH0sDQo+ID4gKwl7MiwgNDcsIDMyNX0sDQo+ID4gKwl7MiwgNDgsIDMy Nn0sDQo+ID4gKwl7MiwgNDksIDMyN30sDQo+ID4gKwl7MiwgNTAsIDMyOH0sDQo+ID4gKw0KPiA+ ICsJLyogMzMwICovDQo+ID4gKwl7MiwgNTEsIDMyOX0sDQo+ID4gKwl7MiwgNTIsIDMzMH0sDQo+ ID4gKwl7MiwgNTMsIDMzMX0sDQo+ID4gKwl7MiwgNTQsIDMzMn0sDQo+ID4gKwl7MiwgNTUsIDMz M30sDQo+ID4gKwl7MiwgNTYsIDMzNH0sDQo+ID4gKwl7MiwgNTcsIDMzNX0sDQo+ID4gKwl7Miwg NTgsIDMzNn0sDQo+ID4gKwl7MiwgNTksIDMzN30sDQo+ID4gKwl7MiwgNjAsIDMzOH0sDQo+ID4g Kw0KPiA+ICsJLyogMzQwICovDQo+ID4gKwl7MiwgNjEsIDMzOX0sDQo+ID4gKwl7MiwgNjIsIDM0 MH0sDQo+ID4gKwl7MiwgNjMsIDM0MX0sDQo+ID4gKwl7MiwgNjQsIDM0Mn0sDQo+ID4gKwl7Miwg NjUsIDM0M30sDQo+ID4gKwl7MiwgNjYsIDM0NH0sDQo+ID4gKwl7MiwgNjcsIDM0NX0sDQo+ID4g Kwl7MiwgNjgsIDM0Nn0sDQo+ID4gKwl7MiwgNjksIDM0N30sDQo+ID4gKwl7LTEsIC0xLCAzNTV9 LA0KPiA+ICsNCj4gPiArCS8qIDM1MCAqLw0KPiA+ICsJey0xLCAtMSwgMzU2fSwNCj4gPiArCXst MSwgLTEsIDM1N30sDQo+ID4gKwl7LTEsIC0xLCAzNTh9LA0KPiA+ICsJey0xLCAtMSwgMzU5fSwN Cj4gPiArCXstMSwgLTEsIDM2MH0sDQo+ID4gKwl7LTEsIC0xLCAzNjF9LA0KPiA+ICsJey0xLCAt MSwgMzYyfSwNCj4gPiArCXstMSwgLTEsIDM2M30sDQo+ID4gKwl7LTEsIC0xLCAzNjR9LA0KPiA+ ICsJey0xLCAtMSwgMzY1fSwNCj4gPiArDQo+ID4gKwkvKiAzNjAgKi8NCj4gPiArCXstMSwgLTEs IDM2Nn0sDQo+ID4gKwl7LTEsIC0xLCAzNjd9LA0KPiA+ICsJey0xLCAtMSwgMzY4fSwNCj4gPiAr CXstMSwgLTEsIDM2OX0sDQo+ID4gKwl7LTEsIC0xLCAzNzB9LA0KPiA+ICsJey0xLCAtMSwgMzcx fSwNCj4gPiArDQo+ID4gK307DQo+ID4gKw0KPiA+ICtzdGF0aWMgc3RydWN0IG10a19kZXZpY2Vf aW5mbyBtdDY4NzNfZGV2aWNlc19wZXJpW10gPSB7DQo+ID4gKwkvKiBzeXNfaWR4LCBjdHJsX2lk eCwgdmlvX2lkeCAqLw0KPiA+ICsJLyogMCAqLw0KPiA+ICsJezAsIDAsIDB9LA0KPiA+ICsJezAs IDEsIDF9LA0KPiA+ICsJezAsIDIsIDJ9LA0KPiA+ICsJezAsIDMsIDN9LA0KPiA+ICsJezAsIDQs IDR9LA0KPiA+ICsJezAsIDUsIDV9LA0KPiA+ICsJezAsIDYsIDZ9LA0KPiA+ICsJezAsIDcsIDd9 LA0KPiA+ICsJezAsIDgsIDh9LA0KPiA+ICsJezAsIDksIDl9LA0KPiA+ICsNCj4gPiArCS8qIDEw ICovDQo+ID4gKwl7MCwgMTAsIDEwfSwNCj4gPiArCXswLCAxMSwgMTF9LA0KPiA+ICsJezAsIDEy LCAxM30sDQo+ID4gKwl7MCwgMTMsIDE0fSwNCj4gPiArCXswLCAxNCwgMTV9LA0KPiA+ICsJezAs IDE1LCAxNn0sDQo+ID4gKwl7MCwgMTYsIDE3fSwNCj4gPiArCXswLCAxNywgMTh9LA0KPiA+ICsJ ezAsIDE4LCAxOX0sDQo+ID4gKwl7MCwgMTksIDIwfSwNCj4gPiArDQo+ID4gKwkvKiAyMCAqLw0K PiA+ICsJezAsIDIwLCAyMX0sDQo+ID4gKwl7MCwgMjEsIDIzfSwNCj4gPiArCXswLCAyMiwgMjR9 LA0KPiA+ICsJezAsIDIzLCAyNX0sDQo+ID4gKwl7MCwgMjQsIDI2fSwNCj4gPiArCXswLCAyNSwg Mjd9LA0KPiA+ICsJezAsIDI2LCAyOH0sDQo+ID4gKwl7MCwgMjcsIDI5fSwNCj4gPiArCXswLCAy OCwgMzB9LA0KPiA+ICsJezAsIDI5LCAzMX0sDQo+ID4gKw0KPiA+ICsJLyogMzAgKi8NCj4gPiAr CXswLCAzMCwgMzJ9LA0KPiA+ICsJezAsIDMxLCAzM30sDQo+ID4gKwl7MCwgMzIsIDM0fSwNCj4g PiArCXswLCAzMywgMzV9LA0KPiA+ICsJezAsIDM0LCAzNn0sDQo+ID4gKwl7MCwgMzUsIDM3fSwN Cj4gPiArCXswLCAzNiwgMzh9LA0KPiA+ICsJezAsIDM3LCA2Mn0sDQo+ID4gKwl7MCwgMzgsIDYz fSwNCj4gPiArCXswLCAzOSwgNjR9LA0KPiA+ICsNCj4gPiArCS8qIDQwICovDQo+ID4gKwl7MCwg NDAsIDY1fSwNCj4gPiArCXswLCA0MSwgNjZ9LA0KPiA+ICsJezAsIDQyLCA2N30sDQo+ID4gKwl7 MCwgNDMsIDY4fSwNCj4gPiArCXswLCA0NCwgNjl9LA0KPiA+ICsJezAsIDQ1LCA3MH0sDQo+ID4g Kwl7MCwgNDYsIDcxfSwNCj4gPiArCXswLCA0NywgNzJ9LA0KPiA+ICsJezAsIDQ4LCA3M30sDQo+ ID4gKwl7MCwgNDksIDc0fSwNCj4gPiArDQo+ID4gKwkvKiA1MCAqLw0KPiA+ICsJezAsIDUwLCAx MTl9LA0KPiA+ICsJezAsIDUxLCAxMjB9LA0KPiA+ICsJezAsIDUyLCAxMjF9LA0KPiA+ICsJezAs IDUzLCAxMjJ9LA0KPiA+ICsJezAsIDU0LCAxMjN9LA0KPiA+ICsJezAsIDU1LCAxMjR9LA0KPiA+ ICsJezAsIDU2LCAxMjV9LA0KPiA+ICsJezAsIDU3LCAxMjZ9LA0KPiA+ICsJezAsIDU4LCAxMjd9 LA0KPiA+ICsJezAsIDU5LCAxMjh9LA0KPiA+ICsNCj4gPiArCS8qIDYwICovDQo+ID4gKwl7MCwg NjAsIDEyOX0sDQo+ID4gKwl7MCwgNjEsIDEzMH0sDQo+ID4gKwl7MCwgNjIsIDEzN30sDQo+ID4g Kwl7MCwgNjMsIDE0M30sDQo+ID4gKwl7MCwgNjQsIDE0NH0sDQo+ID4gKwl7MCwgNjUsIDE0NX0s DQo+ID4gKwl7MCwgNjYsIDE0Nn0sDQo+ID4gKwl7MCwgNjcsIDE0N30sDQo+ID4gKwl7MCwgNjgs IDE0OH0sDQo+ID4gKwl7MCwgNjksIDE0OX0sDQo+ID4gKw0KPiA+ICsJLyogNzAgKi8NCj4gPiAr CXswLCA3MCwgMTUwfSwNCj4gPiArCXswLCA3MSwgMTUxfSwNCj4gPiArCXswLCA3MiwgMTUyfSwN Cj4gPiArCXswLCA3MywgMTUzfSwNCj4gPiArCXswLCA3NCwgMTU0fSwNCj4gPiArCXswLCA3NSwg MTU1fSwNCj4gPiArCXswLCA3NiwgMTU2fSwNCj4gPiArCXswLCA3NywgMTU3fSwNCj4gPiArCXsw LCA3OCwgMTU4fSwNCj4gPiArCXswLCA3OSwgMTU5fSwNCj4gPiArDQo+ID4gKwkvKiA4MCAqLw0K PiA+ICsJezAsIDgwLCAxNjB9LA0KPiA+ICsJezAsIDgxLCAxNjF9LA0KPiA+ICsJezAsIDgyLCAx NjJ9LA0KPiA+ICsJezAsIDgzLCAxNjN9LA0KPiA+ICsJezAsIDg0LCAxNjR9LA0KPiA+ICsJezAs IDg1LCAxNjV9LA0KPiA+ICsJezAsIDg2LCAxNjZ9LA0KPiA+ICsJezAsIDg3LCAxNjd9LA0KPiA+ ICsJezAsIDg4LCAxNjh9LA0KPiA+ICsJezAsIDg5LCAxNjl9LA0KPiA+ICsNCj4gPiArCS8qIDkw ICovDQo+ID4gKwl7MCwgOTAsIDE3MH0sDQo+ID4gKwl7MCwgOTEsIDE3MX0sDQo+ID4gKwl7MCwg OTIsIDE3NH0sDQo+ID4gKwl7MCwgOTMsIDE3NX0sDQo+ID4gKwl7MCwgOTQsIDE3Nn0sDQo+ID4g Kwl7MCwgOTUsIDE3N30sDQo+ID4gKwl7MCwgOTYsIDE3OH0sDQo+ID4gKwl7MCwgOTcsIDE3OX0s DQo+ID4gKwl7MCwgOTgsIDE4MH0sDQo+ID4gKwl7MCwgOTksIDE4MX0sDQo+ID4gKw0KPiA+ICsJ LyogMTAwICovDQo+ID4gKwl7MCwgMTAwLCAxODJ9LA0KPiA+ICsJezAsIDEwMSwgMTgzfSwNCj4g PiArCXswLCAxMDIsIDE4NH0sDQo+ID4gKwl7MCwgMTAzLCAxODV9LA0KPiA+ICsJezAsIDEwNCwg MTg2fSwNCj4gPiArCXsxLCAwLCAzOX0sDQo+ID4gKwl7MSwgMSwgNDB9LA0KPiA+ICsJezEsIDIs IDQxfSwNCj4gPiArCXsxLCAzLCA0Mn0sDQo+ID4gKwl7MSwgNCwgNDN9LA0KPiA+ICsNCj4gPiAr CS8qIDExMCAqLw0KPiA+ICsJezEsIDUsIDQ0fSwNCj4gPiArCXsxLCA2LCA0NX0sDQo+ID4gKwl7 MSwgNywgNDZ9LA0KPiA+ICsJezEsIDgsIDQ3fSwNCj4gPiArCXsxLCA5LCA0OH0sDQo+ID4gKwl7 MSwgMTAsIDQ5fSwNCj4gPiArCXsxLCAxMSwgNTB9LA0KPiA+ICsJezEsIDEyLCA1MX0sDQo+ID4g Kwl7MSwgMTMsIDUyfSwNCj4gPiArCXsxLCAxNCwgNTN9LA0KPiA+ICsNCj4gPiArCS8qIDEyMCAq Lw0KPiA+ICsJezEsIDE1LCA1NH0sDQo+ID4gKwl7MSwgMTYsIDU1fSwNCj4gPiArCXsxLCAxNywg NTZ9LA0KPiA+ICsJezEsIDE4LCA1N30sDQo+ID4gKwl7MSwgMTksIDU4fSwNCj4gPiArCXsxLCAy MCwgNTl9LA0KPiA+ICsJezEsIDIxLCA2MH0sDQo+ID4gKwl7MSwgMjIsIDYxfSwNCj4gPiArCXsx LCAyMywgNzZ9LA0KPiA+ICsJezEsIDI0LCA3N30sDQo+ID4gKw0KPiA+ICsJLyogMTMwICovDQo+ ID4gKwl7MSwgMjUsIDc4fSwNCj4gPiArCXsxLCAyNiwgNzl9LA0KPiA+ICsJezEsIDI3LCA4MH0s DQo+ID4gKwl7MSwgMjgsIDgxfSwNCj4gPiArCXsxLCAyOSwgODJ9LA0KPiA+ICsJezEsIDMwLCA4 M30sDQo+ID4gKwl7MSwgMzEsIDg0fSwNCj4gPiArCXsxLCAzMiwgODV9LA0KPiA+ICsJezEsIDMz LCA4Nn0sDQo+ID4gKwl7MSwgMzQsIDg3fSwNCj4gPiArDQo+ID4gKwkvKiAxNDAgKi8NCj4gPiAr CXsxLCAzNSwgODh9LA0KPiA+ICsJezEsIDM2LCA4OX0sDQo+ID4gKwl7MSwgMzcsIDkwfSwNCj4g PiArCXsxLCAzOCwgOTF9LA0KPiA+ICsJezEsIDM5LCA5Mn0sDQo+ID4gKwl7MSwgNDAsIDkzfSwN Cj4gPiArCXsxLCA0MSwgOTR9LA0KPiA+ICsJezEsIDQyLCA5NX0sDQo+ID4gKwl7MSwgNDMsIDk2 fSwNCj4gPiArCXsxLCA0NCwgOTd9LA0KPiA+ICsNCj4gPiArCS8qIDE1MCAqLw0KPiA+ICsJezEs IDQ1LCA5OH0sDQo+ID4gKwl7MSwgNDYsIDk5fSwNCj4gPiArCXsxLCA0NywgMTAwfSwNCj4gPiAr CXsxLCA0OCwgMTAxfSwNCj4gPiArCXsxLCA0OSwgMTAyfSwNCj4gPiArCXsxLCA1MCwgMTAzfSwN Cj4gPiArCXsxLCA1MSwgMTA0fSwNCj4gPiArCXsxLCA1MiwgMTA1fSwNCj4gPiArCXsxLCA1Mywg MTA2fSwNCj4gPiArCXsxLCA1NCwgMTA3fSwNCj4gPiArDQo+ID4gKwkvKiAxNjAgKi8NCj4gPiAr CXsxLCA1NSwgMTA4fSwNCj4gPiArCXsxLCA1NiwgMTA5fSwNCj4gPiArCXsxLCA1NywgMTEwfSwN Cj4gPiArCXsxLCA1OCwgMTExfSwNCj4gPiArCXsxLCA1OSwgMTEyfSwNCj4gPiArCXsxLCA2MCwg MTEzfSwNCj4gPiArCXsxLCA2MSwgMTE0fSwNCj4gPiArCXsxLCA2MiwgMTE1fSwNCj4gPiArCXsx LCA2MywgMTE2fSwNCj4gPiArCXsxLCA2NCwgMTE3fSwNCj4gPiArDQo+ID4gKwkvKiAxNzAgKi8N Cj4gPiArCXsxLCA2NSwgMTE4fSwNCj4gPiArCXsyLCAwLCA3NX0sDQo+ID4gKwl7LTEsIC0xLCAx ODd9LA0KPiA+ICsJey0xLCAtMSwgMTg4fSwNCj4gPiArCXstMSwgLTEsIDE4OX0sDQo+ID4gKwl7 LTEsIC0xLCAxOTB9LA0KPiA+ICsJey0xLCAtMSwgMTkxfSwNCj4gPiArCXstMSwgLTEsIDE5Mn0s DQo+ID4gKwl7LTEsIC0xLCAxOTN9LA0KPiA+ICsJey0xLCAtMSwgMTk0fSwNCj4gPiArDQo+ID4g KwkvKiAxODAgKi8NCj4gPiArCXstMSwgLTEsIDE5NX0sDQo+ID4gKwl7LTEsIC0xLCAxOTZ9LA0K PiA+ICsJey0xLCAtMSwgMTk3fSwNCj4gPiArCXstMSwgLTEsIDE5OH0sDQo+ID4gKwl7LTEsIC0x LCAxOTl9LA0KPiA+ICsJey0xLCAtMSwgMjAwfSwNCj4gPiArCXstMSwgLTEsIDIwMX0sDQo+ID4g Kwl7LTEsIC0xLCAyMDJ9LA0KPiA+ICsJey0xLCAtMSwgMjAzfSwNCj4gPiArCXstMSwgLTEsIDIw NH0sDQo+ID4gKw0KPiA+ICsJLyogMTkwICovDQo+ID4gKwl7LTEsIC0xLCAyMDV9LA0KPiA+ICsJ ey0xLCAtMSwgMjA2fSwNCj4gPiArCXstMSwgLTEsIDIwN30sDQo+ID4gKwl7LTEsIC0xLCAyMDh9 LA0KPiA+ICsJey0xLCAtMSwgMjA5fSwNCj4gPiArCXstMSwgLTEsIDIxMH0sDQo+ID4gKwl7LTEs IC0xLCAyMTF9LA0KPiA+ICsJey0xLCAtMSwgMjEyfSwNCj4gPiArCXstMSwgLTEsIDIxM30sDQo+ ID4gKwl7LTEsIC0xLCAyMTR9LA0KPiA+ICsNCj4gPiArCS8qIDIwMCAqLw0KPiA+ICsJey0xLCAt MSwgMjE1fSwNCj4gPiArCXstMSwgLTEsIDIxNn0sDQo+ID4gKwl7LTEsIC0xLCAyMTd9LA0KPiA+ ICsJey0xLCAtMSwgMjE4fSwNCj4gPiArCXstMSwgLTEsIDIxOX0sDQo+ID4gKwl7LTEsIC0xLCAy MjB9LA0KPiA+ICsJey0xLCAtMSwgMjIxfSwNCj4gPiArCXstMSwgLTEsIDIyMn0sDQo+ID4gKwl7 LTEsIC0xLCAyMjN9LA0KPiA+ICsJey0xLCAtMSwgMjI0fSwNCj4gPiArDQo+ID4gKwkvKiAyMTAg Ki8NCj4gPiArCXstMSwgLTEsIDIyNX0sDQo+ID4gKwl7LTEsIC0xLCAyMjZ9LA0KPiA+ICsJey0x LCAtMSwgMjI3fSwNCj4gPiArCXstMSwgLTEsIDIyOH0sDQo+ID4gKwl7LTEsIC0xLCAyMjl9LA0K PiA+ICsJey0xLCAtMSwgMjMwfSwNCj4gPiArCXstMSwgLTEsIDIzMX0sDQo+ID4gKwl7LTEsIC0x LCAyMzJ9LA0KPiA+ICsJey0xLCAtMSwgMjMzfSwNCj4gPiArCXstMSwgLTEsIDIzNH0sDQo+ID4g Kw0KPiA+ICsJLyogMjIwICovDQo+ID4gKwl7LTEsIC0xLCAyMzV9LA0KPiA+ICsJey0xLCAtMSwg MjM2fSwNCj4gPiArCXstMSwgLTEsIDIzN30sDQo+ID4gKwl7LTEsIC0xLCAyMzh9LA0KPiA+ICsJ ey0xLCAtMSwgMjM5fSwNCj4gPiArCXstMSwgLTEsIDI0MH0sDQo+ID4gKwl7LTEsIC0xLCAyNDF9 LA0KPiA+ICsJey0xLCAtMSwgMjQyfSwNCj4gPiArCXstMSwgLTEsIDI0M30sDQo+ID4gKwl7LTEs IC0xLCAyNDR9LA0KPiA+ICsNCj4gPiArCS8qIDIzMCAqLw0KPiA+ICsJey0xLCAtMSwgMjQ1fSwN Cj4gPiArCXstMSwgLTEsIDI0Nn0sDQo+ID4gKwl7LTEsIC0xLCAyNDd9LA0KPiA+ICsJey0xLCAt MSwgMjQ4fSwNCj4gPiArCXstMSwgLTEsIDI0OX0sDQo+ID4gKwl7LTEsIC0xLCAyNTB9LA0KPiA+ ICsJey0xLCAtMSwgMjUxfSwNCj4gPiArCXstMSwgLTEsIDI1Mn0sDQo+ID4gKwl7LTEsIC0xLCAy NTN9LA0KPiA+ICsJey0xLCAtMSwgMjU0fSwNCj4gPiArDQo+ID4gKwkvKiAyNDAgKi8NCj4gPiAr CXstMSwgLTEsIDI1NX0sDQo+ID4gKwl7LTEsIC0xLCAyNTZ9LA0KPiA+ICsJey0xLCAtMSwgMjU3 fSwNCj4gPiArCXstMSwgLTEsIDI1OH0sDQo+ID4gKwl7LTEsIC0xLCAyNTl9LA0KPiA+ICsJey0x LCAtMSwgMjYwfSwNCj4gPiArCXstMSwgLTEsIDI2MX0sDQo+ID4gKwl7LTEsIC0xLCAyNjJ9LA0K PiA+ICsJey0xLCAtMSwgMjYzfSwNCj4gPiArCXstMSwgLTEsIDI2NH0sDQo+ID4gKw0KPiA+ICsJ LyogMjUwICovDQo+ID4gKwl7LTEsIC0xLCAyNjV9LA0KPiA+ICsJey0xLCAtMSwgMjY2fSwNCj4g PiArCXstMSwgLTEsIDI2N30sDQo+ID4gKwl7LTEsIC0xLCAyNjh9LA0KPiA+ICsJey0xLCAtMSwg MjY5fSwNCj4gPiArCXstMSwgLTEsIDI3MH0sDQo+ID4gKwl7LTEsIC0xLCAyNzF9LA0KPiA+ICsJ ey0xLCAtMSwgMjcyfSwNCj4gPiArCXstMSwgLTEsIDI3M30sDQo+ID4gKwl7LTEsIC0xLCAyNzR9 LA0KPiA+ICsNCj4gPiArCS8qIDI2MCAqLw0KPiA+ICsJey0xLCAtMSwgMjc1fSwNCj4gPiArCXst MSwgLTEsIDI3Nn0sDQo+ID4gKwl7LTEsIC0xLCAyNzd9LA0KPiA+ICsJey0xLCAtMSwgMjc4fSwN Cj4gPiArCXstMSwgLTEsIDI3OX0sDQo+ID4gKwl7LTEsIC0xLCAyODB9LA0KPiA+ICsJey0xLCAt MSwgMjgxfSwNCj4gPiArCXstMSwgLTEsIDI4Mn0sDQo+ID4gKwl7LTEsIC0xLCAyODN9LA0KPiA+ ICsJey0xLCAtMSwgMjg0fSwNCj4gPiArDQo+ID4gKwkvKiAyNzAgKi8NCj4gPiArCXstMSwgLTEs IDI4NX0sDQo+ID4gKwl7LTEsIC0xLCAyODZ9LA0KPiA+ICsJey0xLCAtMSwgMjg3fSwNCj4gPiAr CXstMSwgLTEsIDI4OH0sDQo+ID4gKwl7LTEsIC0xLCAyODl9LA0KPiA+ICsJey0xLCAtMSwgMjkw fSwNCj4gPiArCXstMSwgLTEsIDI5MX0sDQo+ID4gKwl7LTEsIC0xLCAyOTJ9LA0KPiA+ICsJey0x LCAtMSwgMjkzfSwNCj4gPiArCXstMSwgLTEsIDI5NH0sDQo+ID4gKw0KPiA+ICsJLyogMjgwICov DQo+ID4gKwl7LTEsIC0xLCAyOTV9LA0KPiA+ICsJey0xLCAtMSwgMjk2fSwNCj4gPiArCXstMSwg LTEsIDI5N30sDQo+ID4gKwl7LTEsIC0xLCAyOTh9LA0KPiA+ICsNCj4gPiArfTsNCj4gPiArDQo+ ID4gK3N0YXRpYyBzdHJ1Y3QgbXRrX2RldmljZV9pbmZvIG10Njg3M19kZXZpY2VzX3BlcmkyW10g PSB7DQo+ID4gKwkvKiBzeXNfaWR4LCBjdHJsX2lkeCwgdmlvX2lkeCAqLw0KPiA+ICsJLyogMCAq Lw0KPiA+ICsJezAsIDAsIDB9LA0KPiA+ICsJezAsIDEsIDF9LA0KPiA+ICsJezAsIDIsIDJ9LA0K PiA+ICsJezAsIDMsIDN9LA0KPiA+ICsJezAsIDQsIDR9LA0KPiA+ICsJezAsIDUsIDV9LA0KPiA+ ICsJezAsIDYsIDZ9LA0KPiA+ICsJezAsIDcsIDd9LA0KPiA+ICsJezAsIDgsIDh9LA0KPiA+ICsJ ezAsIDksIDl9LA0KPiA+ICsNCj4gPiArCS8qIDEwICovDQo+ID4gKwl7MCwgMTAsIDEwfSwNCj4g PiArCXswLCAxMSwgMTF9LA0KPiA+ICsJezAsIDEyLCAxMn0sDQo+ID4gKwl7MCwgMTMsIDEzfSwN Cj4gPiArCXswLCAxNCwgMTR9LA0KPiA+ICsJezAsIDE1LCAxNX0sDQo+ID4gKwl7MCwgMTYsIDE2 fSwNCj4gPiArCXswLCAxNywgMTd9LA0KPiA+ICsJezAsIDE4LCAxOH0sDQo+ID4gKwl7MCwgMTks IDE5fSwNCj4gPiArDQo+ID4gKwkvKiAyMCAqLw0KPiA+ICsJezAsIDIwLCAyMH0sDQo+ID4gKwl7 MCwgMjEsIDIxfSwNCj4gPiArCXswLCAyMiwgMjJ9LA0KPiA+ICsJezAsIDIzLCAyM30sDQo+ID4g Kwl7MCwgMjQsIDI0fSwNCj4gPiArCXswLCAyNSwgMjV9LA0KPiA+ICsJezAsIDI2LCAyNn0sDQo+ ID4gKwl7MCwgMjcsIDI3fSwNCj4gPiArCXswLCAyOCwgMjh9LA0KPiA+ICsJezAsIDI5LCAyOX0s DQo+ID4gKw0KPiA+ICsJLyogMzAgKi8NCj4gPiArCXswLCAzMCwgMzB9LA0KPiA+ICsJezAsIDMx LCAzMX0sDQo+ID4gKwl7MCwgMzIsIDMyfSwNCj4gPiArCXswLCAzMywgMzN9LA0KPiA+ICsJezAs IDM0LCAzNH0sDQo+ID4gKwl7MCwgMzUsIDM1fSwNCj4gPiArCXswLCAzNiwgMzZ9LA0KPiA+ICsJ ezAsIDM3LCAzN30sDQo+ID4gKwl7MCwgMzgsIDM4fSwNCj4gPiArCXswLCAzOSwgMzl9LA0KPiA+ ICsNCj4gPiArCS8qIDQwICovDQo+ID4gKwl7MCwgNDAsIDQwfSwNCj4gPiArCXswLCA0MSwgNDF9 LA0KPiA+ICsJezAsIDQyLCA0Mn0sDQo+ID4gKwl7MCwgNDMsIDQzfSwNCj4gPiArCXswLCA0NCwg NDR9LA0KPiA+ICsJezAsIDQ1LCA0NX0sDQo+ID4gKwl7MCwgNDYsIDQ2fSwNCj4gPiArCXswLCA0 NywgNDd9LA0KPiA+ICsJezAsIDQ4LCA0OH0sDQo+ID4gKwl7MCwgNDksIDQ5fSwNCj4gPiArDQo+ ID4gKwkvKiA1MCAqLw0KPiA+ICsJezAsIDUwLCA1MH0sDQo+ID4gKwl7MCwgNTEsIDUxfSwNCj4g PiArCXswLCA1MiwgNTJ9LA0KPiA+ICsJezAsIDUzLCA1M30sDQo+ID4gKwl7MCwgNTQsIDU0fSwN Cj4gPiArCXswLCA1NSwgNTV9LA0KPiA+ICsJezAsIDU2LCA1Nn0sDQo+ID4gKwl7MCwgNTcsIDU3 fSwNCj4gPiArCXswLCA1OCwgNTh9LA0KPiA+ICsJezAsIDU5LCA1OX0sDQo+ID4gKw0KPiA+ICsJ LyogNjAgKi8NCj4gPiArCXswLCA2MCwgNjB9LA0KPiA+ICsJezAsIDYxLCA2MX0sDQo+ID4gKwl7 MCwgNjIsIDYyfSwNCj4gPiArCXswLCA2MywgNjN9LA0KPiA+ICsJezAsIDY0LCA2NH0sDQo+ID4g Kwl7MCwgNjUsIDY1fSwNCj4gPiArCXswLCA2NiwgNjZ9LA0KPiA+ICsJezAsIDY3LCA2N30sDQo+ ID4gKwl7MCwgNjgsIDY4fSwNCj4gPiArCXswLCA2OSwgNjl9LA0KPiA+ICsNCj4gPiArCS8qIDcw ICovDQo+ID4gKwl7MCwgNzAsIDcwfSwNCj4gPiArCXswLCA3MSwgNzF9LA0KPiA+ICsJezAsIDcy LCA3Mn0sDQo+ID4gKwl7MCwgNzMsIDczfSwNCj4gPiArCXswLCA3NCwgNzR9LA0KPiA+ICsJezAs IDc1LCA3NX0sDQo+ID4gKwl7MCwgNzYsIDc2fSwNCj4gPiArCXswLCA3NywgNzd9LA0KPiA+ICsJ ezAsIDc4LCA3OH0sDQo+ID4gKwl7MCwgNzksIDc5fSwNCj4gPiArDQo+ID4gKwkvKiA4MCAqLw0K PiA+ICsJezAsIDgwLCA4MH0sDQo+ID4gKwl7MCwgODEsIDgxfSwNCj4gPiArCXswLCA4MiwgODJ9 LA0KPiA+ICsJezAsIDgzLCA4M30sDQo+ID4gKwl7MCwgODQsIDg0fSwNCj4gPiArCXswLCA4NSwg ODV9LA0KPiA+ICsJezAsIDg2LCA4Nn0sDQo+ID4gKwl7MCwgODcsIDg3fSwNCj4gPiArCXswLCA4 OCwgODh9LA0KPiA+ICsJezAsIDg5LCA4OX0sDQo+ID4gKw0KPiA+ICsJLyogOTAgKi8NCj4gPiAr CXswLCA5MCwgOTB9LA0KPiA+ICsJezAsIDkxLCA5MX0sDQo+ID4gKwl7MCwgOTIsIDkyfSwNCj4g PiArCXswLCA5MywgOTN9LA0KPiA+ICsJezAsIDk0LCA5NH0sDQo+ID4gKwl7MCwgOTUsIDk1fSwN Cj4gPiArCXswLCA5NiwgOTZ9LA0KPiA+ICsJezAsIDk3LCA5N30sDQo+ID4gKwl7MCwgOTgsIDk4 fSwNCj4gPiArCXswLCA5OSwgOTl9LA0KPiA+ICsNCj4gPiArCS8qIDEwMCAqLw0KPiA+ICsJezAs IDEwMCwgMTAwfSwNCj4gPiArCXswLCAxMDEsIDEwM30sDQo+ID4gKwl7MCwgMTAyLCAxMDR9LA0K PiA+ICsJezAsIDEwMywgMTA1fSwNCj4gPiArCXswLCAxMDQsIDEwNn0sDQo+ID4gKwl7MCwgMTA1 LCAxMDd9LA0KPiA+ICsJezAsIDEwNiwgMTA4fSwNCj4gPiArCXswLCAxMDcsIDEwOX0sDQo+ID4g Kwl7MCwgMTA4LCAxMTB9LA0KPiA+ICsJezAsIDEwOSwgMTExfSwNCj4gPiArDQo+ID4gKwkvKiAx MTAgKi8NCj4gPiArCXswLCAxMTAsIDExMn0sDQo+ID4gKwl7MCwgMTExLCAxMTN9LA0KPiA+ICsJ ezAsIDExMiwgMTE0fSwNCj4gPiArCXswLCAxMTMsIDExNX0sDQo+ID4gKwl7MCwgMTE0LCAxMTZ9 LA0KPiA+ICsJey0xLCAtMSwgMTE3fSwNCj4gPiArCXstMSwgLTEsIDExOH0sDQo+ID4gKwl7LTEs IC0xLCAxMTl9LA0KPiA+ICsJey0xLCAtMSwgMTIwfSwNCj4gPiArCXstMSwgLTEsIDEyMX0sDQo+ ID4gKw0KPiA+ICsJLyogMTIwICovDQo+ID4gKwl7LTEsIC0xLCAxMjJ9LA0KPiA+ICsJey0xLCAt MSwgMTIzfSwNCj4gPiArCXstMSwgLTEsIDEyNH0sDQo+ID4gKwl7LTEsIC0xLCAxMjV9LA0KPiA+ ICsJey0xLCAtMSwgMTI2fSwNCj4gPiArCXstMSwgLTEsIDEyN30sDQo+ID4gKwl7LTEsIC0xLCAx Mjh9LA0KPiA+ICsJey0xLCAtMSwgMTI5fSwNCj4gPiArCXstMSwgLTEsIDEzMH0sDQo+ID4gKwl7 LTEsIC0xLCAxMzF9LA0KPiA+ICsNCj4gPiArCS8qIDEzMCAqLw0KPiA+ICsJey0xLCAtMSwgMTMy fSwNCj4gPiArCXstMSwgLTEsIDEzM30sDQo+ID4gKwl7LTEsIC0xLCAxMzR9LA0KPiA+ICsJey0x LCAtMSwgMTM1fSwNCj4gPiArCXstMSwgLTEsIDEzNn0sDQo+ID4gKwl7LTEsIC0xLCAxMzd9LA0K PiA+ICsJey0xLCAtMSwgMTM4fSwNCj4gPiArCXstMSwgLTEsIDEzOX0sDQo+ID4gKwl7LTEsIC0x LCAxNDB9LA0KPiA+ICsJey0xLCAtMSwgMTQxfSwNCj4gPiArDQo+ID4gKwkvKiAxNDAgKi8NCj4g PiArCXstMSwgLTEsIDE0Mn0sDQo+ID4gKwl7LTEsIC0xLCAxNDN9LA0KPiA+ICsJey0xLCAtMSwg MTQ0fSwNCj4gPiArCXstMSwgLTEsIDE0NX0sDQo+ID4gKwl7LTEsIC0xLCAxNDZ9LA0KPiA+ICsJ ey0xLCAtMSwgMTQ3fSwNCj4gPiArCXstMSwgLTEsIDE0OH0sDQo+ID4gKwl7LTEsIC0xLCAxNDl9 LA0KPiA+ICsJey0xLCAtMSwgMTUwfSwNCj4gPiArCXstMSwgLTEsIDE1MX0sDQo+ID4gKw0KPiA+ ICsJLyogMTUwICovDQo+ID4gKwl7LTEsIC0xLCAxNTJ9LA0KPiA+ICsJey0xLCAtMSwgMTUzfSwN Cj4gPiArCXstMSwgLTEsIDE1NH0sDQo+ID4gKwl7LTEsIC0xLCAxNTV9LA0KPiA+ICsJey0xLCAt MSwgMTU2fSwNCj4gPiArCXstMSwgLTEsIDE1N30sDQo+ID4gKwl7LTEsIC0xLCAxNTh9LA0KPiA+ ICsJey0xLCAtMSwgMTU5fSwNCj4gPiArCXstMSwgLTEsIDE2MH0sDQo+ID4gKwl7LTEsIC0xLCAx NjF9LA0KPiA+ICsNCj4gPiArCS8qIDE2MCAqLw0KPiA+ICsJey0xLCAtMSwgMTYyfSwNCj4gPiAr CXstMSwgLTEsIDE2M30sDQo+ID4gKwl7LTEsIC0xLCAxNjR9LA0KPiA+ICsJey0xLCAtMSwgMTY1 fSwNCj4gPiArCXstMSwgLTEsIDE2Nn0sDQo+ID4gKwl7LTEsIC0xLCAxNjd9LA0KPiA+ICsJey0x LCAtMSwgMTY4fSwNCj4gPiArCXstMSwgLTEsIDE2OX0sDQo+ID4gKwl7LTEsIC0xLCAxNzB9LA0K PiA+ICsJey0xLCAtMSwgMTcxfSwNCj4gPiArDQo+ID4gKwkvKiAxNzAgKi8NCj4gPiArCXstMSwg LTEsIDE3Mn0sDQo+ID4gKwl7LTEsIC0xLCAxNzN9LA0KPiA+ICsJey0xLCAtMSwgMTc0fSwNCj4g PiArCXstMSwgLTEsIDE3NX0sDQo+ID4gKwl7LTEsIC0xLCAxNzZ9LA0KPiA+ICsJey0xLCAtMSwg MTc3fSwNCj4gPiArCXstMSwgLTEsIDE3OH0sDQo+ID4gKwl7LTEsIC0xLCAxNzl9LA0KPiA+ICsJ ey0xLCAtMSwgMTgwfSwNCj4gPiArCXstMSwgLTEsIDE4MX0sDQo+ID4gKw0KPiA+ICsJLyogMTgw ICovDQo+ID4gKwl7LTEsIC0xLCAxODJ9LA0KPiA+ICsJey0xLCAtMSwgMTgzfSwNCj4gPiArCXst MSwgLTEsIDE4NH0sDQo+ID4gKwl7LTEsIC0xLCAxODV9LA0KPiA+ICsJey0xLCAtMSwgMTg2fSwN Cj4gPiArCXstMSwgLTEsIDE4N30sDQo+ID4gKwl7LTEsIC0xLCAxODh9LA0KPiA+ICsJey0xLCAt MSwgMTg5fSwNCj4gPiArCXstMSwgLTEsIDE5MH0sDQo+ID4gKwl7LTEsIC0xLCAxOTF9LA0KPiA+ ICsNCj4gPiArCS8qIDE5MCAqLw0KPiA+ICsJey0xLCAtMSwgMTkyfSwNCj4gPiArCXstMSwgLTEs IDE5M30sDQo+ID4gKwl7LTEsIC0xLCAxOTR9LA0KPiA+ICsJey0xLCAtMSwgMTk1fSwNCj4gPiAr CXstMSwgLTEsIDE5Nn0sDQo+ID4gKwl7LTEsIC0xLCAxOTd9LA0KPiA+ICsJey0xLCAtMSwgMTk4 fSwNCj4gPiArCXstMSwgLTEsIDE5OX0sDQo+ID4gKwl7LTEsIC0xLCAyMDB9LA0KPiA+ICsJey0x LCAtMSwgMjAxfSwNCj4gPiArDQo+ID4gKwkvKiAyMDAgKi8NCj4gPiArCXstMSwgLTEsIDIwMn0s DQo+ID4gKwl7LTEsIC0xLCAyMDN9LA0KPiA+ICsJey0xLCAtMSwgMjA0fSwNCj4gPiArCXstMSwg LTEsIDIwNX0sDQo+ID4gKwl7LTEsIC0xLCAyMDZ9LA0KPiA+ICsJey0xLCAtMSwgMjA3fSwNCj4g PiArCXstMSwgLTEsIDIwOH0sDQo+ID4gKwl7LTEsIC0xLCAyMDl9LA0KPiA+ICsJey0xLCAtMSwg MjEwfSwNCj4gPiArCXstMSwgLTEsIDIxMX0sDQo+ID4gKw0KPiA+ICsJLyogMjEwICovDQo+ID4g Kwl7LTEsIC0xLCAyMTJ9LA0KPiA+ICsJey0xLCAtMSwgMjEzfSwNCj4gPiArCXstMSwgLTEsIDIx NH0sDQo+ID4gKwl7LTEsIC0xLCAyMTV9LA0KPiA+ICsJey0xLCAtMSwgMjE2fSwNCj4gPiArCXst MSwgLTEsIDIxN30sDQo+ID4gKwl7LTEsIC0xLCAyMTh9LA0KPiA+ICsJey0xLCAtMSwgMjE5fSwN Cj4gPiArCXstMSwgLTEsIDIyMH0sDQo+ID4gKwl7LTEsIC0xLCAyMjF9LA0KPiA+ICsNCj4gPiAr CS8qIDIyMCAqLw0KPiA+ICsJey0xLCAtMSwgMjIyfSwNCj4gPiArCXstMSwgLTEsIDIyM30sDQo+ ID4gKwl7LTEsIC0xLCAyMjR9LA0KPiA+ICsJey0xLCAtMSwgMjI1fSwNCj4gPiArCXstMSwgLTEs IDIyNn0sDQo+ID4gKwl7LTEsIC0xLCAyMjd9LA0KPiA+ICsJey0xLCAtMSwgMjI4fSwNCj4gPiAr CXstMSwgLTEsIDIyOX0sDQo+ID4gKwl7LTEsIC0xLCAyMzB9LA0KPiA+ICsJey0xLCAtMSwgMjMx fSwNCj4gPiArDQo+ID4gKwkvKiAyMzAgKi8NCj4gPiArCXstMSwgLTEsIDIzMn0sDQo+ID4gKwl7 LTEsIC0xLCAyMzN9LA0KPiA+ICsJey0xLCAtMSwgMjM0fSwNCj4gPiArCXstMSwgLTEsIDIzNX0s DQo+ID4gKwl7LTEsIC0xLCAyMzZ9LA0KPiA+ICsJey0xLCAtMSwgMjM3fSwNCj4gPiArCXstMSwg LTEsIDIzOH0sDQo+ID4gKwl7LTEsIC0xLCAyMzl9LA0KPiA+ICsJey0xLCAtMSwgMjQwfSwNCj4g PiArCXstMSwgLTEsIDI0MX0sDQo+ID4gKw0KPiA+ICsJLyogMjQwICovDQo+ID4gKwl7LTEsIC0x LCAyNDJ9LA0KPiA+ICsJey0xLCAtMSwgMjQzfSwNCj4gPiArCXstMSwgLTEsIDI0NH0sDQo+ID4g Kwl7LTEsIC0xLCAyNDV9LA0KPiA+ICsJey0xLCAtMSwgMjQ2fSwNCj4gPiArCXstMSwgLTEsIDI0 N30sDQo+ID4gKwl7LTEsIC0xLCAyNDh9LA0KPiA+ICsNCj4gPiArfTsNCj4gPiArDQo+ID4gK3N0 YXRpYyBzdHJ1Y3QgbXRrX2RldmljZV9pbmZvIG10Njg3M19kZXZpY2VzX3BlcmlfcGFyW10gPSB7 DQo+ID4gKwkvKiBzeXNfaWR4LCBjdHJsX2lkeCwgdmlvX2lkeCAqLw0KPiA+ICsJLyogMCAqLw0K PiA+ICsJezAsIDAsIDB9LA0KPiA+ICsJezAsIDEsIDF9LA0KPiA+ICsJezAsIDIsIDJ9LA0KPiA+ ICsJezAsIDMsIDN9LA0KPiA+ICsJezAsIDQsIDR9LA0KPiA+ICsJezAsIDUsIDV9LA0KPiA+ICsJ ezAsIDYsIDZ9LA0KPiA+ICsJezAsIDcsIDd9LA0KPiA+ICsJezAsIDgsIDh9LA0KPiA+ICsJezAs IDksIDl9LA0KPiA+ICsNCj4gPiArCS8qIDEwICovDQo+ID4gKwl7MCwgMTAsIDEwfSwNCj4gPiAr CXswLCAxMSwgMTF9LA0KPiA+ICsJezAsIDEyLCAxMn0sDQo+ID4gKwl7MCwgMTMsIDEzfSwNCj4g PiArCXswLCAxNCwgMTR9LA0KPiA+ICsJezAsIDE1LCAxNX0sDQo+ID4gKwl7MCwgMTYsIDE2fSwN Cj4gPiArCXswLCAxNywgMTd9LA0KPiA+ICsJezAsIDE4LCAxOH0sDQo+ID4gKwl7MCwgMTksIDE5 fSwNCj4gPiArDQo+ID4gKwkvKiAyMCAqLw0KPiA+ICsJezAsIDIwLCAyMH0sDQo+ID4gKwl7MCwg MjEsIDIxfSwNCj4gPiArCXswLCAyMiwgMjJ9LA0KPiA+ICsJezAsIDIzLCAyM30sDQo+ID4gKwl7 MCwgMjQsIDI0fSwNCj4gPiArCXswLCAyNSwgMjV9LA0KPiA+ICsJezAsIDI2LCAyNn0sDQo+ID4g Kwl7LTEsIC0xLCAyN30sDQo+ID4gKwl7LTEsIC0xLCAyOH0sDQo+ID4gKwl7LTEsIC0xLCAyOX0s DQo+ID4gKw0KPiA+ICsJLyogMzAgKi8NCj4gPiArCXstMSwgLTEsIDMwfSwNCj4gPiArCXstMSwg LTEsIDMxfSwNCj4gPiArCXstMSwgLTEsIDMyfSwNCj4gPiArCXstMSwgLTEsIDMzfSwNCj4gPiAr CXstMSwgLTEsIDM0fSwNCj4gPiArCXstMSwgLTEsIDM1fSwNCj4gPiArCXstMSwgLTEsIDM2fSwN Cj4gPiArCXstMSwgLTEsIDM3fSwNCj4gPiArCXstMSwgLTEsIDM4fSwNCj4gPiArCXstMSwgLTEs IDM5fSwNCj4gPiArDQo+ID4gKwkvKiA0MCAqLw0KPiA+ICsJey0xLCAtMSwgNDB9LA0KPiA+ICsJ ey0xLCAtMSwgNDF9LA0KPiA+ICsJey0xLCAtMSwgNDJ9LA0KPiA+ICsJey0xLCAtMSwgNDN9LA0K PiA+ICsJey0xLCAtMSwgNDR9LA0KPiA+ICsJey0xLCAtMSwgNDV9LA0KPiA+ICsJey0xLCAtMSwg NDZ9LA0KPiA+ICsJey0xLCAtMSwgNDd9LA0KPiA+ICsJey0xLCAtMSwgNDh9LA0KPiA+ICsJey0x LCAtMSwgNDl9LA0KPiA+ICsNCj4gPiArCS8qIDUwICovDQo+ID4gKwl7LTEsIC0xLCA1MH0sDQo+ ID4gKwl7LTEsIC0xLCA1MX0sDQo+ID4gKwl7LTEsIC0xLCA1Mn0sDQo+ID4gKwl7LTEsIC0xLCA1 M30sDQo+ID4gKwl7LTEsIC0xLCA1NH0sDQo+ID4gKwl7LTEsIC0xLCA1NX0sDQo+ID4gKwl7LTEs IC0xLCA1Nn0sDQo+ID4gKwl7LTEsIC0xLCA1N30sDQo+ID4gKw0KPiA+ICt9Ow0KPiA+ICsNCj4g PiArc3RhdGljIHN0cnVjdCBtdGtfZGV2aWNlX251bSBtdGs2ODczX2RldmljZXNfbnVtW10gPSB7 DQo+ID4gKwl7U0xBVkVfVFlQRV9JTkZSQSwgVklPX1NMQVZFX05VTV9JTkZSQX0sDQo+ID4gKwl7 U0xBVkVfVFlQRV9QRVJJLCBWSU9fU0xBVkVfTlVNX1BFUkl9LA0KPiA+ICsJe1NMQVZFX1RZUEVf UEVSSTIsIFZJT19TTEFWRV9OVU1fUEVSSTJ9LA0KPiA+ICsJe1NMQVZFX1RZUEVfUEVSSV9QQVIs IFZJT19TTEFWRV9OVU1fUEVSSV9QQVJ9LA0KPiA+ICt9Ow0KPiA+ICsNCj4gPiArc3RhdGljIHN0 cnVjdCBJTkZSQUFYSV9JRF9JTkZPIHBlcmlfbWlfaWRfdG9fbWFzdGVyW10gPSB7DQo+ID4gKwl7 IlRIRVJNMiIsICAgIDB4MCwgMHg3fSwNCj4gPiArCXsiU1BNIiwgICAgICAgMHgyLCAweDd9LA0K PiA+ICsJeyJDQ1UiLCAgICAgICAweDQsIDB4N30sDQo+ID4gKwl7IlRIRVJNIiwgICAgIDB4Niwg MHg3fSwNCj4gPiArCXsiU1BNX0RSQU1DIiwgMHgzLCAweDd9LA0KPiA+ICt9Ow0KPiA+ICsNCj4g PiArc3RhdGljIHN0cnVjdCBJTkZSQUFYSV9JRF9JTkZPIGluZnJhX21pX2lkX3RvX21hc3Rlcltd ID0gew0KPiA+ICsJeyJDT05OU1lTX1dGRE1BIiwgICAweDAsICAgIDB4M2ZmZn0sDQo+ID4gKwl7 IkNPTk5TWVNfSUNBUCIsICAgIDB4MTAsICAgMHgzZmZmfSwNCj4gPiArCXsiQ09OTlNZU19NQ1Vf U1lTIiwgMHgyMCwgICAweDNmZmZ9LA0KPiA+ICsJeyJDT05OU1lTX0dQUyIsICAgICAweDMwLCAg IDB4M2ZmZn0sDQo+ID4gKwl7IlRpbnlzeXMiLCAgICAgICAgIDB4MiwgICAgMHgzYzBmfSwNCj4g PiArCXsiQ1FfRE1BIiwgICAgICAgICAgMHg0LCAgICAweDNjN2Z9LA0KPiA+ICsJeyJEZWJ1Z1Rv cCIsICAgICAgICAweDE0LCAgIDB4M2Y3Zn0sDQo+ID4gKwl7IlNTVVNCIiwgICAgICAgICAgIDB4 MjQsICAgMHhmZmZ9LA0KPiA+ICsJeyJTU1VTQjIiLCAgICAgICAgICAweDQyNCwgIDB4ZmZmfSwN Cj4gPiArCXsiTk9SIiwgICAgICAgICAgICAgMHg4MjQsICAweGZmZn0sDQo+ID4gKwl7IlBXTSIs ICAgICAgICAgICAgIDB4YzI0LCAgMHgzZmZmfSwNCj4gPiArCXsiU1BJNiIsICAgICAgICAgICAg MHgyYzI0LCAweDNmZmZ9LA0KPiA+ICsJeyJTUEkwIiwgICAgICAgICAgICAweDNjMjQsIDB4M2Zm Zn0sDQo+ID4gKwl7IkFQVSIsICAgICAgICAgICAgIDB4YTQsICAgMHgzM2ZmfSwNCj4gPiArCXsi U1BJMiIsICAgICAgICAgICAgMHgxMjQsICAweDNmZmZ9LA0KPiA+ICsJeyJTUEkzIiwgICAgICAg ICAgICAweDUyNCwgIDB4M2ZmZn0sDQo+ID4gKwl7IlNQSTQiLCAgICAgICAgICAgIDB4OTI0LCAg MHgzZmZmfSwNCj4gPiArCXsiU1BJNSIsICAgICAgICAgICAgMHhkMjQsICAweDNmZmZ9LA0KPiA+ ICsJeyJTUEk3IiwgICAgICAgICAgICAweDFhNCwgIDB4M2ZmZn0sDQo+ID4gKwl7IkF1ZGlvIiwg ICAgICAgICAgIDB4OWE0LCAgMHgzZmZmfSwNCj4gPiArCXsiU1BJMSIsICAgICAgICAgICAgMHhk YTQsICAweDNmZmZ9LA0KPiA+ICsJeyJBUF9ETUFfRVhUIiwgICAgICAweDIyNCwgIDB4MjNmZn0s DQo+ID4gKwl7IlRIRVJNMiIsICAgICAgICAgIDB4MmE0LCAgMHgzZmZmfSwNCj4gPiArCXsiU1BN IiwgICAgICAgICAgICAgMHg2YTQsICAweDNmZmZ9LA0KPiA+ICsJeyJDQ1UiLCAgICAgICAgICAg ICAweGFhNCwgIDB4M2ZmZn0sDQo+ID4gKwl7IlRIRVJNIiwgICAgICAgICAgIDB4ZWE0LCAgMHgz ZmZmfSwNCj4gPiArCXsiRFhfQ0MiLCAgICAgICAgICAgMHgzNCwgICAweDM4N2Z9LA0KPiA+ICsJ eyJHQ0UiLCAgICAgICAgICAgICAweDQ0LCAgIDB4M2U3Zn0sDQo+ID4gKwl7IlBDSUUiLCAgICAg ICAgICAgIDB4NjQsICAgMHgzMDdmfSwNCj4gPiArCXsiRFBNQUlGIiwgICAgICAgICAgMHg2LCAg ICAweDNmMGZ9LA0KPiA+ICsJeyJTU1BNIiwgICAgICAgICAgICAweDgsICAgIDB4M2Y4Zn0sDQo+ ID4gKwl7IlVGUyIsICAgICAgICAgICAgIDB4YSwgICAgMHgzZjlmfSwNCj4gPiArCXsiTVNEQzAi LCAgICAgICAgICAgMHgxYSwgICAweDNmZmZ9LA0KPiA+ICsJeyJNU0RDMSIsICAgICAgICAgICAw eDNhLCAgIDB4M2ZmZn0sDQo+ID4gKwl7Ik1TREMyIiwgICAgICAgICAgIDB4N2EsICAgMHgzZmZm fSwNCj4gPiArCXsiQ1BVRUIiLCAgICAgICAgICAgMHhjLCAgICAweDNjMGZ9LA0KPiA+ICsJeyJB UE1DVV93cml0ZSIsICAgICAweDEsICAgIDB4M2ZlMX0sDQo+ID4gKwl7IkFQTUNVX3dyaXRlIiwg ICAgIDB4ODEsICAgMHgzZmUxfSwNCj4gPiArCXsiQVBNQ1Vfd3JpdGUiLCAgICAgMHgyMDEsICAw eDNlMDF9LA0KPiA+ICsJeyJBUE1DVV9yZWFkIiwgICAgICAweDEsICAgIDB4M2ZlMX0sDQo+ID4g Kwl7IkFQTUNVX3JlYWQiLCAgICAgIDB4ODEsICAgMHgzZmUxfSwNCj4gPiArCXsiQVBNQ1VfcmVh ZCIsICAgICAgMHgxMDEsICAweDNmZmR9LA0KPiA+ICsJeyJBUE1DVV9yZWFkIiwgICAgICAweDEw NSwgIDB4M2ZmZH0sDQo+ID4gKwl7IkFQTUNVX3JlYWQiLCAgICAgIDB4MjAxLCAgMHgzZTAxfSwN Cj4gPiArCXsiQVBNQ1VfcmVhZCIsICAgICAgMHg0MDEsICAweDNjMDF9LA0KPiA+ICt9Ow0KPiA+ ICsNCj4gPiArc3RhdGljIGNvbnN0IGNoYXIgKmluZnJhX21pX3RyYW5zKHUzMiBidXNfaWQpDQo+ ID4gK3sNCj4gPiArCWludCBtYXN0ZXJfY291bnQgPSBBUlJBWV9TSVpFKGluZnJhX21pX2lkX3Rv X21hc3Rlcik7DQo+ID4gKwljb25zdCBjaGFyICptYXN0ZXIgPSAiVU5LTk9XTl9NQVNURVJfRlJP TV9JTkZSQSI7DQo+ID4gKwlpbnQgaTsNCj4gPiArDQo+ID4gKwlmb3IgKGkgPSAwOyBpIDwgbWFz dGVyX2NvdW50OyBpKyspIHsNCj4gPiArCQlpZiAoKGJ1c19pZCAmIGluZnJhX21pX2lkX3RvX21h c3RlcltpXS5tYXNrKSA9PQ0KPiA+ICsJCSAgICBpbmZyYV9taV9pZF90b19tYXN0ZXJbaV0uYnVz X2lkKQ0KPiA+ICsJCQltYXN0ZXIgPSBpbmZyYV9taV9pZF90b19tYXN0ZXJbaV0ubWFzdGVyOw0K PiA+ICsJfQ0KPiA+ICsNCj4gPiArCXJldHVybiBtYXN0ZXI7DQo+ID4gK30NCj4gPiArDQo+ID4g K3N0YXRpYyBjb25zdCBjaGFyICpwZXJpX21pX3RyYW5zKHUzMiBidXNfaWQpDQo+ID4gK3sNCj4g PiArCWludCBtYXN0ZXJfY291bnQgPSBBUlJBWV9TSVpFKHBlcmlfbWlfaWRfdG9fbWFzdGVyKTsN Cj4gPiArCWNvbnN0IGNoYXIgKm1hc3RlciA9ICJVTktOT1dOX01BU1RFUl9GUk9NX1BFUkkiOw0K PiA+ICsJaW50IGk7DQo+ID4gKw0KPiA+ICsJaWYgKChidXNfaWQgJiAweDMpID09IDB4MCkNCj4g PiArCQlyZXR1cm4gaW5mcmFfbWlfdHJhbnMoYnVzX2lkID4+IDIpOw0KPiA+ICsJZWxzZSBpZiAo KGJ1c19pZCAmIDB4MykgPT0gMHgyKQ0KPiA+ICsJCXJldHVybiAiTURfQVBfTSI7DQo+ID4gKwll bHNlIGlmICgoYnVzX2lkICYgMHgzKSA9PSAweDMpDQo+ID4gKwkJcmV0dXJuICJBUF9ETUFfTSI7 DQo+ID4gKw0KPiA+ICsJYnVzX2lkID0gYnVzX2lkID4+IDI7DQo+ID4gKw0KPiA+ICsJZm9yIChp ID0gMCA7IGkgPCBtYXN0ZXJfY291bnQ7IGkrKykgew0KPiA+ICsJCWlmICgoYnVzX2lkICYgcGVy aV9taV9pZF90b19tYXN0ZXJbaV0ubWFzaykgPT0NCj4gPiArCQkgICAgcGVyaV9taV9pZF90b19t YXN0ZXJbaV0uYnVzX2lkKQ0KPiA+ICsJCQltYXN0ZXIgPSBpbmZyYV9taV9pZF90b19tYXN0ZXJb aV0ubWFzdGVyOw0KPiA+ICsJfQ0KPiA+ICsNCj4gPiArCXJldHVybiBtYXN0ZXI7DQo+ID4gK30N Cj4gPiArDQo+ID4gK3N0YXRpYyBjb25zdCBjaGFyICptdDY4NzNfYnVzX2lkX3RvX21hc3Rlcih1 MzIgYnVzX2lkLCB1MzIgdmlvX2FkZHIsDQo+ID4gKwkJCQkJICAgaW50IHNsYXZlX3R5cGUsIGlu dCBzaGlmdF9zdGFfYml0LA0KPiA+ICsJCQkJCSAgIGludCBkb21haW4pDQo+ID4gK3sNCj4gPiAr CXU4IGhfMWJ5dGU7DQo+ID4gKw0KPiA+ICsJaWYgKGJ1c19pZCA9PSAweDAgJiYgdmlvX2FkZHIg PT0gMHgwKQ0KPiA+ICsJCXJldHVybiBOVUxMOw0KPiA+ICsNCj4gPiArCWhfMWJ5dGUgPSAodmlv X2FkZHIgPj4gMjQpICYgMHhGRjsNCj4gPiArDQo+ID4gKwlpZiAoc2xhdmVfdHlwZSA9PSBTTEFW RV9UWVBFX0lORlJBKSB7DQo+ID4gKwkJaWYgKHZpb19hZGRyIDw9IDB4MUZGRkZGKSB7DQo+ID4g KwkJCWlmICgoYnVzX2lkICYgMHgxKSA9PSAwKQ0KPiA+ICsJCQkJcmV0dXJuICJFTUlfTDJDX00i Ow0KPiA+ICsNCj4gPiArCQkJcmV0dXJuIGluZnJhX21pX3RyYW5zKGJ1c19pZCA+PiAxKTsNCj4g PiArDQo+ID4gKwkJfSBlbHNlIGlmIChzaGlmdF9zdGFfYml0ID09IDMpIHsNCj4gPiArCQkJaWYg KChidXNfaWQgJiAweDEpID09IDApDQo+ID4gKwkJCQlyZXR1cm4gIkVNSV9MMkNfTSI7DQo+ID4g Kw0KPiA+ICsJCQlyZXR1cm4gaW5mcmFfbWlfdHJhbnMoYnVzX2lkID4+IDEpOw0KPiA+ICsNCj4g PiArCQl9IGVsc2UgaWYgKHNoaWZ0X3N0YV9iaXQgPT0gNCkgew0KPiA+ICsJCQlpZiAoKGJ1c19p ZCAmIDB4MSkgPT0gMSkNCj4gPiArCQkJCXJldHVybiAiR0NFX00iOw0KPiA+ICsNCj4gPiArCQkJ cmV0dXJuIGluZnJhX21pX3RyYW5zKGJ1c19pZCA+PiAxKTsNCj4gPiArCQl9DQo+ID4gKw0KPiA+ ICsJCXJldHVybiBpbmZyYV9taV90cmFucyhidXNfaWQpOw0KPiA+ICsNCj4gPiArCX0gZWxzZSBp ZiAoc2xhdmVfdHlwZSA9PSBTTEFWRV9UWVBFX1BFUkkpIHsNCj4gPiArCQlpZiAoKGhfMWJ5dGUg Pj0gMHgxNCAmJiBoXzFieXRlIDwgMHgxOCkgfHwNCj4gPiArCQkgICAgKGhfMWJ5dGUgPj0gMHgx QSAmJiBoXzFieXRlIDwgMHgxQykgfHwNCj4gPiArCQkgICAgKGhfMWJ5dGUgPj0gMHgxRiAmJiBo XzFieXRlIDwgMHgyMCkpIHsNCj4gPiArCQkJaWYgKChidXNfaWQgJiAweDEpID09IDEpDQo+ID4g KwkJCQlyZXR1cm4gIkdDRV9NIjsNCj4gPiArDQo+ID4gKwkJCXJldHVybiBpbmZyYV9taV90cmFu cyhidXNfaWQgPj4gMSk7DQo+ID4gKwkJfQ0KPiA+ICsNCj4gPiArCQlpZiAoc2hpZnRfc3RhX2Jp dCA9PSAzIHx8IHNoaWZ0X3N0YV9iaXQgPT0gNCB8fA0KPiA+ICsJCSAgICBzaGlmdF9zdGFfYml0 ID09IDgpIHsNCj4gPiArCQkJaWYgKChidXNfaWQgJiAweDEpID09IDApDQo+ID4gKwkJCQlyZXR1 cm4gIk1EX0FQX00iOw0KPiA+ICsNCj4gPiArCQkJcmV0dXJuIHBlcmlfbWlfdHJhbnMoYnVzX2lk ID4+IDEpOw0KPiA+ICsJCX0NCj4gPiArCQlyZXR1cm4gcGVyaV9taV90cmFucyhidXNfaWQpOw0K PiA+ICsNCj4gPiArCX0gZWxzZSBpZiAoc2xhdmVfdHlwZSA9PSBTTEFWRV9UWVBFX1BFUkkyKSB7 DQo+ID4gKwkJcmV0dXJuIHBlcmlfbWlfdHJhbnMoYnVzX2lkKTsNCj4gPiArDQo+ID4gKwl9IGVs c2UgaWYgKHNsYXZlX3R5cGUgPT0gU0xBVkVfVFlQRV9QRVJJX1BBUikgew0KPiA+ICsJCXJldHVy biBwZXJpX21pX3RyYW5zKGJ1c19pZCk7DQo+ID4gKwl9DQo+ID4gKw0KPiA+ICsJcmV0dXJuICJV TktOT1dOX01BU1RFUiI7DQo+ID4gK30NCj4gPiArDQo+ID4gK3N0YXRpYyB2b2lkIG1tMm5kX3Zp b19oYW5kbGVyKHZvaWQgX19pb21lbSAqaW5mcmFjZmcsDQo+ID4gKwkJCSAgICAgIHN0cnVjdCBt dGtfZGV2YXBjX3Zpb19pbmZvICp2aW9faW5mbywNCj4gPiArCQkJICAgICAgYm9vbCBtZHBfdmlv LCBib29sIGRpc3AyX3ZpbywgYm9vbCBtbXN5c192aW8pDQo+ID4gK3sNCj4gPiArCXUzMiB2aW9f c3RhLCB2aW9fZGJnLCBydzsNCj4gPiArCXUzMiB2aW9fc3RhX251bTsNCj4gPiArCXUzMiB2aW8w X29mZnNldDsNCj4gPiArCWNoYXIgbW1fc3RyWzY0XSA9IHswfTsNCj4gPiArCXZvaWQgX19pb21l bSAqcmVnOw0KPiA+ICsJaW50IGk7DQo+ID4gKw0KPiA+ICsJaWYgKCFpbmZyYWNmZykNCj4gPiAr CQlyZXR1cm47DQo+ID4gKw0KPiA+ICsJaWYgKG1kcF92aW8pIHsNCj4gPiArCQl2aW9fc3RhX251 bSA9IElORlJBQ0ZHX01EUF9WSU9fU1RBX05VTTsNCj4gPiArCQl2aW8wX29mZnNldCA9IElORlJB Q0ZHX01EUF9TRUNfVklPMF9PRkZTRVQ7DQo+ID4gKw0KPiA+ICsJCXN0cm5jcHkobW1fc3RyLCAi SU5GUkFDRkdfTURQX1NFQ19WSU8iLA0KPiA+ICsJCQlzaXplb2YoIklORlJBQ0ZHX01EUF9TRUNf VklPIikpOw0KPiA+ICsNCj4gPiArCX0gZWxzZSBpZiAobW1zeXNfdmlvKSB7DQo+ID4gKwkJdmlv X3N0YV9udW0gPSBJTkZSQUNGR19NTV9WSU9fU1RBX05VTTsNCj4gPiArCQl2aW8wX29mZnNldCA9 IElORlJBQ0ZHX01NX1NFQ19WSU8wX09GRlNFVDsNCj4gPiArDQo+ID4gKwkJc3RybmNweShtbV9z dHIsICJJTkZSQUNGR19NTV9TRUNfVklPIiwNCj4gPiArCQkJc2l6ZW9mKCJJTkZSQUNGR19NTV9T RUNfVklPIikpOw0KPiA+ICsNCj4gPiArCX0gZWxzZSB7DQo+ID4gKwkJcHJfZXJyKFBGWCAiJXM6 IHBhcmFtIGNoZWNrIGZhaWxlZCwgbWRwX3ZpbzolcywgZGlzcDJfdmlvOiVzLCBtbXN5c192aW86 JXNcbiIsDQo+ID4gKwkJICAgICAgIF9fZnVuY19fLCBtZHBfdmlvID8gInRydWUiIDogImZhbHNl IiwNCj4gPiArCQkgICAgICAgZGlzcDJfdmlvID8gInRydWUiIDogImZhbHNlIiwNCj4gPiArCQkg ICAgICAgbW1zeXNfdmlvID8gInRydWUiIDogImZhbHNlIik7DQo+ID4gKwkJcmV0dXJuOw0KPiA+ ICsJfQ0KPiA+ICsNCj4gPiArCS8qIEdldCBtbTJuZCB2aW9sYXRpb24gc3RhdHVzICovDQo+ID4g Kwlmb3IgKGkgPSAwOyBpIDwgdmlvX3N0YV9udW07IGkrKykgew0KPiA+ICsJCXJlZyA9IGluZnJh Y2ZnICsgdmlvMF9vZmZzZXQgKyBpICogNDsNCj4gPiArCQl2aW9fc3RhID0gcmVhZGwocmVnKTsN Cj4gPiArCQlpZiAodmlvX3N0YSkNCj4gPiArCQkJcHJfaW5mbyhQRlggIk1NIDJuZCB2aW9sYXRp b246ICVzJWQ6MHgleFxuIiwNCj4gPiArCQkJCW1tX3N0ciwgaSwgdmlvX3N0YSk7DQo+ID4gKwl9 DQo+ID4gKw0KPiA+ICsJLyogR2V0IG1tMm5kIHZpb2xhdGlvbiBhZGRyZXNzICovDQo+ID4gKwly ZWcgPSBpbmZyYWNmZyArIHZpbzBfb2Zmc2V0ICsgaSAqIDQ7DQo+ID4gKwl2aW9faW5mby0+dmlv X2FkZHIgPSByZWFkbChyZWcpOw0KPiA+ICsNCj4gPiArCS8qIEdldCBtbTJuZCB2aW9sYXRpb24g aW5mb3JtYXRpb24gKi8NCj4gPiArCXJlZyA9IGluZnJhY2ZnICsgdmlvMF9vZmZzZXQgKyAoaSAr IDEpICogNDsNCj4gPiArCXZpb19kYmcgPSByZWFkbChyZWcpOw0KPiA+ICsNCj4gPiArCXZpb19p bmZvLT5kb21haW5faWQgPSAodmlvX2RiZyAmIElORlJBQ0ZHX01NMk5EX1ZJT19ET01BSU5fTUFT SykgPj4NCj4gPiArCQlJTkZSQUNGR19NTTJORF9WSU9fRE9NQUlOX1NISUZUOw0KPiA+ICsNCj4g PiArCXZpb19pbmZvLT5tYXN0ZXJfaWQgPSAodmlvX2RiZyAmIElORlJBQ0ZHX01NMk5EX1ZJT19J RF9NQVNLKSA+Pg0KPiA+ICsJCUlORlJBQ0ZHX01NMk5EX1ZJT19JRF9TSElGVDsNCj4gPiArDQo+ ID4gKwlydyA9ICh2aW9fZGJnICYgSU5GUkFDRkdfTU0yTkRfVklPX1JXX01BU0spID4+DQo+ID4g KwkJSU5GUkFDRkdfTU0yTkRfVklPX1JXX1NISUZUOw0KPiA+ICsJdmlvX2luZm8tPnJlYWQgPSAo cncgPT0gMCk7DQo+ID4gKwl2aW9faW5mby0+d3JpdGUgPSAocncgPT0gMSk7DQo+ID4gK30NCj4g PiArDQo+ID4gK3N0YXRpYyB1MzIgbXQ2ODczX3NoaWZ0X2dyb3VwX2dldChpbnQgc2xhdmVfdHlw ZSwgdTMyIHZpb19pZHgpDQo+ID4gK3sNCj4gPiArCWlmIChzbGF2ZV90eXBlID09IFNMQVZFX1RZ UEVfSU5GUkEpIHsNCj4gPiArCQlpZiAoKHZpb19pZHggPj0gMCAmJiB2aW9faWR4IDw9IDgpIHx8 IHZpb19pZHggPT0gMzU1KQ0KPiA+ICsJCQlyZXR1cm4gMDsNCj4gPiArCQllbHNlIGlmICgodmlv X2lkeCA+PSA5ICYmIHZpb19pZHggPD0gMTQpIHx8IHZpb19pZHggPT0gMzU2KQ0KPiA+ICsJCQly ZXR1cm4gMTsNCj4gPiArCQllbHNlIGlmICgodmlvX2lkeCA+PSAxNSAmJiB2aW9faWR4IDw9IDE5 KSB8fCB2aW9faWR4ID09IDM1NykNCj4gPiArCQkJcmV0dXJuIDI7DQo+ID4gKwkJZWxzZSBpZiAo KHZpb19pZHggPj0gMjAgJiYgdmlvX2lkeCA8PSAyMSkgfHwgdmlvX2lkeCA9PSAzNTgpDQo+ID4g KwkJCXJldHVybiAzOw0KPiA+ICsJCWVsc2UgaWYgKHZpb19pZHggPj0gMjIgJiYgdmlvX2lkeCA8 PSAzNDcpDQo+ID4gKwkJCXJldHVybiA0Ow0KPiA+ICsJCWVsc2UgaWYgKCh2aW9faWR4ID49IDM0 OCAmJiB2aW9faWR4IDw9IDM1NCkgfHwNCj4gPiArCQkJICh2aW9faWR4ID49IDM1OSAmJiB2aW9f aWR4IDw9IDM2NSkgfHwNCj4gPiArCQkJIHZpb19pZHggPT0gMzY2KQ0KPiA+ICsJCQlyZXR1cm4g NTsNCj4gPiArDQo+ID4gKwkJcHJfZXJyKFBGWCAiJXM6JWQgV3JvbmcgdmlvX2lkeDoweCV4XG4i LA0KPiA+ICsJCSAgICAgICBfX2Z1bmNfXywgX19MSU5FX18sIHZpb19pZHgpOw0KPiA+ICsNCj4g PiArCX0gZWxzZSBpZiAoc2xhdmVfdHlwZSA9PSBTTEFWRV9UWVBFX1BFUkkpIHsNCj4gPiArCQlp ZiAodmlvX2lkeCA+PSAwICYmIHZpb19pZHggPD0gNCkNCj4gPiArCQkJcmV0dXJuIDA7DQo+ID4g KwkJZWxzZSBpZiAodmlvX2lkeCA+PSA1ICYmIHZpb19pZHggPD0gNikNCj4gPiArCQkJcmV0dXJu IDE7DQo+ID4gKwkJZWxzZSBpZiAoKHZpb19pZHggPj0gNyAmJiB2aW9faWR4IDw9IDM4KSB8fCB2 aW9faWR4ID09IDE4NyB8fA0KPiA+ICsJCQkgKHZpb19pZHggPj0gMTg4ICYmIHZpb19pZHggPD0g MjE5KSB8fA0KPiA+ICsJCQkgdmlvX2lkeCA9PSAyODYpDQo+ID4gKwkJCXJldHVybiAyOw0KPiA+ ICsJCWVsc2UgaWYgKCh2aW9faWR4ID49IDM5ICYmIHZpb19pZHggPD0gNjEpIHx8IHZpb19pZHgg PT0gMjIwKQ0KPiA+ICsJCQlyZXR1cm4gMzsNCj4gPiArCQllbHNlIGlmICgodmlvX2lkeCA+PSA2 MiAmJiB2aW9faWR4IDw9IDcyKSB8fCB2aW9faWR4ID09IDIyMSkNCj4gPiArCQkJcmV0dXJuIDQ7 DQo+ID4gKwkJZWxzZSBpZiAoKHZpb19pZHggPj0gNzMgJiYgdmlvX2lkeCA8PSA3NCkgfHwgdmlv X2lkeCA9PSAyMjIpDQo+ID4gKwkJCXJldHVybiA1Ow0KPiA+ICsJCWVsc2UgaWYgKHZpb19pZHgg PT0gNzUgfHwgdmlvX2lkeCA9PSAyMjMpDQo+ID4gKwkJCXJldHVybiA2Ow0KPiA+ICsJCWVsc2Ug aWYgKCh2aW9faWR4ID49IDc2ICYmIHZpb19pZHggPD0gMTE4KSB8fCB2aW9faWR4ID09IDIyNCkN Cj4gPiArCQkJcmV0dXJuIDc7DQo+ID4gKwkJZWxzZSBpZiAoKHZpb19pZHggPj0gMTE5ICYmIHZp b19pZHggPD0gMTIxKSB8fCB2aW9faWR4ID09IDIyNSkNCj4gPiArCQkJcmV0dXJuIDg7DQo+ID4g KwkJaWYgKHZpb19pZHggPj0gMTIyICYmIHZpb19pZHggPD0gMTI1KQ0KPiA+ICsJCQlyZXR1cm4g OTsNCj4gPiArCQllbHNlIGlmICh2aW9faWR4ID09IDEyNiB8fCAodmlvX2lkeCA+PSAyMjYgJiYg dmlvX2lkeCA8PSAyMjcpIHx8DQo+ID4gKwkJCSB2aW9faWR4ID09IDI4NykNCj4gPiArCQkJcmV0 dXJuIDEwOw0KPiA+ICsJCWlmICh2aW9faWR4ID49IDEyNyAmJiB2aW9faWR4IDw9IDEyOCkNCj4g PiArCQkJcmV0dXJuIDExOw0KPiA+ICsJCWlmICh2aW9faWR4ID49IDEyOSAmJiB2aW9faWR4IDw9 IDEzMCkNCj4gPiArCQkJcmV0dXJuIDEyOw0KPiA+ICsJCWVsc2UgaWYgKCh2aW9faWR4ID49IDEz MSAmJiB2aW9faWR4IDw9IDE0MSkgfHwNCj4gPiArCQkJICh2aW9faWR4ID49IDIyOCAmJiB2aW9f aWR4IDw9IDIzOCkgfHwNCj4gPiArCQkJIHZpb19pZHggPT0gMjg4KQ0KPiA+ICsJCQlyZXR1cm4g MTM7DQo+ID4gKwkJZWxzZSBpZiAoKHZpb19pZHggPj0gMTQyICYmIHZpb19pZHggPD0gMTQzKSB8 fA0KPiA+ICsJCQkgKHZpb19pZHggPj0gMjM5ICYmIHZpb19pZHggPD0gMjQwKSB8fA0KPiA+ICsJ CQkgdmlvX2lkeCA9PSAyODkpDQo+ID4gKwkJCXJldHVybiAxNDsNCj4gPiArCQllbHNlIGlmICgo dmlvX2lkeCA+PSAxNDQgJiYgdmlvX2lkeCA8PSAxNzMpIHx8IHZpb19pZHggPT0gMjQxIHx8DQo+ ID4gKwkJCSAodmlvX2lkeCA+PSAyNDIgJiYgdmlvX2lkeCA8PSAyNzEpIHx8DQo+ID4gKwkJCSB2 aW9faWR4ID09IDI5MCkNCj4gPiArCQkJcmV0dXJuIDE1Ow0KPiA+ICsJCWVsc2UgaWYgKCh2aW9f aWR4ID49IDE3NCAmJiB2aW9faWR4IDw9IDE4NikgfHwgdmlvX2lkeCA9PSAyNzIgfHwNCj4gPiAr CQkJICh2aW9faWR4ID49IDI3MyAmJiB2aW9faWR4IDw9IDI4NSkgfHwNCj4gPiArCQkJIHZpb19p ZHggPT0gMjkxKQ0KPiA+ICsJCQlyZXR1cm4gMTY7DQo+ID4gKw0KPiA+ICsJCXByX2VycihQRlgg IiVzOiVkIFdyb25nIHZpb19pZHg6MHgleFxuIiwNCj4gPiArCQkgICAgICAgX19mdW5jX18sIF9f TElORV9fLCB2aW9faWR4KTsNCj4gPiArDQo+ID4gKwl9IGVsc2UgaWYgKHNsYXZlX3R5cGUgPT0g U0xBVkVfVFlQRV9QRVJJMikgew0KPiA+ICsJCWlmICgodmlvX2lkeCA+PSAwICYmIHZpb19pZHgg PD0gMTIpIHx8IHZpb19pZHggPT0gMTE3IHx8DQo+ID4gKwkJICAgICh2aW9faWR4ID49IDExOCAm JiB2aW9faWR4IDw9IDEzMCkgfHwNCj4gPiArCQkgICAgdmlvX2lkeCA9PSAyMzQpDQo+ID4gKwkJ CXJldHVybiAwOw0KPiA+ICsJCWVsc2UgaWYgKHZpb19pZHggPj0gMTMgJiYgdmlvX2lkeCA8PSAx NikNCj4gPiArCQkJcmV0dXJuIDE7DQo+ID4gKwkJZWxzZSBpZiAodmlvX2lkeCA+PSAxNyAmJiB2 aW9faWR4IDw9IDIwKQ0KPiA+ICsJCQlyZXR1cm4gMjsNCj4gPiArCQllbHNlIGlmICgodmlvX2lk eCA+PSAyMSAmJiB2aW9faWR4IDw9IDM2KSB8fCB2aW9faWR4ID09IDEzMSB8fA0KPiA+ICsJCQkg KHZpb19pZHggPj0gMTMyICYmIHZpb19pZHggPD0gMTQ3KSB8fA0KPiA+ICsJCQkgdmlvX2lkeCA9 PSAyMzUpDQo+ID4gKwkJCXJldHVybiAzOw0KPiA+ICsJCWVsc2UgaWYgKCh2aW9faWR4ID49IDM3 ICYmIHZpb19pZHggPD0gNDQpIHx8IHZpb19pZHggPT0gMTQ4IHx8DQo+ID4gKwkJCSAodmlvX2lk eCA+PSAxNDkgJiYgdmlvX2lkeCA8PSAxNTYpIHx8DQo+ID4gKwkJCSB2aW9faWR4ID09IDIzNikN Cj4gPiArCQkJcmV0dXJuIDQ7DQo+ID4gKwkJZWxzZSBpZiAoKHZpb19pZHggPj0gNDUgJiYgdmlv X2lkeCA8PSA2MCkgfHwgdmlvX2lkeCA9PSAxNTcgfHwNCj4gPiArCQkJICh2aW9faWR4ID49IDE1 OCAmJiB2aW9faWR4IDw9IDE3MykgfHwNCj4gPiArCQkJIHZpb19pZHggPT0gMjM3KQ0KPiA+ICsJ CQlyZXR1cm4gNTsNCj4gPiArCQllbHNlIGlmICgodmlvX2lkeCA+PSA2MSAmJiB2aW9faWR4IDw9 IDc2KSB8fCB2aW9faWR4ID09IDE3NCB8fA0KPiA+ICsJCQkgKHZpb19pZHggPj0gMTc1ICYmIHZp b19pZHggPD0gMTkwKSB8fA0KPiA+ICsJCQkgdmlvX2lkeCA9PSAyMzgpDQo+ID4gKwkJCXJldHVy biA2Ow0KPiA+ICsJCWVsc2UgaWYgKCh2aW9faWR4ID49IDc3ICYmIHZpb19pZHggPD0gODQpIHx8 IHZpb19pZHggPT0gMTkxIHx8DQo+ID4gKwkJCSAodmlvX2lkeCA+PSAxOTIgJiYgdmlvX2lkeCA8 PSAxOTkpIHx8DQo+ID4gKwkJCSB2aW9faWR4ID09IDIzOSkNCj4gPiArCQkJcmV0dXJuIDc7DQo+ ID4gKwkJZWxzZSBpZiAoKHZpb19pZHggPj0gODUgJiYgdmlvX2lkeCA8PSAxMDUpIHx8IHZpb19p ZHggPT0gMjAwIHx8DQo+ID4gKwkJCSAodmlvX2lkeCA+PSAyMDEgJiYgdmlvX2lkeCA8PSAyMjEp IHx8DQo+ID4gKwkJCSB2aW9faWR4ID09IDI0MCkNCj4gPiArCQkJcmV0dXJuIDg7DQo+ID4gKwkJ ZWxzZSBpZiAoKHZpb19pZHggPj0gMTA2ICYmIHZpb19pZHggPD0gMTE2KSB8fCB2aW9faWR4ID09 IDIyMiB8fA0KPiA+ICsJCQkgKHZpb19pZHggPj0gMjIzICYmIHZpb19pZHggPD0gMjMzKSB8fA0K PiA+ICsJCQkgdmlvX2lkeCA9PSAyNDEpDQo+ID4gKwkJCXJldHVybiA5Ow0KPiA+ICsNCj4gPiAr CQlwcl9lcnIoUEZYICIlczolZCBXcm9uZyB2aW9faWR4OjB4JXhcbiIsDQo+ID4gKwkJICAgICAg IF9fZnVuY19fLCBfX0xJTkVfXywgdmlvX2lkeCk7DQo+ID4gKw0KPiA+ICsJfSBlbHNlIGlmIChz bGF2ZV90eXBlID09IFNMQVZFX1RZUEVfUEVSSV9QQVIpIHsNCj4gPiArCQlpZiAoKHZpb19pZHgg Pj0gMCAmJiB2aW9faWR4IDw9IDIzKSB8fCB2aW9faWR4ID09IDI3IHx8DQo+ID4gKwkJICAgICh2 aW9faWR4ID49IDI4ICYmIHZpb19pZHggPD0gNTEpIHx8DQo+ID4gKwkJICAgIHZpb19pZHggPT0g NTYpDQo+ID4gKwkJCXJldHVybiAwOw0KPiA+ICsJCWVsc2UgaWYgKCh2aW9faWR4ID49IDI0ICYm IHZpb19pZHggPD0gMjYpIHx8IHZpb19pZHggPT0gNTIgfHwNCj4gPiArCQkJICh2aW9faWR4ID49 IDUzICYmIHZpb19pZHggPD0gNTUpIHx8DQo+ID4gKwkJCSB2aW9faWR4ID09IDU3KQ0KPiA+ICsJ CQlyZXR1cm4gMTsNCj4gPiArDQo+ID4gKwkJcHJfZXJyKFBGWCAiJXM6JWQgV3JvbmcgdmlvX2lk eDoweCV4XG4iLA0KPiA+ICsJCSAgICAgICBfX2Z1bmNfXywgX19MSU5FX18sIHZpb19pZHgpOw0K PiA+ICsNCj4gPiArCX0gZWxzZSB7DQo+ID4gKwkJcHJfZXJyKFBGWCAiJXM6JWQgV3Jvbmcgc2xh dmVfdHlwZToweCV4XG4iLA0KPiA+ICsJCSAgICAgICBfX2Z1bmNfXywgX19MSU5FX18sIHNsYXZl X3R5cGUpOw0KPiA+ICsJfQ0KPiA+ICsNCj4gPiArCXJldHVybiAzMTsNCj4gPiArfQ0KPiA+ICsN Cj4gPiArc3RhdGljIHN0cnVjdCBtdGtfZGV2YXBjX2RiZ19zdGF0dXMgbXQ2ODczX2RldmFwY19k Ymdfc3RhdCA9IHsNCj4gPiArCS5lbmFibGVfdXQgPSBQTEFUX0RCR19VVF9ERUZBVUxULA0KPiA+ ICsJLmVuYWJsZV9kYXBjID0gUExBVF9EQkdfREFQQ19ERUZBVUxULA0KPiA+ICt9Ow0KPiA+ICsN Cj4gPiArc3RhdGljIGNvbnN0IGNoYXIgKiBjb25zdCBzbGF2ZV90eXBlX3RvX3N0cltdID0gew0K PiA+ICsJIlNMQVZFX1RZUEVfSU5GUkEiLA0KPiA+ICsJIlNMQVZFX1RZUEVfUEVSSSIsDQo+ID4g KwkiU0xBVkVfVFlQRV9QRVJJMiIsDQo+ID4gKwkiU0xBVkVfVFlQRV9QRVJJX1BBUiIsDQo+ID4g KwkiV1JPTkdfU0xBVkVfVFlQRSIsDQo+ID4gK307DQo+ID4gKw0KPiA+ICtzdGF0aWMgaW50IG10 a192aW9fbWFza19zdGFfbnVtW10gPSB7DQo+ID4gKwlWSU9fTUFTS19TVEFfTlVNX0lORlJBLA0K PiA+ICsJVklPX01BU0tfU1RBX05VTV9QRVJJLA0KPiA+ICsJVklPX01BU0tfU1RBX05VTV9QRVJJ MiwNCj4gPiArCVZJT19NQVNLX1NUQV9OVU1fUEVSSV9QQVIsDQo+ID4gK307DQo+ID4gKw0KPiA+ ICtzdGF0aWMgc3RydWN0IG10a19kZXZhcGNfdmlvX2luZm8gbXQ2ODczX2RldmFwY192aW9faW5m byA9IHsNCj4gPiArCS52aW9fbWFza19zdGFfbnVtID0gbXRrX3Zpb19tYXNrX3N0YV9udW0sDQo+ ID4gKwkuc3JhbXJvbV92aW9faWR4ID0gU1JBTVJPTV9WSU9fSU5ERVgsDQo+ID4gKwkubWRwX3Zp b19pZHggPSBNRFBfVklPX0lOREVYLA0KPiA+ICsJLmRpc3AyX3Zpb19pZHggPSBNRFBfVklPX0lO REVYLA0KPiA+ICsJLm1tc3lzX3Zpb19pZHggPSBNTVNZU19WSU9fSU5ERVgsDQo+ID4gKwkuc3Jh bXJvbV9zbHZfdHlwZSA9IFNSQU1ST01fU0xBVkVfVFlQRSwNCj4gPiArCS5tbTJuZF9zbHZfdHlw ZSA9IE1NMk5EX1NMQVZFX1RZUEUsDQo+ID4gK307DQo+ID4gKw0KPiA+ICtzdGF0aWMgY29uc3Qg c3RydWN0IG10a19pbmZyYV92aW9fZGJnX2Rlc2MgbXQ2ODczX3Zpb19kYmdzID0gew0KPiA+ICsJ LnZpb19kYmdfbXN0aWQgPSBJTkZSQV9WSU9fREJHX01TVElELA0KPiA+ICsJLnZpb19kYmdfbXN0 aWRfc3RhcnRfYml0ID0gSU5GUkFfVklPX0RCR19NU1RJRF9TVEFSVF9CSVQsDQo+ID4gKwkudmlv X2RiZ19kbW5pZCA9IElORlJBX1ZJT19EQkdfRE1OSUQsDQo+ID4gKwkudmlvX2RiZ19kbW5pZF9z dGFydF9iaXQgPSBJTkZSQV9WSU9fREJHX0RNTklEX1NUQVJUX0JJVCwNCj4gPiArCS52aW9fZGJn X3dfdmlvID0gSU5GUkFfVklPX0RCR19XX1ZJTywNCj4gPiArCS52aW9fZGJnX3dfdmlvX3N0YXJ0 X2JpdCA9IElORlJBX1ZJT19EQkdfV19WSU9fU1RBUlRfQklULA0KPiA+ICsJLnZpb19kYmdfcl92 aW8gPSBJTkZSQV9WSU9fREJHX1JfVklPLA0KPiA+ICsJLnZpb19kYmdfcl92aW9fc3RhcnRfYml0 ID0gSU5GUkFfVklPX0RCR19SX1ZJT19TVEFSVF9CSVQsDQo+ID4gKwkudmlvX2FkZHJfaGlnaCA9 IElORlJBX1ZJT19BRERSX0hJR0gsDQo+ID4gKwkudmlvX2FkZHJfaGlnaF9zdGFydF9iaXQgPSBJ TkZSQV9WSU9fQUREUl9ISUdIX1NUQVJUX0JJVCwNCj4gPiArfTsNCj4gPiArDQo+ID4gK3N0YXRp YyBjb25zdCBzdHJ1Y3QgbXRrX3NyYW1yb21fc2VjX3Zpb19kZXNjIG10Njg3M19zcmFtcm9tX3Nl Y192aW9zID0gew0KPiA+ICsJLnZpb19pZF9tYXNrID0gU1JBTVJPTV9TRUNfVklPX0lEX01BU0ss DQo+ID4gKwkudmlvX2lkX3NoaWZ0ID0gU1JBTVJPTV9TRUNfVklPX0lEX1NISUZULA0KPiA+ICsJ LnZpb19kb21haW5fbWFzayA9IFNSQU1ST01fU0VDX1ZJT19ET01BSU5fTUFTSywNCj4gPiArCS52 aW9fZG9tYWluX3NoaWZ0ID0gU1JBTVJPTV9TRUNfVklPX0RPTUFJTl9TSElGVCwNCj4gPiArCS52 aW9fcndfbWFzayA9IFNSQU1ST01fU0VDX1ZJT19SV19NQVNLLA0KPiA+ICsJLnZpb19yd19zaGlm dCA9IFNSQU1ST01fU0VDX1ZJT19SV19TSElGVCwNCj4gPiArfTsNCj4gPiArDQo+ID4gK3N0YXRp YyBjb25zdCB1MzIgbXQ2ODczX2RldmFwY19wZHNbXSA9IHsNCj4gPiArCVBEX1ZJT19NQVNLX09G RlNFVCwNCj4gPiArCVBEX1ZJT19TVEFfT0ZGU0VULA0KPiA+ICsJUERfVklPX0RCRzBfT0ZGU0VU LA0KPiA+ICsJUERfVklPX0RCRzFfT0ZGU0VULA0KPiA+ICsJUERfVklPX0RCRzJfT0ZGU0VULA0K PiA+ICsJUERfQVBDX0NPTl9PRkZTRVQsDQo+ID4gKwlQRF9TSElGVF9TVEFfT0ZGU0VULA0KPiA+ ICsJUERfU0hJRlRfU0VMX09GRlNFVCwNCj4gPiArCVBEX1NISUZUX0NPTl9PRkZTRVQsDQo+ID4g K307DQo+ID4gKw0KPiA+ICtzdGF0aWMgc3RydWN0IG10a19kZXZhcGNfc29jIG10Njg3M19kYXRh ID0gew0KPiA+ICsJLmRiZ19zdGF0ID0gJm10Njg3M19kZXZhcGNfZGJnX3N0YXQsDQo+ID4gKwku c2xhdmVfdHlwZV9hcnIgPSBzbGF2ZV90eXBlX3RvX3N0ciwNCj4gPiArCS5zbGF2ZV90eXBlX251 bSA9IFNMQVZFX1RZUEVfTlVNLA0KPiA+ICsJLmRldmljZV9pbmZvW1NMQVZFX1RZUEVfSU5GUkFd ID0gbXQ2ODczX2RldmljZXNfaW5mcmEsDQo+ID4gKwkuZGV2aWNlX2luZm9bU0xBVkVfVFlQRV9Q RVJJXSA9IG10Njg3M19kZXZpY2VzX3BlcmksDQo+ID4gKwkuZGV2aWNlX2luZm9bU0xBVkVfVFlQ RV9QRVJJMl0gPSBtdDY4NzNfZGV2aWNlc19wZXJpMiwNCj4gPiArCS5kZXZpY2VfaW5mb1tTTEFW RV9UWVBFX1BFUklfUEFSXSA9IG10Njg3M19kZXZpY2VzX3BlcmlfcGFyLA0KPiA+ICsJLm5kZXZp Y2VzID0gbXRrNjg3M19kZXZpY2VzX251bSwNCj4gPiArCS52aW9faW5mbyA9ICZtdDY4NzNfZGV2 YXBjX3Zpb19pbmZvLA0KPiA+ICsJLnZpb19kYmdzID0gJm10Njg3M192aW9fZGJncywNCj4gPiAr CS5zcmFtcm9tX3NlY192aW9zID0gJm10Njg3M19zcmFtcm9tX3NlY192aW9zLA0KPiA+ICsJLmRl dmFwY19wZHMgPSBtdDY4NzNfZGV2YXBjX3BkcywNCj4gPiArCS5tYXN0ZXJfZ2V0ID0gJm10Njg3 M19idXNfaWRfdG9fbWFzdGVyLA0KPiA+ICsJLm1tMm5kX3Zpb19oYW5kbGVyID0gJm1tMm5kX3Zp b19oYW5kbGVyLA0KPiA+ICsJLnNoaWZ0X2dyb3VwX2dldCA9IG10Njg3M19zaGlmdF9ncm91cF9n ZXQsDQo+ID4gK307DQo+ID4gKw0KPiA+ICtzdGF0aWMgY29uc3Qgc3RydWN0IG9mX2RldmljZV9p ZCBtdDY4NzNfZGV2YXBjX2R0X21hdGNoW10gPSB7DQo+ID4gKwl7IC5jb21wYXRpYmxlID0gIm1l ZGlhdGVrLG10Njg3My1kZXZhcGMiIH0sDQo+ID4gKwl7fSwNCj4gPiArfTsNCj4gPiArDQo+ID4g K3N0YXRpYyBpbnQgbXQ2ODczX2RldmFwY19wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpw ZGV2KQ0KPiA+ICt7DQo+ID4gKwlyZXR1cm4gbXRrX2RldmFwY19wcm9iZShwZGV2LCAmbXQ2ODcz X2RhdGEpOw0KPiA+ICt9DQo+ID4gKw0KPiA+ICtzdGF0aWMgaW50IG10Njg3M19kZXZhcGNfcmVt b3ZlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKmRldikNCj4gPiArew0KPiA+ICsJcmV0dXJuIG10 a19kZXZhcGNfcmVtb3ZlKGRldik7DQo+ID4gK30NCj4gPiArDQo+ID4gK3N0YXRpYyBzdHJ1Y3Qg cGxhdGZvcm1fZHJpdmVyIG10Njg3M19kZXZhcGNfZHJpdmVyID0gew0KPiA+ICsJLnByb2JlID0g bXQ2ODczX2RldmFwY19wcm9iZSwNCj4gPiArCS5yZW1vdmUgPSBtdDY4NzNfZGV2YXBjX3JlbW92 ZSwNCj4gPiArCS5kcml2ZXIgPSB7DQo+ID4gKwkJLm5hbWUgPSBLQlVJTERfTU9ETkFNRSwNCj4g PiArCQkub2ZfbWF0Y2hfdGFibGUgPSBtdDY4NzNfZGV2YXBjX2R0X21hdGNoLA0KPiA+ICsJfSwN Cj4gPiArfTsNCj4gPiArDQo+ID4gK21vZHVsZV9wbGF0Zm9ybV9kcml2ZXIobXQ2ODczX2RldmFw Y19kcml2ZXIpOw0KPiA+ICsNCj4gPiArTU9EVUxFX0RFU0NSSVBUSU9OKCJNZWRpYXRlayBNVDY4 NzMgRGV2aWNlIEFQQyBEcml2ZXIiKTsNCj4gPiArTU9EVUxFX0FVVEhPUigiTmVhbCBMaXUgPG5l YWwubGl1QG1lZGlhdGVrLmNvbT4iKTsNCj4gPiArTU9EVUxFX0xJQ0VOU0UoIkdQTCIpOw0KPiA+ IGRpZmYgLS1naXQgYS9kcml2ZXJzL3NvYy9tZWRpYXRlay9kZXZhcGMvZGV2YXBjLW10Njg3My5o IGIvZHJpdmVycy9zb2MvbWVkaWF0ZWsvZGV2YXBjL2RldmFwYy1tdDY4NzMuaA0KPiA+IG5ldyBm aWxlIG1vZGUgMTAwNjQ0DQo+ID4gaW5kZXggMDAwMDAwMC4uMTZiZTA5ZQ0KPiA+IC0tLSAvZGV2 L251bGwNCj4gPiArKysgYi9kcml2ZXJzL3NvYy9tZWRpYXRlay9kZXZhcGMvZGV2YXBjLW10Njg3 My5oDQo+ID4gQEAgLTAsMCArMSwxMTEgQEANCj4gPiArLyogU1BEWC1MaWNlbnNlLUlkZW50aWZp ZXI6IEdQTC0yLjAgKi8NCj4gPiArLyoNCj4gPiArICogQ29weXJpZ2h0IChDKSAyMDIwIE1lZGlh VGVrIEluYy4NCj4gPiArICovDQo+ID4gKw0KPiA+ICsjaWZuZGVmIF9fREVWQVBDX01UNjg3M19I X18NCj4gPiArI2RlZmluZSBfX0RFVkFQQ19NVDY4NzNfSF9fDQo+ID4gKw0KPiA+ICsvKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqDQo+ID4gKyAqIFZBUklBQkxFIERFRklOSVRJT04NCj4gPiArICoqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKi8NCj4gPiArLyogZGJnIHN0YXR1cyBkZWZhdWx0IHNldHRpbmcgKi8N Cj4gPiArI2RlZmluZSBQTEFUX0RCR19VVF9ERUZBVUxUCQlmYWxzZQ0KPiA+ICsjZGVmaW5lIFBM QVRfREJHX0RBUENfREVGQVVMVAkJZmFsc2UNCj4gPiArDQo+ID4gKy8qKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioNCj4gPiArICogU1RSVUNUVVJFIERFRklOSVRJT04NCj4gPiArICoqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKi8NCj4gPiArZW51bSBERVZBUENfU0xBVkVfVFlQRSB7DQo+ID4gKwlTTEFWRV9UWVBF X0lORlJBID0gMCwNCj4gPiArCVNMQVZFX1RZUEVfUEVSSSwNCj4gPiArCVNMQVZFX1RZUEVfUEVS STIsDQo+ID4gKwlTTEFWRV9UWVBFX1BFUklfUEFSLA0KPiA+ICsJU0xBVkVfVFlQRV9OVU0sDQo+ ID4gK307DQo+ID4gKw0KPiA+ICtlbnVtIERFVkFQQ19WSU9fTUFTS19TVEFfTlVNIHsNCj4gPiAr CVZJT19NQVNLX1NUQV9OVU1fSU5GUkEgPSAxMiwNCj4gPiArCVZJT19NQVNLX1NUQV9OVU1fUEVS SSA9IDEwLA0KPiA+ICsJVklPX01BU0tfU1RBX05VTV9QRVJJMiA9IDgsDQo+ID4gKwlWSU9fTUFT S19TVEFfTlVNX1BFUklfUEFSID0gMiwNCj4gPiArfTsNCj4gPiArDQo+ID4gK2VudW0gREVWQVBD X1ZJT19TTEFWRV9OVU0gew0KPiA+ICsJVklPX1NMQVZFX05VTV9JTkZSQSA9IDM2NiwNCj4gPiAr CVZJT19TTEFWRV9OVU1fUEVSSSA9IDI4NCwNCj4gPiArCVZJT19TTEFWRV9OVU1fUEVSSTIgPSAy NDcsDQo+ID4gKwlWSU9fU0xBVkVfTlVNX1BFUklfUEFSID0gNTgsDQo+ID4gK307DQo+ID4gKw0K PiA+ICtlbnVtIERFVkFQQ19QRF9PRkZTRVQgew0KPiA+ICsJUERfVklPX01BU0tfT0ZGU0VUID0g MHgwLA0KPiA+ICsJUERfVklPX1NUQV9PRkZTRVQgPSAweDQwMCwNCj4gPiArCVBEX1ZJT19EQkcw X09GRlNFVCA9IDB4OTAwLA0KPiA+ICsJUERfVklPX0RCRzFfT0ZGU0VUID0gMHg5MDQsDQo+ID4g KwlQRF9WSU9fREJHMl9PRkZTRVQgPSAweDkwOCwNCj4gPiArCVBEX0FQQ19DT05fT0ZGU0VUID0g MHhGMDAsDQo+ID4gKwlQRF9TSElGVF9TVEFfT0ZGU0VUID0gMHhGMjAsDQo+ID4gKwlQRF9TSElG VF9TRUxfT0ZGU0VUID0gMHhGMzAsDQo+ID4gKwlQRF9TSElGVF9DT05fT0ZGU0VUID0gMHhGMTAs DQo+ID4gK307DQo+ID4gKw0KPiA+ICsjZGVmaW5lIFNSQU1ST01fU0xBVkVfVFlQRQlTTEFWRV9U WVBFX0lORlJBCS8qIEluZnJhICovDQo+ID4gKyNkZWZpbmUgTU0yTkRfU0xBVkVfVFlQRQlTTEFW RV9UWVBFX1BFUkkJCS8qIFBlcmkgKi8NCj4gPiArDQo+ID4gK2VudW0gT1RIRVJfVFlQRVNfSU5E RVggew0KPiA+ICsJU1JBTVJPTV9WSU9fSU5ERVggPSAzNjcsDQo+ID4gKwlDT05OX1ZJT19JTkRF WCA9IDc1LCAvKiBzdGFydHMgZnJvbSAweDE4ICovDQo+ID4gKwlNRFBfVklPX0lOREVYID0gMjky LA0KPiA+ICsJTU1TWVNfVklPX0lOREVYID0gMjk0LA0KPiA+ICt9Ow0KPiA+ICsNCj4gPiArZW51 bSBJTkZSQUNGR19NTTJORF9WSU9fTlVNIHsNCj4gPiArCUlORlJBQ0ZHX01NX1ZJT19TVEFfTlVN ID0gMiwNCj4gPiArCUlORlJBQ0ZHX01EUF9WSU9fU1RBX05VTSA9IDgsDQo+ID4gK307DQo+ID4g Kw0KPiA+ICtlbnVtIElORlJBQ0ZHX01NMk5EX09GRlNFVCB7DQo+ID4gKwlJTkZSQUNGR19NTV9T RUNfVklPMF9PRkZTRVQgPSAweEIzMCwNCj4gPiArCUlORlJBQ0ZHX01EUF9TRUNfVklPMF9PRkZT RVQgPSAweEI0MCwNCj4gPiArfTsNCj4gPiArDQo+ID4gK3N0cnVjdCBJTkZSQUFYSV9JRF9JTkZP IHsNCj4gPiArCWNvbnN0IGNoYXIJKm1hc3RlcjsNCj4gPiArCXUzMgkJYnVzX2lkOw0KPiA+ICsJ dTMyCQltYXNrOw0KPiA+ICt9Ow0KPiA+ICsNCj4gPiArLyoqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKg0K PiA+ICsgKiBQTEFURk9STSBERUZJTkFUSU9ODQo+ID4gKyAqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKiov DQo+ID4gKw0KPiA+ICsvKiBGb3IgSW5mcmEgVklPX0RCRyAqLw0KPiA+ICsjZGVmaW5lIElORlJB X1ZJT19EQkdfTVNUSUQJCQkweEZGRkZGRkZGDQo+ID4gKyNkZWZpbmUgSU5GUkFfVklPX0RCR19N U1RJRF9TVEFSVF9CSVQJCTANCj4gPiArI2RlZmluZSBJTkZSQV9WSU9fREJHX0RNTklECQkJMHgw MDAwMDAzRg0KPiA+ICsjZGVmaW5lIElORlJBX1ZJT19EQkdfRE1OSURfU1RBUlRfQklUCQkwDQo+ ID4gKyNkZWZpbmUgSU5GUkFfVklPX0RCR19XX1ZJTwkJCTB4MDAwMDAwNDANCj4gPiArI2RlZmlu ZSBJTkZSQV9WSU9fREJHX1dfVklPX1NUQVJUX0JJVAkJNg0KPiA+ICsjZGVmaW5lIElORlJBX1ZJ T19EQkdfUl9WSU8JCQkweDAwMDAwMDgwDQo+ID4gKyNkZWZpbmUgSU5GUkFfVklPX0RCR19SX1ZJ T19TVEFSVF9CSVQJCTcNCj4gPiArI2RlZmluZSBJTkZSQV9WSU9fQUREUl9ISUdICQkJMHgwMDAw MEYwMA0KPiA+ICsjZGVmaW5lIElORlJBX1ZJT19BRERSX0hJR0hfU1RBUlRfQklUCQk4DQo+ID4g Kw0KPiA+ICsvKiBGb3IgU1JBTVJPTSBWSU8gKi8NCj4gPiArI2RlZmluZSBTUkFNUk9NX1NFQ19W SU9fSURfTUFTSwkJCTB4MDBGRkZGMDANCj4gPiArI2RlZmluZSBTUkFNUk9NX1NFQ19WSU9fSURf U0hJRlQJCTgNCj4gPiArI2RlZmluZSBTUkFNUk9NX1NFQ19WSU9fRE9NQUlOX01BU0sJCTB4MEYw MDAwMDANCj4gPiArI2RlZmluZSBTUkFNUk9NX1NFQ19WSU9fRE9NQUlOX1NISUZUCQkyNA0KPiA+ ICsjZGVmaW5lIFNSQU1ST01fU0VDX1ZJT19SV19NQVNLCQkJMHg4MDAwMDAwMA0KPiA+ICsjZGVm aW5lIFNSQU1ST01fU0VDX1ZJT19SV19TSElGVAkJMzENCj4gPiArDQo+ID4gKy8qIEZvciBNTSAy bmQgVklPICovDQo+ID4gKyNkZWZpbmUgSU5GUkFDRkdfTU0yTkRfVklPX0RPTUFJTl9NQVNLCQkw eDAwMDAwMDMwDQo+ID4gKyNkZWZpbmUgSU5GUkFDRkdfTU0yTkRfVklPX0RPTUFJTl9TSElGVAkJ NA0KPiA+ICsjZGVmaW5lIElORlJBQ0ZHX01NMk5EX1ZJT19JRF9NQVNLCQkweDAwRkZGRjAwDQo+ ID4gKyNkZWZpbmUgSU5GUkFDRkdfTU0yTkRfVklPX0lEX1NISUZUCQk4DQo+ID4gKyNkZWZpbmUg SU5GUkFDRkdfTU0yTkRfVklPX1JXX01BU0sJCTB4MDEwMDAwMDANCj4gPiArI2RlZmluZSBJTkZS QUNGR19NTTJORF9WSU9fUldfU0hJRlQJCTI0DQo+ID4gKw0KPiA+ICsjZW5kaWYgLyogX19ERVZB UENfTVQ2ODczX0hfXyAqLw0KPiA+IGRpZmYgLS1naXQgYS9kcml2ZXJzL3NvYy9tZWRpYXRlay9k ZXZhcGMvZGV2YXBjLW10ay1tdWx0aS1hby5jIGIvZHJpdmVycy9zb2MvbWVkaWF0ZWsvZGV2YXBj L2RldmFwYy1tdGstbXVsdGktYW8uYw0KPiA+IG5ldyBmaWxlIG1vZGUgMTAwNjQ0DQo+ID4gaW5k ZXggMDAwMDAwMC4uNmM0YThlYw0KPiA+IC0tLSAvZGV2L251bGwNCj4gPiArKysgYi9kcml2ZXJz L3NvYy9tZWRpYXRlay9kZXZhcGMvZGV2YXBjLW10ay1tdWx0aS1hby5jDQo+ID4gQEAgLTAsMCAr MSw3NTYgQEANCj4gPiArLy8gU1BEWC1MaWNlbnNlLUlkZW50aWZpZXI6IEdQTC0yLjANCj4gPiAr LyoNCj4gPiArICogQ29weXJpZ2h0IChDKSAyMDIwIE1lZGlhVGVrIEluYy4NCj4gPiArICovDQo+ ID4gKw0KPiA+ICsjaW5jbHVkZSA8bGludXgvYXJtLXNtY2NjLmg+DQo+ID4gKyNpbmNsdWRlIDxs aW51eC9jbGsuaD4NCj4gPiArI2luY2x1ZGUgPGxpbnV4L2ZzLmg+DQo+ID4gKyNpbmNsdWRlIDxs aW51eC9pbnRlcnJ1cHQuaD4NCj4gPiArI2luY2x1ZGUgPGxpbnV4L21vZHVsZS5oPg0KPiA+ICsj aW5jbHVkZSA8bGludXgvb2ZfaXJxLmg+DQo+ID4gKyNpbmNsdWRlIDxsaW51eC9vZl9hZGRyZXNz Lmg+DQo+ID4gKyNpbmNsdWRlIDxsaW51eC9zY2hlZC9kZWJ1Zy5oPg0KPiA+ICsjaW5jbHVkZSA8 bGludXgvdWFjY2Vzcy5oPg0KPiA+ICsjaW5jbHVkZSA8bGludXgvc29jL21lZGlhdGVrL210a19z aXBfc3ZjLmg+DQo+ID4gKyNpbmNsdWRlICJkZXZhcGMtbXRrLW11bHRpLWFvLmgiDQo+ID4gKw0K PiA+ICsvKg0KPiA+ICsgKiBtdGtfZGV2YXBjX3BkX2dldCAtIGdldCBkZXZhcGMgcGRfdHlwZXMg b2YgcmVnaXN0ZXIgYWRkcmVzcy4NCj4gPiArICoNCj4gPiArICogUmV0dXJucyB0aGUgdmFsdWUg b2YgcmVnIGFkZHINCj4gPiArICovDQo+ID4gK3N0YXRpYyB2b2lkIF9faW9tZW0gKm10a19kZXZh cGNfcGRfZ2V0KHN0cnVjdCBtdGtfZGV2YXBjX2NvbnRleHQgKmRldmFwY19jdHgsDQo+ID4gKwkJ CQkgICAgICAgaW50IHNsYXZlX3R5cGUsDQo+ID4gKwkJCQkgICAgICAgZW51bSBERVZBUENfUERf UkVHX1RZUEUgcGRfcmVnX3R5cGUsDQo+ID4gKwkJCQkgICAgICAgdTMyIGluZGV4KQ0KPiA+ICt7 DQo+ID4gKwlzdHJ1Y3QgbXRrX2RldmFwY192aW9faW5mbyAqdmlvX2luZm8gPSBkZXZhcGNfY3R4 LT5zb2MtPnZpb19pbmZvOw0KPiA+ICsJdTMyIHNsYXZlX3R5cGVfbnVtID0gZGV2YXBjX2N0eC0+ c29jLT5zbGF2ZV90eXBlX251bTsNCj4gPiArCWNvbnN0IHUzMiAqZGV2YXBjX3BkcyA9IGRldmFw Y19jdHgtPnNvYy0+ZGV2YXBjX3BkczsNCj4gPiArCXZvaWQgX19pb21lbSAqcmVnOw0KPiA+ICsN Cj4gPiArCWlmICghZGV2YXBjX3BkcykNCj4gPiArCQlyZXR1cm4gTlVMTDsNCj4gPiArDQo+ID4g KwlpZiAoKHNsYXZlX3R5cGUgPCBzbGF2ZV90eXBlX251bSAmJg0KPiA+ICsJICAgICBpbmRleCA8 IHZpb19pbmZvLT52aW9fbWFza19zdGFfbnVtW3NsYXZlX3R5cGVdKSAmJg0KPiA+ICsJICAgIHBk X3JlZ190eXBlIDwgUERfUkVHX1RZUEVfTlVNKSB7DQo+ID4gKwkJcmVnID0gZGV2YXBjX2N0eC0+ ZGV2YXBjX3BkX2Jhc2Vbc2xhdmVfdHlwZV0gKw0KPiA+ICsJCQlkZXZhcGNfcGRzW3BkX3JlZ190 eXBlXTsNCj4gPiArDQo+ID4gKwkJaWYgKHBkX3JlZ190eXBlID09IFZJT19NQVNLIHx8IHBkX3Jl Z190eXBlID09IFZJT19TVEEpDQo+ID4gKwkJCXJlZyArPSAweDQgKiBpbmRleDsNCj4gPiArDQo+ ID4gKwl9IGVsc2Ugew0KPiA+ICsJCXByX2VycihQRlggIk91dCBPZiBCb3VuZGFyeSwgc2xhdmVf dHlwZToweCV4L3BkX3JlZ190eXBlOjB4JXgvaW5kZXg6MHgleFxuIiwNCj4gPiArCQkgICAgICAg c2xhdmVfdHlwZSwgcGRfcmVnX3R5cGUsIGluZGV4KTsNCj4gPiArCQlyZXR1cm4gTlVMTDsNCj4g PiArCX0NCj4gPiArDQo+ID4gKwlyZXR1cm4gcmVnOw0KPiA+ICt9DQo+ID4gKw0KPiA+ICsvKg0K PiA+ICsgKiBzcmFtcm9tX3Zpb19oYW5kbGVyIC0gY2xlYW4gc3JhbXJvbSB2aW9sYXRpb24gJiBw cmludCB2aW9sYXRpb24gaW5mb3JtYXRpb24NCj4gPiArICoJCQkgZm9yIGRlYnVnZ2luZy4NCj4g PiArICovDQo+ID4gK3N0YXRpYyB2b2lkIHNyYW1yb21fdmlvX2hhbmRsZXIoc3RydWN0IG10a19k ZXZhcGNfY29udGV4dCAqZGV2YXBjX2N0eCkNCj4gPiArew0KPiA+ICsJY29uc3Qgc3RydWN0IG10 a19zcmFtcm9tX3NlY192aW9fZGVzYyAqc3JhbXJvbV92aW9zOw0KPiA+ICsJc3RydWN0IG10a19k ZXZhcGNfdmlvX2luZm8gKnZpb19pbmZvOw0KPiA+ICsJc3RydWN0IGFybV9zbWNjY19yZXMgcmVz Ow0KPiA+ICsJc2l6ZV90IHNyYW1yb21fdmlvX3N0YTsNCj4gPiArCWludCBzcmFtcm9tX3ZpbzsN Cj4gPiArCXUzMiBydzsNCj4gPiArDQo+ID4gKwlzcmFtcm9tX3Zpb3MgPSBkZXZhcGNfY3R4LT5z b2MtPnNyYW1yb21fc2VjX3Zpb3M7DQo+ID4gKwl2aW9faW5mbyA9IGRldmFwY19jdHgtPnNvYy0+ dmlvX2luZm87DQo+ID4gKw0KPiA+ICsJYXJtX3NtY2NjX3NtYyhNVEtfU0lQX0tFUk5FTF9DTFJf U1JBTVJPTV9WSU8sDQo+ID4gKwkJICAgICAgMCwgMCwgMCwgMCwgMCwgMCwgMCwgJnJlcyk7DQo+ ID4gKw0KPiA+ICsJc3JhbXJvbV92aW8gPSByZXMuYTA7DQo+ID4gKwlzcmFtcm9tX3Zpb19zdGEg PSByZXMuYTE7DQo+ID4gKwl2aW9faW5mby0+dmlvX2FkZHIgPSByZXMuYTI7DQo+ID4gKw0KPiA+ ICsJaWYgKHNyYW1yb21fdmlvID09IFNSQU1fVklPTEFUSU9OKQ0KPiA+ICsJCXByX2luZm8oUEZY ICJTUkFNIHZpb2xhdGlvbiBpcyB0cmlnZ2VyZWRcbiIpOw0KPiA+ICsJZWxzZSBpZiAoc3JhbXJv bV92aW8gPT0gUk9NX1ZJT0xBVElPTikNCj4gPiArCQlwcl9pbmZvKFBGWCAiUk9NIHZpb2xhdGlv biBpcyB0cmlnZ2VyZWRcbiIpOw0KPiA+ICsJZWxzZQ0KPiA+ICsJCXJldHVybjsNCj4gPiArDQo+ ID4gKwl2aW9faW5mby0+bWFzdGVyX2lkID0gKHNyYW1yb21fdmlvX3N0YSAmIHNyYW1yb21fdmlv cy0+dmlvX2lkX21hc2spDQo+ID4gKwkJCT4+IHNyYW1yb21fdmlvcy0+dmlvX2lkX3NoaWZ0Ow0K PiA+ICsJdmlvX2luZm8tPmRvbWFpbl9pZCA9IChzcmFtcm9tX3Zpb19zdGEgJiBzcmFtcm9tX3Zp b3MtPnZpb19kb21haW5fbWFzaykNCj4gPiArCQkJPj4gc3JhbXJvbV92aW9zLT52aW9fZG9tYWlu X3NoaWZ0Ow0KPiA+ICsJcncgPSAoc3JhbXJvbV92aW9fc3RhICYgc3JhbXJvbV92aW9zLT52aW9f cndfbWFzaykgPj4NCj4gPiArCQkJc3JhbXJvbV92aW9zLT52aW9fcndfc2hpZnQ7DQo+ID4gKw0K PiA+ICsJaWYgKHJ3KQ0KPiA+ICsJCXZpb19pbmZvLT53cml0ZSA9IDE7DQo+ID4gKwllbHNlDQo+ ID4gKwkJdmlvX2luZm8tPnJlYWQgPSAxOw0KPiA+ICsNCj4gPiArCXByX2luZm8oUEZYICIlczog bWFzdGVyX2lkOjB4JXgsIGRvbWFpbl9pZDoweCV4LCBydzolcywgdmlvX2FkZHI6MHgleFxuIiwN Cj4gPiArCQlfX2Z1bmNfXywgdmlvX2luZm8tPm1hc3Rlcl9pZCwgdmlvX2luZm8tPmRvbWFpbl9p ZCwNCj4gPiArCQlydyA/ICJXcml0ZSIgOiAiUmVhZCIsIHZpb19pbmZvLT52aW9fYWRkcik7DQo+ ID4gK30NCj4gPiArDQo+ID4gK3N0YXRpYyB2b2lkIG1hc2tfbW9kdWxlX2lycShzdHJ1Y3QgbXRr X2RldmFwY19jb250ZXh0ICpkZXZhcGNfY3R4LA0KPiA+ICsJCQkgICAgaW50IHNsYXZlX3R5cGUs IHUzMiBtb2R1bGUsIGJvb2wgbWFzaykNCj4gPiArew0KPiA+ICsJc3RydWN0IG10a19kZXZhcGNf dmlvX2luZm8gKnZpb19pbmZvID0gZGV2YXBjX2N0eC0+c29jLT52aW9faW5mbzsNCj4gPiArCXUz MiBzbGF2ZV90eXBlX251bSA9IGRldmFwY19jdHgtPnNvYy0+c2xhdmVfdHlwZV9udW07DQo+ID4g Kwl1MzIgYXBjX3JlZ2lzdGVyX2luZGV4Ow0KPiA+ICsJdTMyIGFwY19zZXRfaW5kZXg7DQo+ID4g Kwl2b2lkIF9faW9tZW0gKnJlZzsNCj4gPiArDQo+ID4gKwlhcGNfcmVnaXN0ZXJfaW5kZXggPSBt b2R1bGUgLyAoTU9EX05PX0lOXzFfREVWQVBDICogMik7DQo+ID4gKwlhcGNfc2V0X2luZGV4ID0g bW9kdWxlICUgKE1PRF9OT19JTl8xX0RFVkFQQyAqIDIpOw0KPiA+ICsNCj4gPiArCWlmIChzbGF2 ZV90eXBlIDwgc2xhdmVfdHlwZV9udW0gJiYNCj4gPiArCSAgICBhcGNfcmVnaXN0ZXJfaW5kZXgg PCB2aW9faW5mby0+dmlvX21hc2tfc3RhX251bVtzbGF2ZV90eXBlXSkgew0KPiA+ICsJCXJlZyA9 IG10a19kZXZhcGNfcGRfZ2V0KGRldmFwY19jdHgsIHNsYXZlX3R5cGUsIFZJT19NQVNLLA0KPiA+ ICsJCQkJCWFwY19yZWdpc3Rlcl9pbmRleCk7DQo+ID4gKw0KPiA+ICsJCWlmIChtYXNrKQ0KPiA+ ICsJCQl3cml0ZWwocmVhZGwocmVnKSB8ICgxIDw8IGFwY19zZXRfaW5kZXgpLCByZWcpOw0KPiA+ ICsJCWVsc2UNCj4gPiArCQkJd3JpdGVsKHJlYWRsKHJlZykgJiAofigxIDw8IGFwY19zZXRfaW5k ZXgpKSwgcmVnKTsNCj4gPiArDQo+ID4gKwl9IGVsc2Ugew0KPiA+ICsJCXByX2VycihQRlggIiVz OiBPdXQgT2YgQm91bmRhcnksIHNsYXZlX3R5cGU6MHgleCwgbW9kdWxlX2luZGV4OjB4JXgsIG1h c2s6JXNcbiIsDQo+ID4gKwkJICAgICAgIF9fZnVuY19fLCBzbGF2ZV90eXBlLCBtb2R1bGUsIG1h c2sgPyAidHJ1ZSIgOiAiZmFsc2UiKTsNCj4gPiArCX0NCj4gPiArfQ0KPiA+ICsNCj4gPiArc3Rh dGljIGludCBjaGVja192aW9fbWFzayhzdHJ1Y3QgbXRrX2RldmFwY19jb250ZXh0ICpkZXZhcGNf Y3R4LCBpbnQgc2xhdmVfdHlwZSwNCj4gPiArCQkJICB1MzIgbW9kdWxlKQ0KPiA+ICt7DQo+ID4g KwlzdHJ1Y3QgbXRrX2RldmFwY192aW9faW5mbyAqdmlvX2luZm8gPSBkZXZhcGNfY3R4LT5zb2Mt PnZpb19pbmZvOw0KPiA+ICsJdTMyIHNsYXZlX3R5cGVfbnVtID0gZGV2YXBjX2N0eC0+c29jLT5z bGF2ZV90eXBlX251bTsNCj4gPiArCXUzMiBhcGNfcmVnaXN0ZXJfaW5kZXg7DQo+ID4gKwl1MzIg YXBjX3NldF9pbmRleDsNCj4gPiArCXZvaWQgX19pb21lbSAqcmVnOw0KPiA+ICsNCj4gPiArCWFw Y19yZWdpc3Rlcl9pbmRleCA9IG1vZHVsZSAvIChNT0RfTk9fSU5fMV9ERVZBUEMgKiAyKTsNCj4g PiArCWFwY19zZXRfaW5kZXggPSBtb2R1bGUgJSAoTU9EX05PX0lOXzFfREVWQVBDICogMik7DQo+ ID4gKw0KPiA+ICsJaWYgKHNsYXZlX3R5cGUgPCBzbGF2ZV90eXBlX251bSAmJg0KPiA+ICsJICAg IGFwY19yZWdpc3Rlcl9pbmRleCA8IHZpb19pbmZvLT52aW9fbWFza19zdGFfbnVtW3NsYXZlX3R5 cGVdKQ0KPiA+ICsJCXJlZyA9IG10a19kZXZhcGNfcGRfZ2V0KGRldmFwY19jdHgsIHNsYXZlX3R5 cGUsIFZJT19NQVNLLA0KPiA+ICsJCQkJCWFwY19yZWdpc3Rlcl9pbmRleCk7DQo+ID4gKwllbHNl DQo+ID4gKwkJcmV0dXJuIC1FT1ZFUkZMT1c7DQo+ID4gKw0KPiA+ICsJaWYgKHJlYWRsKHJlZykg JiAoMHgxIDw8IGFwY19zZXRfaW5kZXgpKQ0KPiA+ICsJCXJldHVybiBWSU9MQVRJT05fTUFTS0VE Ow0KPiA+ICsNCj4gPiArCXJldHVybiAwOw0KPiA+ICt9DQo+ID4gKw0KPiA+ICtzdGF0aWMgaW50 MzJfdCBjaGVja192aW9fc3RhdHVzKHN0cnVjdCBtdGtfZGV2YXBjX2NvbnRleHQgKmRldmFwY19j dHgsDQo+ID4gKwkJCQlpbnQgc2xhdmVfdHlwZSwgdTMyIG1vZHVsZSkNCj4gPiArew0KPiA+ICsJ c3RydWN0IG10a19kZXZhcGNfdmlvX2luZm8gKnZpb19pbmZvID0gZGV2YXBjX2N0eC0+c29jLT52 aW9faW5mbzsNCj4gPiArCXUzMiBzbGF2ZV90eXBlX251bSA9IGRldmFwY19jdHgtPnNvYy0+c2xh dmVfdHlwZV9udW07DQo+ID4gKwl1MzIgYXBjX3JlZ2lzdGVyX2luZGV4Ow0KPiA+ICsJdTMyIGFw Y19zZXRfaW5kZXg7DQo+ID4gKwl2b2lkIF9faW9tZW0gKnJlZzsNCj4gPiArDQo+ID4gKwlhcGNf cmVnaXN0ZXJfaW5kZXggPSBtb2R1bGUgLyAoTU9EX05PX0lOXzFfREVWQVBDICogMik7DQo+ID4g KwlhcGNfc2V0X2luZGV4ID0gbW9kdWxlICUgKE1PRF9OT19JTl8xX0RFVkFQQyAqIDIpOw0KPiA+ ICsNCj4gPiArCWlmIChzbGF2ZV90eXBlIDwgc2xhdmVfdHlwZV9udW0gJiYNCj4gPiArCSAgICBh cGNfcmVnaXN0ZXJfaW5kZXggPCB2aW9faW5mby0+dmlvX21hc2tfc3RhX251bVtzbGF2ZV90eXBl XSkgew0KPiA+ICsJCXJlZyA9IG10a19kZXZhcGNfcGRfZ2V0KGRldmFwY19jdHgsIHNsYXZlX3R5 cGUsIFZJT19TVEEsDQo+ID4gKwkJCQkJYXBjX3JlZ2lzdGVyX2luZGV4KTsNCj4gPiArDQo+ID4g Kwl9IGVsc2Ugew0KPiA+ICsJCXByX2VycihQRlggIiVzOiBPdXQgT2YgQm91bmRhcnksIHNsYXZl X3R5cGU6MHgleCwgbW9kdWxlX2luZGV4OjB4JXhcbiIsDQo+ID4gKwkJICAgICAgIF9fZnVuY19f LCBzbGF2ZV90eXBlLCBtb2R1bGUpOw0KPiA+ICsJCXJldHVybiAtRU9WRVJGTE9XOw0KPiA+ICsJ fQ0KPiA+ICsNCj4gPiArCWlmIChyZWFkbChyZWcpICYgKDB4MSA8PCBhcGNfc2V0X2luZGV4KSkN Cj4gPiArCQlyZXR1cm4gVklPTEFUSU9OX1RSSUdHRVJFRDsNCj4gPiArDQo+ID4gKwlyZXR1cm4g MDsNCj4gPiArfQ0KPiA+ICsNCj4gPiArc3RhdGljIGludDMyX3QgY2xlYXJfdmlvX3N0YXR1cyhz dHJ1Y3QgbXRrX2RldmFwY19jb250ZXh0ICpkZXZhcGNfY3R4LA0KPiA+ICsJCQkJaW50IHNsYXZl X3R5cGUsIHUzMiBtb2R1bGUpDQo+ID4gK3sNCj4gPiArCXN0cnVjdCBtdGtfZGV2YXBjX3Zpb19p bmZvICp2aW9faW5mbyA9IGRldmFwY19jdHgtPnNvYy0+dmlvX2luZm87DQo+ID4gKwl1MzIgc2xh dmVfdHlwZV9udW0gPSBkZXZhcGNfY3R4LT5zb2MtPnNsYXZlX3R5cGVfbnVtOw0KPiA+ICsJdTMy IGFwY19yZWdpc3Rlcl9pbmRleDsNCj4gPiArCXUzMiBhcGNfc2V0X2luZGV4Ow0KPiA+ICsJdm9p ZCBfX2lvbWVtICpyZWc7DQo+ID4gKw0KPiA+ICsJYXBjX3JlZ2lzdGVyX2luZGV4ID0gbW9kdWxl IC8gKE1PRF9OT19JTl8xX0RFVkFQQyAqIDIpOw0KPiA+ICsJYXBjX3NldF9pbmRleCA9IG1vZHVs ZSAlIChNT0RfTk9fSU5fMV9ERVZBUEMgKiAyKTsNCj4gPiArDQo+ID4gKwlpZiAoc2xhdmVfdHlw ZSA8IHNsYXZlX3R5cGVfbnVtICYmDQo+ID4gKwkgICAgYXBjX3JlZ2lzdGVyX2luZGV4IDwgdmlv X2luZm8tPnZpb19tYXNrX3N0YV9udW1bc2xhdmVfdHlwZV0pIHsNCj4gPiArCQlyZWcgPSBtdGtf ZGV2YXBjX3BkX2dldChkZXZhcGNfY3R4LCBzbGF2ZV90eXBlLCBWSU9fU1RBLA0KPiA+ICsJCQkJ CWFwY19yZWdpc3Rlcl9pbmRleCk7DQo+ID4gKwkJd3JpdGVsKDB4MSA8PCBhcGNfc2V0X2luZGV4 LCByZWcpOw0KPiA+ICsNCj4gPiArCX0gZWxzZSB7DQo+ID4gKwkJcHJfZXJyKFBGWCAiJXM6IE91 dCBPZiBCb3VuZGFyeSwgc2xhdmVfdHlwZToweCV4LCBtb2R1bGVfaW5kZXg6MHgleFxuIiwNCj4g PiArCQkgICAgICAgX19mdW5jX18sIHNsYXZlX3R5cGUsIG1vZHVsZSk7DQo+ID4gKwkJcmV0dXJu IC1FT1ZFUkZMT1c7DQo+ID4gKwl9DQo+ID4gKw0KPiA+ICsJaWYgKGNoZWNrX3Zpb19zdGF0dXMo ZGV2YXBjX2N0eCwgc2xhdmVfdHlwZSwgbW9kdWxlKSkNCj4gPiArCQlyZXR1cm4gLUVJTzsNCj4g PiArDQo+ID4gKwlyZXR1cm4gMDsNCj4gPiArfQ0KPiA+ICsNCj4gPiArc3RhdGljIHZvaWQgZGV2 YXBjX3Zpb19pbmZvX3ByaW50KHN0cnVjdCBtdGtfZGV2YXBjX2NvbnRleHQgKmRldmFwY19jdHgp DQo+ID4gK3sNCj4gPiArCXN0cnVjdCBtdGtfZGV2YXBjX3Zpb19pbmZvICp2aW9faW5mbzsNCj4g PiArDQo+ID4gKwl2aW9faW5mbyA9IGRldmFwY19jdHgtPnNvYy0+dmlvX2luZm87DQo+ID4gKw0K PiA+ICsJLyogUHJpbnQgdmlvbGF0aW9uIGluZm9ybWF0aW9uICovDQo+ID4gKwlpZiAodmlvX2lu Zm8tPndyaXRlKQ0KPiA+ICsJCXByX2luZm8oUEZYICJXcml0ZSBWaW9sYXRpb25cbiIpOw0KPiA+ ICsJZWxzZSBpZiAodmlvX2luZm8tPnJlYWQpDQo+ID4gKwkJcHJfaW5mbyhQRlggIlJlYWQgVmlv bGF0aW9uXG4iKTsNCj4gPiArDQo+ID4gKwlwcl9pbmZvKFBGWCAiJXMleCwgJXMleCwgJXMleCwg JXMleFxuIiwNCj4gPiArCQkiVmlvIEFkZHI6MHgiLCB2aW9faW5mby0+dmlvX2FkZHIsDQo+ID4g KwkJIkhpZ2g6MHgiLCB2aW9faW5mby0+dmlvX2FkZHJfaGlnaCwNCj4gPiArCQkiQnVzIElEOjB4 IiwgdmlvX2luZm8tPm1hc3Rlcl9pZCwNCj4gPiArCQkiRG9tIElEOjB4IiwgdmlvX2luZm8tPmRv bWFpbl9pZCk7DQo+ID4gK30NCj4gPiArDQo+ID4gKy8qDQo+ID4gKyAqIGNoZWNrX3R5cGUyX3Zp b19zdGF0dXMgLSB0aGVyZSBhcmUgdHlwZSAyIHNsYXZlcyB3aGljaCB2aW9sYXRpb24gaW5mb3Jt YXRpb24NCj4gPiArICoJCQkgICAgaXMgc3RvcmVkIGluIGRpZmZlcmVudCByZWdpc3RlciBiYW5r Lg0KPiA+ICsgKg0KPiA+ICsgKiBSZXR1cm5zIHRydWUgaWYgdHlwZTIgdmlvbGF0aW9uIGlzIHRy aWdnZXJlZC4NCj4gPiArICovDQo+ID4gK3N0YXRpYyBib29sIGNoZWNrX3R5cGUyX3Zpb19zdGF0 dXMoc3RydWN0IG10a19kZXZhcGNfY29udGV4dCAqZGV2YXBjX2N0eCwNCj4gPiArCQkJCSAgIGlu dCBzbGF2ZV90eXBlLCBpbnQgKnZpb19pZHgsIGludCAqaW5kZXgpDQo+ID4gK3sNCj4gPiArCXUz MiBzcmFtcm9tX3Zpb19pZHgsIG1kcF92aW9faWR4LCBkaXNwMl92aW9faWR4LCBtbXN5c192aW9f aWR4Ow0KPiA+ICsJY29uc3Qgc3RydWN0IG10a19kZXZpY2VfaW5mbyAqKmRldmljZV9pbmZvOw0K PiA+ICsJY29uc3Qgc3RydWN0IG10a19kZXZpY2VfbnVtICpuZGV2aWNlczsNCj4gPiArCWludCBz cmFtcm9tX3Nsdl90eXBlLCBtbTJuZF9zbHZfdHlwZTsNCj4gPiArCWJvb2wgbWRwX3ZpbywgZGlz cDJfdmlvLCBtbXN5c192aW87DQo+ID4gKwlpbnQgaTsNCj4gPiArDQo+ID4gKwlzcmFtcm9tX3Ns dl90eXBlID0gZGV2YXBjX2N0eC0+c29jLT52aW9faW5mby0+c3JhbXJvbV9zbHZfdHlwZTsNCj4g PiArCXNyYW1yb21fdmlvX2lkeCA9IGRldmFwY19jdHgtPnNvYy0+dmlvX2luZm8tPnNyYW1yb21f dmlvX2lkeDsNCj4gPiArDQo+ID4gKwltbTJuZF9zbHZfdHlwZSA9IGRldmFwY19jdHgtPnNvYy0+ dmlvX2luZm8tPm1tMm5kX3Nsdl90eXBlOw0KPiA+ICsJbWRwX3Zpb19pZHggPSBkZXZhcGNfY3R4 LT5zb2MtPnZpb19pbmZvLT5tZHBfdmlvX2lkeDsNCj4gPiArCWRpc3AyX3Zpb19pZHggPSBkZXZh cGNfY3R4LT5zb2MtPnZpb19pbmZvLT5kaXNwMl92aW9faWR4Ow0KPiA+ICsJbW1zeXNfdmlvX2lk eCA9IGRldmFwY19jdHgtPnNvYy0+dmlvX2luZm8tPm1tc3lzX3Zpb19pZHg7DQo+ID4gKw0KPiA+ ICsJZGV2aWNlX2luZm8gPSBkZXZhcGNfY3R4LT5zb2MtPmRldmljZV9pbmZvOw0KPiA+ICsJbmRl dmljZXMgPSBkZXZhcGNfY3R4LT5zb2MtPm5kZXZpY2VzOw0KPiA+ICsNCj4gPiArCS8qIGNoZWNr IFNSQU1ST00gdmlvbGF0aW9uICovDQo+ID4gKwlpZiAoc2xhdmVfdHlwZSA9PSBzcmFtcm9tX3Ns dl90eXBlICYmDQo+ID4gKwkgICAgY2hlY2tfdmlvX3N0YXR1cyhkZXZhcGNfY3R4LCBzbGF2ZV90 eXBlLCBzcmFtcm9tX3Zpb19pZHgpKSB7DQo+ID4gKwkJcHJfaW5mbyhQRlggIlNSQU1ST00gdmlv bGF0aW9uIGlzIHRyaWdnZXJlZFxuIik7DQo+ID4gKwkJc3JhbXJvbV92aW9faGFuZGxlcihkZXZh cGNfY3R4KTsNCj4gPiArDQo+ID4gKwkJKnZpb19pZHggPSBzcmFtcm9tX3Zpb19pZHg7DQo+ID4g KwkJZm9yIChpID0gMDsgaSA8IG5kZXZpY2VzW3NsYXZlX3R5cGVdLnZpb19zbGF2ZV9udW07IGkr Kykgew0KPiA+ICsJCQlpZiAoZGV2aWNlX2luZm9bc2xhdmVfdHlwZV1baV0udmlvX2luZGV4ID09 ICp2aW9faWR4KQ0KPiA+ICsJCQkJKmluZGV4ID0gaTsNCj4gPiArCQl9DQo+ID4gKw0KPiA+ICsJ CXJldHVybiB0cnVlOw0KPiA+ICsJfQ0KPiA+ICsNCj4gPiArCS8qIGNoZWNrIE1NIDJuZCBsZXZl bCB2aW9sYXRpb24gKi8NCj4gPiArCWlmIChzbGF2ZV90eXBlID09IG1tMm5kX3Nsdl90eXBlKSB7 DQo+ID4gKwkJbWRwX3ZpbyA9IGNoZWNrX3Zpb19zdGF0dXMoZGV2YXBjX2N0eCwgc2xhdmVfdHlw ZSwNCj4gPiArCQkJCQkgICBtZHBfdmlvX2lkeCkgPT0NCj4gPiArCQkJCQkgICBWSU9MQVRJT05f VFJJR0dFUkVEOw0KPiA+ICsJCWRpc3AyX3ZpbyA9IGNoZWNrX3Zpb19zdGF0dXMoZGV2YXBjX2N0 eCwgc2xhdmVfdHlwZSwNCj4gPiArCQkJCQkgICAgIGRpc3AyX3Zpb19pZHgpID09DQo+ID4gKwkJ CQkJICAgICBWSU9MQVRJT05fVFJJR0dFUkVEOw0KPiA+ICsJCW1tc3lzX3ZpbyA9IGNoZWNrX3Zp b19zdGF0dXMoZGV2YXBjX2N0eCwgc2xhdmVfdHlwZSwNCj4gPiArCQkJCQkgICAgIG1tc3lzX3Zp b19pZHgpID09DQo+ID4gKwkJCQkJICAgICBWSU9MQVRJT05fVFJJR0dFUkVEOw0KPiA+ICsNCj4g PiArCQlpZiAobWRwX3ZpbyB8fCBkaXNwMl92aW8gfHwgbW1zeXNfdmlvKSB7DQo+ID4gKwkJCXBy X2luZm8oUEZYICJNTTJuZCB2aW9sYXRpb24gaXMgdHJpZ2dlcmVkXG4iKTsNCj4gPiArCQkJZGV2 YXBjX2N0eC0+c29jLT5tbTJuZF92aW9faGFuZGxlcg0KPiA+ICsJCQkJKGRldmFwY19jdHgtPmlu ZnJhY2ZnX2Jhc2UsDQo+ID4gKwkJCQkgZGV2YXBjX2N0eC0+c29jLT52aW9faW5mbywNCj4gPiAr CQkJCSBtZHBfdmlvLA0KPiA+ICsJCQkJIGRpc3AyX3ZpbywNCj4gPiArCQkJCSBtbXN5c192aW8p Ow0KPiA+ICsJCX0gZWxzZSB7DQo+ID4gKwkJCXJldHVybiBmYWxzZTsNCj4gPiArCQl9DQo+ID4g Kw0KPiA+ICsJCWlmIChtZHBfdmlvKQ0KPiA+ICsJCQkqdmlvX2lkeCA9IG1kcF92aW9faWR4Ow0K PiA+ICsJCWVsc2UgaWYgKGRpc3AyX3ZpbykNCj4gPiArCQkJKnZpb19pZHggPSBkaXNwMl92aW9f aWR4Ow0KPiA+ICsJCWVsc2UgaWYgKG1tc3lzX3ZpbykNCj4gPiArCQkJKnZpb19pZHggPSBtbXN5 c192aW9faWR4Ow0KPiA+ICsNCj4gPiArCQlmb3IgKGkgPSAwOyBpIDwgbmRldmljZXNbc2xhdmVf dHlwZV0udmlvX3NsYXZlX251bTsgaSsrKSB7DQo+ID4gKwkJCWlmIChkZXZpY2VfaW5mb1tzbGF2 ZV90eXBlXVtpXS52aW9faW5kZXggPT0gKnZpb19pZHgpDQo+ID4gKwkJCQkqaW5kZXggPSBpOw0K PiA+ICsJCX0NCj4gPiArDQo+ID4gKwkJZGV2YXBjX3Zpb19pbmZvX3ByaW50KGRldmFwY19jdHgp Ow0KPiA+ICsJCXJldHVybiB0cnVlOw0KPiA+ICsJfQ0KPiA+ICsNCj4gPiArCXJldHVybiBmYWxz ZTsNCj4gPiArfQ0KPiA+ICsNCj4gPiArLyoNCj4gPiArICogc3luY192aW9fZGJnIC0gc3RhcnQg dG8gZ2V0IHZpb2xhdGlvbiBpbmZvcm1hdGlvbiBieSBzZWxlY3RpbmcgdmlvbGF0aW9uDQo+ID4g KyAqCQkgIGdyb3VwIGFuZCBlbmFibGUgdmlvbGF0aW9uIHNoaWZ0Lg0KPiA+ICsgKg0KPiA+ICsg KiBSZXR1cm5zIHN5bmMgZG9uZSBvciBub3QNCj4gPiArICovDQo+ID4gK3N0YXRpYyB1MzIgc3lu Y192aW9fZGJnKHN0cnVjdCBtdGtfZGV2YXBjX2NvbnRleHQgKmRldmFwY19jdHgsIGludCBzbGF2 ZV90eXBlLA0KPiA+ICsJCQl1MzIgc2hpZnRfYml0KQ0KPiA+ICt7DQo+ID4gKwl1MzIgc2xhdmVf dHlwZV9udW0gPSBkZXZhcGNfY3R4LT5zb2MtPnNsYXZlX3R5cGVfbnVtOw0KPiA+ICsJdm9pZCBf X2lvbWVtICpwZF92aW9fc2hpZnRfc3RhX3JlZzsNCj4gPiArCXZvaWQgX19pb21lbSAqcGRfdmlv X3NoaWZ0X3NlbF9yZWc7DQo+ID4gKwl2b2lkIF9faW9tZW0gKnBkX3Zpb19zaGlmdF9jb25fcmVn Ow0KPiA+ICsJdTMyIHNoaWZ0X2NvdW50Ow0KPiA+ICsJdTMyIHN5bmNfZG9uZTsNCj4gPiArDQo+ ID4gKwlpZiAoc2xhdmVfdHlwZSA+PSBzbGF2ZV90eXBlX251bSB8fA0KPiA+ICsJICAgIHNoaWZ0 X2JpdCA+PSAoTU9EX05PX0lOXzFfREVWQVBDICogMikpIHsNCj4gPiArCQlwcl9lcnIoUEZYICJw YXJhbSBjaGVjayBmYWlsZWQsIHNsYXZlX3R5cGU6MHgleCwgc2hpZnRfYml0OjB4JXhcbiIsDQo+ ID4gKwkJICAgICAgIHNsYXZlX3R5cGUsIHNoaWZ0X2JpdCk7DQo+ID4gKwkJcmV0dXJuIDA7DQo+ ID4gKwl9DQo+ID4gKw0KPiA+ICsJcGRfdmlvX3NoaWZ0X3N0YV9yZWcgPSBtdGtfZGV2YXBjX3Bk X2dldChkZXZhcGNfY3R4LCBzbGF2ZV90eXBlLA0KPiA+ICsJCQkJCQkgVklPX1NISUZUX1NUQSwg MCk7DQo+ID4gKwlwZF92aW9fc2hpZnRfc2VsX3JlZyA9IG10a19kZXZhcGNfcGRfZ2V0KGRldmFw Y19jdHgsIHNsYXZlX3R5cGUsDQo+ID4gKwkJCQkJCSBWSU9fU0hJRlRfU0VMLCAwKTsNCj4gPiAr CXBkX3Zpb19zaGlmdF9jb25fcmVnID0gbXRrX2RldmFwY19wZF9nZXQoZGV2YXBjX2N0eCwgc2xh dmVfdHlwZSwNCj4gPiArCQkJCQkJIFZJT19TSElGVF9DT04sIDApOw0KPiA+ICsNCj4gPiArCXdy aXRlbCgweDEgPDwgc2hpZnRfYml0LCBwZF92aW9fc2hpZnRfc2VsX3JlZyk7DQo+ID4gKwl3cml0 ZWwoMHgxLCBwZF92aW9fc2hpZnRfY29uX3JlZyk7DQo+ID4gKw0KPiA+ICsJZm9yIChzaGlmdF9j b3VudCA9IDA7IChzaGlmdF9jb3VudCA8IDEwMCkgJiYNCj4gPiArCSAgICAgKChyZWFkbChwZF92 aW9fc2hpZnRfY29uX3JlZykgJiAweDMpICE9IDB4Myk7DQo+ID4gKwkgICAgICsrc2hpZnRfY291 bnQpDQo+ID4gKwkJOw0KPiA+ICsNCj4gPiArCWlmICgocmVhZGwocGRfdmlvX3NoaWZ0X2Nvbl9y ZWcpICYgMHgzKSA9PSAweDMpDQo+ID4gKwkJc3luY19kb25lID0gMTsNCj4gPiArCWVsc2UNCj4g PiArCQlzeW5jX2RvbmUgPSAwOw0KPiA+ICsNCj4gPiArCS8qIERpc2FibGUgc2hpZnQgbWVjaGFu aXNtICovDQo+ID4gKwl3cml0ZWwoMHgwLCBwZF92aW9fc2hpZnRfY29uX3JlZyk7DQo+ID4gKwl3 cml0ZWwoMHgwLCBwZF92aW9fc2hpZnRfc2VsX3JlZyk7DQo+ID4gKwl3cml0ZWwoMHgxIDw8IHNo aWZ0X2JpdCwgcGRfdmlvX3NoaWZ0X3N0YV9yZWcpOw0KPiA+ICsNCj4gPiArCXJldHVybiBzeW5j X2RvbmU7DQo+ID4gK30NCj4gPiArDQo+ID4gK3N0YXRpYyBjb25zdCBjaGFyICogY29uc3QgcGVy bV90b19zdHJbXSA9IHsNCj4gPiArCSJOT19QUk9URUNUSU9OIiwNCj4gPiArCSJTRUNVUkVfUldf T05MWSIsDQo+ID4gKwkiU0VDVVJFX1JXX05TX1JfT05MWSIsDQo+ID4gKwkiRk9SQklEREVOIiwN Cj4gPiArCSJOT19QRVJNX0NUUkwiDQo+ID4gK307DQo+ID4gKw0KPiA+ICtzdGF0aWMgY29uc3Qg Y2hhciAqcGVybV90b19zdHJpbmcodTggcGVybSkNCj4gPiArew0KPiA+ICsJaWYgKHBlcm0gPCBQ RVJNX1RZUEVfTlVNKQ0KPiA+ICsJCXJldHVybiBwZXJtX3RvX3N0cltwZXJtXTsNCj4gPiArCWVs c2UNCj4gPiArCQlyZXR1cm4gcGVybV90b19zdHJbUEVSTV9UWVBFX05VTV07DQo+ID4gK30NCj4g PiArDQo+ID4gK3N0YXRpYyB2b2lkIGRldmFwY192aW9fcmVhc29uKHU4IHBlcm0pDQo+ID4gK3sN Cj4gPiArCXByX2luZm8oUEZYICJQZXJtaXNzaW9uIHNldHRpbmc6ICVzXG4iLCBwZXJtX3RvX3N0 cmluZyhwZXJtKSk7DQo+ID4gKw0KPiA+ICsJaWYgKHBlcm0gPT0gTk9fUFJPVEVDVElPTiB8fCBw ZXJtID49IFBFUk1fVFlQRV9OVU0pDQo+ID4gKwkJcHJfaW5mbyhQRlggIlJlYXNvbjogcG93ZXIv Y2xvY2sgaXMgbm90IGVuYWJsZWRcbiIpOw0KPiA+ICsJZWxzZSBpZiAocGVybSA9PSBTRUNfUldf T05MWSB8fA0KPiA+ICsJCSBwZXJtID09IFNFQ19SV19OU19SIHx8DQo+ID4gKwkJIHBlcm0gPT0g Rk9SQklEREVOKQ0KPiA+ICsJCXByX2luZm8oUEZYICJSZWFzb246IG1pZ2h0IGJlIHBlcm1pc3Np b24gZGVuaWVkXG4iKTsNCj4gPiArfQ0KPiA+ICsNCj4gPiArLyoNCj4gPiArICogZ2V0X3Blcm1p c3Npb24gLSBnZXQgc2xhdmUncyBhY2Nlc3MgcGVybWlzc2lvbiBvZiBkb21haW4gaWQuDQo+ID4g KyAqDQo+ID4gKyAqIFJldHVybnMgdGhlIHZhbHVlIG9mIGFjY2VzcyBwZXJtaXNzaW9uDQo+ID4g KyAqLw0KPiA+ICtzdGF0aWMgdTggZ2V0X3Blcm1pc3Npb24oc3RydWN0IG10a19kZXZhcGNfY29u dGV4dCAqZGV2YXBjX2N0eCwgaW50IHNsYXZlX3R5cGUsDQo+ID4gKwkJCSBpbnQgbW9kdWxlX2lu ZGV4LCBpbnQgZG9tYWluKQ0KPiA+ICt7DQo+ID4gKwl1MzIgc2xhdmVfdHlwZV9udW0gPSBkZXZh cGNfY3R4LT5zb2MtPnNsYXZlX3R5cGVfbnVtOw0KPiA+ICsJY29uc3Qgc3RydWN0IG10a19kZXZp Y2VfaW5mbyAqKmRldmljZV9pbmZvOw0KPiA+ICsJY29uc3Qgc3RydWN0IG10a19kZXZpY2VfbnVt ICpuZGV2aWNlczsNCj4gPiArCWludCBzeXNfaW5kZXgsIGN0cmxfaW5kZXgsIHZpb19pbmRleDsN Cj4gPiArCXN0cnVjdCBhcm1fc21jY2NfcmVzIHJlczsNCj4gPiArCXUzMiByZXQsIGFwY19zZXRf aW5kZXg7DQo+ID4gKw0KPiA+ICsJbmRldmljZXMgPSBkZXZhcGNfY3R4LT5zb2MtPm5kZXZpY2Vz Ow0KPiA+ICsNCj4gPiArCWlmIChzbGF2ZV90eXBlID49IHNsYXZlX3R5cGVfbnVtIHx8DQo+ID4g KwkgICAgbW9kdWxlX2luZGV4ID49IG5kZXZpY2VzW3NsYXZlX3R5cGVdLnZpb19zbGF2ZV9udW0p IHsNCj4gPiArCQlwcl9lcnIoUEZYICIlczogcGFyYW0gY2hlY2sgZmFpbGVkLCBzbGF2ZV90eXBl OjB4JXgsIG1vZHVsZV9pbmRleDoweCV4XG4iLA0KPiA+ICsJCSAgICAgICBfX2Z1bmNfXywgc2xh dmVfdHlwZSwgbW9kdWxlX2luZGV4KTsNCj4gPiArCQlyZXR1cm4gMHhGRjsNCj4gPiArCX0NCj4g PiArDQo+ID4gKwlkZXZpY2VfaW5mbyA9IGRldmFwY19jdHgtPnNvYy0+ZGV2aWNlX2luZm87DQo+ ID4gKw0KPiA+ICsJc3lzX2luZGV4ID0gZGV2aWNlX2luZm9bc2xhdmVfdHlwZV1bbW9kdWxlX2lu ZGV4XS5zeXNfaW5kZXg7DQo+ID4gKwljdHJsX2luZGV4ID0gZGV2aWNlX2luZm9bc2xhdmVfdHlw ZV1bbW9kdWxlX2luZGV4XS5jdHJsX2luZGV4Ow0KPiA+ICsJdmlvX2luZGV4ID0gZGV2aWNlX2lu Zm9bc2xhdmVfdHlwZV1bbW9kdWxlX2luZGV4XS52aW9faW5kZXg7DQo+ID4gKw0KPiA+ICsJaWYg KHN5c19pbmRleCA9PSAtMSB8fCBjdHJsX2luZGV4ID09IC0xKQ0KPiA+ICsJCXJldHVybiAweEZG Ow0KPiA+ICsNCj4gPiArCWFybV9zbWNjY19zbWMoTVRLX1NJUF9LRVJORUxfREFQQ19QRVJNX0dF VCwgc2xhdmVfdHlwZSwgc3lzX2luZGV4LA0KPiA+ICsJCSAgICAgIGRvbWFpbiwgY3RybF9pbmRl eCwgdmlvX2luZGV4LCAwLCAwLCAmcmVzKTsNCj4gPiArCXJldCA9IHJlcy5hMDsNCj4gPiArDQo+ ID4gKwlpZiAocmV0ID09IERFQUQpIHsNCj4gPiArCQlwcl9lcnIoUEZYICJwZXJtaXNzaW9uIGdl dCBmYWlsZWQsIHJldDoweCV4XG4iLCByZXQpOw0KPiA+ICsJCXJldHVybiAweEZGOw0KPiA+ICsJ fQ0KPiA+ICsNCj4gPiArCWFwY19zZXRfaW5kZXggPSBjdHJsX2luZGV4ICUgTU9EX05PX0lOXzFf REVWQVBDOw0KPiA+ICsJcmV0ID0gKHJldCAmICgweDMgPDwgKGFwY19zZXRfaW5kZXggKiAyKSkp ID4+IChhcGNfc2V0X2luZGV4ICogMik7DQo+ID4gKw0KPiA+ICsJcmV0dXJuIChyZXQgJiAweDMp Ow0KPiA+ICt9DQo+ID4gKw0KPiA+ICsvKg0KPiA+ICsgKiBtdGtfZGV2YXBjX3Zpb19jaGVjayAt IGNoZWNrIHZpb2xhdGlvbiBzaGlmdCBzdGF0dXMgaXMgcmFpc2VkIG9yIG5vdC4NCj4gPiArICoN Cj4gPiArICogUmV0dXJucyB0aGUgdmFsdWUgb2YgdmlvbGF0aW9uIHNoaWZ0IHN0YXR1cyByZWcN Cj4gPiArICovDQo+ID4gK3N0YXRpYyB2b2lkIG10a19kZXZhcGNfdmlvX2NoZWNrKHN0cnVjdCBt dGtfZGV2YXBjX2NvbnRleHQgKmRldmFwY19jdHgsDQo+ID4gKwkJCQkgaW50IHNsYXZlX3R5cGUs IGludCAqc2hpZnRfYml0KQ0KPiA+ICt7DQo+ID4gKwlzdHJ1Y3QgbXRrX2RldmFwY192aW9faW5m byAqdmlvX2luZm87DQo+ID4gKwl1MzIgdmlvX3NoaWZ0X3N0YTsNCj4gPiArCWludCBpOw0KPiA+ ICsNCj4gPiArCXZpb19pbmZvID0gZGV2YXBjX2N0eC0+c29jLT52aW9faW5mbzsNCj4gPiArCXZp b19zaGlmdF9zdGEgPSByZWFkbChtdGtfZGV2YXBjX3BkX2dldChkZXZhcGNfY3R4LCBzbGF2ZV90 eXBlLA0KPiA+ICsJCQkJCQlWSU9fU0hJRlRfU1RBLCAwKSk7DQo+ID4gKw0KPiA+ICsJaWYgKCF2 aW9fc2hpZnRfc3RhKSB7DQo+ID4gKwkJcHJfaW5mbyhQRlggInZpb2xhdGlvbiBpcyB0cmlnZ2Vy ZWQgYmVmb3JlLiBzaGlmdF9iaXQ6MHgleFxuIiwNCj4gPiArCQkJKnNoaWZ0X2JpdCk7DQo+ID4g Kw0KPiA+ICsJfSBlbHNlIGlmICh2aW9fc2hpZnRfc3RhICYgKDB4MVVMIDw8ICpzaGlmdF9iaXQp KSB7DQo+ID4gKwkJcHJfZGVidWcoUEZYICJ2aW9fc2hpZnRfc3RhOjB4JXggaXMgbWF0Y2hlZCB3 aXRoIHNoaWZ0X2JpdDolZFxuIiwNCj4gPiArCQkJIHZpb19zaGlmdF9zdGEsICpzaGlmdF9iaXQp Ow0KPiA+ICsNCj4gPiArCX0gZWxzZSB7DQo+ID4gKwkJcHJfaW5mbyhQRlggInZpb19zaGlmdF9z dGE6MHgleCBpcyBub3QgbWF0Y2hlZCB3aXRoIHNoaWZ0X2JpdDolZFxuIiwNCj4gPiArCQkJdmlv X3NoaWZ0X3N0YSwgKnNoaWZ0X2JpdCk7DQo+ID4gKw0KPiA+ICsJCWZvciAoaSA9IDA7IGkgPCBN T0RfTk9fSU5fMV9ERVZBUEMgKiAyOyBpKyspIHsNCj4gPiArCQkJaWYgKHZpb19zaGlmdF9zdGEg JiAoMHgxIDw8IGkpKSB7DQo+ID4gKwkJCQkqc2hpZnRfYml0ID0gaTsNCj4gPiArCQkJCWJyZWFr Ow0KPiA+ICsJCQl9DQo+ID4gKwkJfQ0KPiA+ICsJfQ0KPiA+ICsNCj4gPiArCXZpb19pbmZvLT5z aGlmdF9zdGFfYml0ID0gKnNoaWZ0X2JpdDsNCj4gPiArfQ0KPiA+ICsNCj4gPiArc3RhdGljIHZv aWQgZGV2YXBjX2V4dHJhY3RfdmlvX2RiZyhzdHJ1Y3QgbXRrX2RldmFwY19jb250ZXh0ICpkZXZh cGNfY3R4LA0KPiA+ICsJCQkJICAgaW50IHNsYXZlX3R5cGUpDQo+ID4gK3sNCj4gPiArCXZvaWQg X19pb21lbSAqdmlvX2RiZzBfcmVnLCAqdmlvX2RiZzFfcmVnLCAqdmlvX2RiZzJfcmVnOw0KPiA+ ICsJY29uc3Qgc3RydWN0IG10a19pbmZyYV92aW9fZGJnX2Rlc2MgKnZpb19kYmdzOw0KPiA+ICsJ c3RydWN0IG10a19kZXZhcGNfdmlvX2luZm8gKnZpb19pbmZvOw0KPiA+ICsJdTMyIGRiZzA7DQo+ ID4gKw0KPiA+ICsJdmlvX2RiZzBfcmVnID0gbXRrX2RldmFwY19wZF9nZXQoZGV2YXBjX2N0eCwg c2xhdmVfdHlwZSwgVklPX0RCRzAsIDApOw0KPiA+ICsJdmlvX2RiZzFfcmVnID0gbXRrX2RldmFw Y19wZF9nZXQoZGV2YXBjX2N0eCwgc2xhdmVfdHlwZSwgVklPX0RCRzEsIDApOw0KPiA+ICsJdmlv X2RiZzJfcmVnID0gbXRrX2RldmFwY19wZF9nZXQoZGV2YXBjX2N0eCwgc2xhdmVfdHlwZSwgVklP X0RCRzIsIDApOw0KPiA+ICsNCj4gPiArCXZpb19kYmdzID0gZGV2YXBjX2N0eC0+c29jLT52aW9f ZGJnczsNCj4gPiArCXZpb19pbmZvID0gZGV2YXBjX2N0eC0+c29jLT52aW9faW5mbzsNCj4gPiAr DQo+ID4gKwkvKiBFeHRyYWN0IHZpb2xhdGlvbiBpbmZvcm1hdGlvbiAqLw0KPiA+ICsJZGJnMCA9 IHJlYWRsKHZpb19kYmcwX3JlZyk7DQo+ID4gKwl2aW9faW5mby0+bWFzdGVyX2lkID0gcmVhZGwo dmlvX2RiZzFfcmVnKTsNCj4gPiArCXZpb19pbmZvLT52aW9fYWRkciA9IHJlYWRsKHZpb19kYmcy X3JlZyk7DQo+ID4gKw0KPiA+ICsJdmlvX2luZm8tPmRvbWFpbl9pZCA9IChkYmcwICYgdmlvX2Ri Z3MtPnZpb19kYmdfZG1uaWQpDQo+ID4gKwkJPj4gdmlvX2RiZ3MtPnZpb19kYmdfZG1uaWRfc3Rh cnRfYml0Ow0KPiA+ICsJdmlvX2luZm8tPndyaXRlID0gKChkYmcwICYgdmlvX2RiZ3MtPnZpb19k Ymdfd192aW8pDQo+ID4gKwkJCT4+IHZpb19kYmdzLT52aW9fZGJnX3dfdmlvX3N0YXJ0X2JpdCkg PT0gMTsNCj4gPiArCXZpb19pbmZvLT5yZWFkID0gKChkYmcwICYgdmlvX2RiZ3MtPnZpb19kYmdf cl92aW8pDQo+ID4gKwkJCT4+IHZpb19kYmdzLT52aW9fZGJnX3JfdmlvX3N0YXJ0X2JpdCkgPT0g MTsNCj4gPiArCXZpb19pbmZvLT52aW9fYWRkcl9oaWdoID0gKGRiZzAgJiB2aW9fZGJncy0+dmlv X2FkZHJfaGlnaCkNCj4gPiArCQk+PiB2aW9fZGJncy0+dmlvX2FkZHJfaGlnaF9zdGFydF9iaXQ7 DQo+ID4gKw0KPiA+ICsJZGV2YXBjX3Zpb19pbmZvX3ByaW50KGRldmFwY19jdHgpOw0KPiA+ICt9 DQo+ID4gKw0KPiA+ICsvKg0KPiA+ICsgKiBtdGtfZGV2YXBjX2R1bXBfdmlvX2RiZyAtIHNoaWZ0 ICYgZHVtcCB0aGUgdmlvbGF0aW9uIGRlYnVnIGluZm9ybWF0aW9uLg0KPiA+ICsgKi8NCj4gPiAr c3RhdGljIGJvb2wgbXRrX2RldmFwY19kdW1wX3Zpb19kYmcoc3RydWN0IG10a19kZXZhcGNfY29u dGV4dCAqZGV2YXBjX2N0eCwNCj4gPiArCQkJCSAgICBpbnQgc2xhdmVfdHlwZSwgaW50ICp2aW9f aWR4LCBpbnQgKmluZGV4KQ0KPiA+ICt7DQo+ID4gKwljb25zdCBzdHJ1Y3QgbXRrX2RldmljZV9p bmZvICoqZGV2aWNlX2luZm87DQo+ID4gKwljb25zdCBzdHJ1Y3QgbXRrX2RldmljZV9udW0gKm5k ZXZpY2VzOw0KPiA+ICsJdm9pZCBfX2lvbWVtICpwZF92aW9fc2hpZnRfc3RhX3JlZzsNCj4gPiAr CXUzMiBzaGlmdF9iaXQ7DQo+ID4gKwlpbnQgaTsNCj4gPiArDQo+ID4gKwlpZiAoIXZpb19pZHgp DQo+ID4gKwkJcmV0dXJuIE5VTEw7DQo+ID4gKw0KPiA+ICsJZGV2aWNlX2luZm8gPSBkZXZhcGNf Y3R4LT5zb2MtPmRldmljZV9pbmZvOw0KPiA+ICsJbmRldmljZXMgPSBkZXZhcGNfY3R4LT5zb2Mt Pm5kZXZpY2VzOw0KPiA+ICsNCj4gPiArCXBkX3Zpb19zaGlmdF9zdGFfcmVnID0gbXRrX2RldmFw Y19wZF9nZXQoZGV2YXBjX2N0eCwgc2xhdmVfdHlwZSwNCj4gPiArCQkJCQkJIFZJT19TSElGVF9T VEEsIDApOw0KPiA+ICsNCj4gPiArCWZvciAoaSA9IDA7IGkgPCBuZGV2aWNlc1tzbGF2ZV90eXBl XS52aW9fc2xhdmVfbnVtOyBpKyspIHsNCj4gPiArCQkqdmlvX2lkeCA9IGRldmljZV9pbmZvW3Ns YXZlX3R5cGVdW2ldLnZpb19pbmRleDsNCj4gPiArDQo+ID4gKwkJaWYgKGNoZWNrX3Zpb19tYXNr KGRldmFwY19jdHgsIHNsYXZlX3R5cGUsICp2aW9faWR4KSkNCj4gPiArCQkJY29udGludWU7DQo+ ID4gKw0KPiA+ICsJCWlmIChjaGVja192aW9fc3RhdHVzKGRldmFwY19jdHgsIHNsYXZlX3R5cGUs ICp2aW9faWR4KSAhPQ0KPiA+ICsJCQkJVklPTEFUSU9OX1RSSUdHRVJFRCkNCj4gPiArCQkJY29u dGludWU7DQo+ID4gKw0KPiA+ICsJCXNoaWZ0X2JpdCA9IGRldmFwY19jdHgtPnNvYy0+c2hpZnRf Z3JvdXBfZ2V0KHNsYXZlX3R5cGUsDQo+ID4gKwkJCQkJCQkgICAgICp2aW9faWR4KTsNCj4gPiAr DQo+ID4gKwkJbXRrX2RldmFwY192aW9fY2hlY2soZGV2YXBjX2N0eCwgc2xhdmVfdHlwZSwgJnNo aWZ0X2JpdCk7DQo+ID4gKw0KPiA+ICsJCWlmICghc3luY192aW9fZGJnKGRldmFwY19jdHgsIHNs YXZlX3R5cGUsIHNoaWZ0X2JpdCkpDQo+ID4gKwkJCWNvbnRpbnVlOw0KPiA+ICsNCj4gPiArCQlk ZXZhcGNfZXh0cmFjdF92aW9fZGJnKGRldmFwY19jdHgsIHNsYXZlX3R5cGUpOw0KPiA+ICsJCSpp bmRleCA9IGk7DQo+ID4gKw0KPiA+ICsJCXJldHVybiB0cnVlOw0KPiA+ICsJfQ0KPiA+ICsNCj4g PiArCXJldHVybiBmYWxzZTsNCj4gPiArfQ0KPiA+ICsNCj4gPiArLyoNCj4gPiArICogc3RhcnRf ZGV2YXBjIC0gaW5pdGlhbGl6ZSBkZXZhcGMgc3RhdHVzIGFuZCBzdGFydCByZWNlaXZpbmcgaW50 ZXJydXB0DQo+ID4gKyAqCQkgIHdoaWxlIGRldmFwYyB2aW9sYXRpb24gaXMgdHJpZ2dlcmVkLg0K PiA+ICsgKi8NCj4gPiArc3RhdGljIHZvaWQgc3RhcnRfZGV2YXBjKHN0cnVjdCBtdGtfZGV2YXBj X2NvbnRleHQgKmRldmFwY19jdHgpDQo+ID4gK3sNCj4gPiArCXUzMiBzbGF2ZV90eXBlX251bSA9 IGRldmFwY19jdHgtPnNvYy0+c2xhdmVfdHlwZV9udW07DQo+ID4gKwljb25zdCBzdHJ1Y3QgbXRr X2RldmljZV9pbmZvICoqZGV2aWNlX2luZm87DQo+ID4gKwljb25zdCBzdHJ1Y3QgbXRrX2Rldmlj ZV9udW0gKm5kZXZpY2VzOw0KPiA+ICsJdm9pZCBfX2lvbWVtICpwZF92aW9fc2hpZnRfc3RhX3Jl ZzsNCj4gPiArCXZvaWQgX19pb21lbSAqcGRfYXBjX2Nvbl9yZWc7DQo+ID4gKwlpbnQgc2xhdmVf dHlwZSwgaSwgdmlvX2lkeCwgaW5kZXg7DQo+ID4gKwl1MzIgdmlvX3NoaWZ0X3N0YTsNCj4gPiAr DQo+ID4gKwluZGV2aWNlcyA9IGRldmFwY19jdHgtPnNvYy0+bmRldmljZXM7DQo+ID4gKw0KPiA+ ICsJZGV2aWNlX2luZm8gPSBkZXZhcGNfY3R4LT5zb2MtPmRldmljZV9pbmZvOw0KPiA+ICsNCj4g PiArCWZvciAoc2xhdmVfdHlwZSA9IDA7IHNsYXZlX3R5cGUgPCBzbGF2ZV90eXBlX251bTsgc2xh dmVfdHlwZSsrKSB7DQo+ID4gKwkJcGRfYXBjX2Nvbl9yZWcgPSBtdGtfZGV2YXBjX3BkX2dldChk ZXZhcGNfY3R4LCBzbGF2ZV90eXBlLA0KPiA+ICsJCQkJCQkgICBBUENfQ09OLCAwKTsNCj4gPiAr CQlwZF92aW9fc2hpZnRfc3RhX3JlZyA9IG10a19kZXZhcGNfcGRfZ2V0KGRldmFwY19jdHgsIHNs YXZlX3R5cGUsDQo+ID4gKwkJCQkJCQkgVklPX1NISUZUX1NUQSwgMCk7DQo+ID4gKw0KPiA+ICsJ CWlmICghcGRfYXBjX2Nvbl9yZWcgfHwgIXBkX3Zpb19zaGlmdF9zdGFfcmVnIHx8ICFkZXZpY2Vf aW5mbykNCj4gPiArCQkJcmV0dXJuOw0KPiA+ICsNCj4gPiArCQkvKiBDbGVhciBERVZBUEMgdmlv bGF0aW9uIHN0YXR1cyAqLw0KPiA+ICsJCXdyaXRlbChCSVQoMzEpLCBwZF9hcGNfY29uX3JlZyk7 DQo+ID4gKw0KPiA+ICsJCS8qIENsZWFyIHZpb2xhdGlvbiBzaGlmdCBzdGF0dXMgKi8NCj4gPiAr CQl2aW9fc2hpZnRfc3RhID0gcmVhZGwocGRfdmlvX3NoaWZ0X3N0YV9yZWcpOw0KPiA+ICsJCWlm ICh2aW9fc2hpZnRfc3RhKQ0KPiA+ICsJCQl3cml0ZWwodmlvX3NoaWZ0X3N0YSwgcGRfdmlvX3No aWZ0X3N0YV9yZWcpOw0KPiA+ICsNCj4gPiArCQkvKiBDbGVhciB0eXBlIDIgdmlvbGF0aW9uIHN0 YXR1cyAqLw0KPiA+ICsJCWNoZWNrX3R5cGUyX3Zpb19zdGF0dXMoZGV2YXBjX2N0eCwgc2xhdmVf dHlwZSwgJnZpb19pZHgsICZpKTsNCj4gPiArDQo+ID4gKwkJLyogQ2xlYXIgdmlvbGF0aW9uIHN0 YXR1cyAqLw0KPiA+ICsJCWZvciAoaSA9IDA7IGkgPCBuZGV2aWNlc1tzbGF2ZV90eXBlXS52aW9f c2xhdmVfbnVtOyBpKyspIHsNCj4gPiArCQkJdmlvX2lkeCA9IGRldmljZV9pbmZvW3NsYXZlX3R5 cGVdW2ldLnZpb19pbmRleDsNCj4gPiArCQkJaWYgKChjaGVja192aW9fc3RhdHVzKGRldmFwY19j dHgsIHNsYXZlX3R5cGUsIHZpb19pZHgpDQo+ID4gKwkJCQkJICAgICAgPT0gVklPTEFUSU9OX1RS SUdHRVJFRCkgJiYNCj4gPiArCQkJICAgICBjbGVhcl92aW9fc3RhdHVzKGRldmFwY19jdHgsIHNs YXZlX3R5cGUsDQo+ID4gKwkJCQkJICAgICAgdmlvX2lkeCkpIHsNCj4gPiArCQkJCXByX3dhcm4o UEZYICJDbGVhciB2aW8gc3RhdHVzIGZhaWxlZCwgc2xhdmVfdHlwZToweCV4LCB2aW9faW5kZXg6 MHgleFxuIiwNCj4gPiArCQkJCQlzbGF2ZV90eXBlLCB2aW9faWR4KTsNCj4gPiArDQo+ID4gKwkJ CQlpbmRleCA9IGk7DQo+ID4gKwkJCQltdGtfZGV2YXBjX2R1bXBfdmlvX2RiZyhkZXZhcGNfY3R4 LCBzbGF2ZV90eXBlLA0KPiA+ICsJCQkJCQkJJnZpb19pZHgsICZpbmRleCk7DQo+ID4gKwkJCQlp ID0gaW5kZXggLSAxOw0KPiA+ICsJCQl9DQo+ID4gKw0KPiA+ICsJCQltYXNrX21vZHVsZV9pcnEo ZGV2YXBjX2N0eCwgc2xhdmVfdHlwZSwgdmlvX2lkeCwgZmFsc2UpOw0KPiA+ICsJCX0NCj4gPiAr CX0NCj4gPiArfQ0KPiA+ICsNCj4gPiArc3RhdGljIERFRklORV9TUElOTE9DSyhkZXZhcGNfbG9j ayk7DQo+ID4gKw0KPiA+ICsvKg0KPiA+ICsgKiBkZXZhcGNfdmlvbGF0aW9uX2lycSAtIHRoZSBk ZXZhcGMgSW50ZXJydXB0IFNlcnZpY2UgUm91dGluZSAoSVNSKSB3aWxsIGR1bXANCj4gPiArICoJ CQkgIHZpb2xhdGlvbiBpbmZvcm1hdGlvbiBpbmNsdWRpbmcgd2hpY2ggbWFzdGVyIHZpb2xhdGVz DQo+ID4gKyAqCQkJICBhY2Nlc3Mgc2xhdmUuDQo+ID4gKyAqLw0KPiA+ICtzdGF0aWMgaXJxcmV0 dXJuX3QgZGV2YXBjX3Zpb2xhdGlvbl9pcnEoaW50IGlycV9udW1iZXIsDQo+ID4gKwkJCQkJc3Ry dWN0IG10a19kZXZhcGNfY29udGV4dCAqZGV2YXBjX2N0eCkNCj4gPiArew0KPiA+ICsJdTMyIHNs YXZlX3R5cGVfbnVtID0gZGV2YXBjX2N0eC0+c29jLT5zbGF2ZV90eXBlX251bTsNCj4gPiArCWNv bnN0IHN0cnVjdCBtdGtfZGV2aWNlX2luZm8gKipkZXZpY2VfaW5mbzsNCj4gPiArCXN0cnVjdCBt dGtfZGV2YXBjX3Zpb19pbmZvICp2aW9faW5mbzsNCj4gPiArCWludCBzbGF2ZV90eXBlLCB2aW9f aWR4LCBpbmRleDsNCj4gPiArCWNvbnN0IGNoYXIgKnZpb19tYXN0ZXI7DQo+ID4gKwl1bnNpZ25l ZCBsb25nIGZsYWdzOw0KPiA+ICsJdTggcGVybTsNCj4gPiArDQo+ID4gKwlzcGluX2xvY2tfaXJx c2F2ZSgmZGV2YXBjX2xvY2ssIGZsYWdzKTsNCj4gPiArDQo+ID4gKwlkZXZpY2VfaW5mbyA9IGRl dmFwY19jdHgtPnNvYy0+ZGV2aWNlX2luZm87DQo+ID4gKwl2aW9faW5mbyA9IGRldmFwY19jdHgt PnNvYy0+dmlvX2luZm87DQo+ID4gKwl2aW9faWR4ID0gLTE7DQo+ID4gKwlpbmRleCA9IC0xOw0K PiA+ICsNCj4gPiArCS8qIFRoZXJlIGFyZSBtdWx0aXBsZSBERVZBUENfUEQgKi8NCj4gPiArCWZv ciAoc2xhdmVfdHlwZSA9IDA7IHNsYXZlX3R5cGUgPCBzbGF2ZV90eXBlX251bTsgc2xhdmVfdHlw ZSsrKSB7DQo+ID4gKwkJaWYgKCFjaGVja190eXBlMl92aW9fc3RhdHVzKGRldmFwY19jdHgsIHNs YXZlX3R5cGUsICZ2aW9faWR4LA0KPiA+ICsJCQkJCSAgICAmaW5kZXgpKQ0KPiA+ICsJCQlpZiAo IW10a19kZXZhcGNfZHVtcF92aW9fZGJnKGRldmFwY19jdHgsIHNsYXZlX3R5cGUsDQo+ID4gKwkJ CQkJCSAgICAgJnZpb19pZHgsICZpbmRleCkpDQo+ID4gKwkJCQljb250aW51ZTsNCj4gPiArDQo+ ID4gKwkJLyogRW5zdXJlIHRoYXQgdmlvbGF0aW9uIGluZm8gYXJlIHdyaXR0ZW4gYmVmb3JlDQo+ ID4gKwkJICogZnVydGhlciBvcGVyYXRpb25zDQo+ID4gKwkJICovDQo+ID4gKwkJc21wX21iKCk7 DQo+ID4gKw0KPiA+ICsJCW1hc2tfbW9kdWxlX2lycShkZXZhcGNfY3R4LCBzbGF2ZV90eXBlLCB2 aW9faWR4LCB0cnVlKTsNCj4gPiArDQo+ID4gKwkJY2xlYXJfdmlvX3N0YXR1cyhkZXZhcGNfY3R4 LCBzbGF2ZV90eXBlLCB2aW9faWR4KTsNCj4gPiArDQo+ID4gKwkJcGVybSA9IGdldF9wZXJtaXNz aW9uKGRldmFwY19jdHgsIHNsYXZlX3R5cGUsIGluZGV4LA0KPiA+ICsJCQkJICAgICAgdmlvX2lu Zm8tPmRvbWFpbl9pZCk7DQo+ID4gKw0KPiA+ICsJCXZpb19tYXN0ZXIgPSBkZXZhcGNfY3R4LT5z b2MtPm1hc3Rlcl9nZXQNCj4gPiArCQkJKHZpb19pbmZvLT5tYXN0ZXJfaWQsDQo+ID4gKwkJCSB2 aW9faW5mby0+dmlvX2FkZHIsDQo+ID4gKwkJCSBzbGF2ZV90eXBlLA0KPiA+ICsJCQkgdmlvX2lu Zm8tPnNoaWZ0X3N0YV9iaXQsDQo+ID4gKwkJCSB2aW9faW5mby0+ZG9tYWluX2lkKTsNCj4gPiAr DQo+ID4gKwkJaWYgKCF2aW9fbWFzdGVyKQ0KPiA+ICsJCQl2aW9fbWFzdGVyID0gIlVOS05PV05f TUFTVEVSIjsNCj4gPiArDQo+ID4gKwkJcHJfaW5mbyhQRlggIlZpb2xhdGlvbiAtIHNsYXZlX3R5 cGU6MHgleCwgc3lzX2luZGV4OjB4JXgsIGN0cmxfaW5kZXg6MHgleCwgdmlvX2luZGV4OjB4JXhc biIsDQo+ID4gKwkJCXNsYXZlX3R5cGUsDQo+ID4gKwkJCWRldmljZV9pbmZvW3NsYXZlX3R5cGVd W2luZGV4XS5zeXNfaW5kZXgsDQo+ID4gKwkJCWRldmljZV9pbmZvW3NsYXZlX3R5cGVdW2luZGV4 XS5jdHJsX2luZGV4LA0KPiA+ICsJCQlkZXZpY2VfaW5mb1tzbGF2ZV90eXBlXVtpbmRleF0udmlv X2luZGV4KTsNCj4gPiArDQo+ID4gKwkJcHJfaW5mbyhQRlggIlZpb2xhdGlvbiBNYXN0ZXI6ICVz XG4iLCB2aW9fbWFzdGVyKTsNCj4gPiArDQo+ID4gKwkJZGV2YXBjX3Zpb19yZWFzb24ocGVybSk7 DQo+ID4gKw0KPiA+ICsJCW1hc2tfbW9kdWxlX2lycShkZXZhcGNfY3R4LCBzbGF2ZV90eXBlLCB2 aW9faWR4LCBmYWxzZSk7DQo+ID4gKwl9DQo+ID4gKw0KPiA+ICsJc3Bpbl91bmxvY2tfaXJxcmVz dG9yZSgmZGV2YXBjX2xvY2ssIGZsYWdzKTsNCj4gPiArCXJldHVybiBJUlFfSEFORExFRDsNCj4g PiArfQ0KPiA+ICsNCj4gPiAraW50IG10a19kZXZhcGNfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2Rl dmljZSAqcGRldiwgc3RydWN0IG10a19kZXZhcGNfc29jICpzb2MpDQo+ID4gK3sNCj4gPiArCXN0 cnVjdCBkZXZpY2Vfbm9kZSAqbm9kZSA9IHBkZXYtPmRldi5vZl9ub2RlOw0KPiA+ICsJc3RydWN0 IG10a19kZXZhcGNfY29udGV4dCAqZGV2YXBjX2N0eDsNCj4gPiArCXUzMiBzbGF2ZV90eXBlX251 bTsNCj4gPiArCWludCBzbGF2ZV90eXBlOw0KPiA+ICsJaW50IHJldDsNCj4gPiArDQo+ID4gKwlp ZiAoSVNfRVJSKG5vZGUpKQ0KPiA+ICsJCXJldHVybiAtRU5PREVWOw0KPiA+ICsNCj4gPiArCWRl dmFwY19jdHggPSBkZXZtX2t6YWxsb2MoJnBkZXYtPmRldiwgc2l6ZW9mKHN0cnVjdCBtdGtfZGV2 YXBjX2NvbnRleHQpLA0KPiA+ICsJCQkJICBHRlBfS0VSTkVMKTsNCj4gPiArCWlmICghZGV2YXBj X2N0eCkNCj4gPiArCQlyZXR1cm4gLUVOT01FTTsNCj4gPiArDQo+ID4gKwlkZXZhcGNfY3R4LT5z b2MgPSBzb2M7DQo+ID4gKwlzbGF2ZV90eXBlX251bSA9IGRldmFwY19jdHgtPnNvYy0+c2xhdmVf dHlwZV9udW07DQo+ID4gKw0KPiA+ICsJZm9yIChzbGF2ZV90eXBlID0gMDsgc2xhdmVfdHlwZSA8 IHNsYXZlX3R5cGVfbnVtOyBzbGF2ZV90eXBlKyspIHsNCj4gPiArCQlkZXZhcGNfY3R4LT5kZXZh cGNfcGRfYmFzZVtzbGF2ZV90eXBlXSA9DQo+ID4gKwkJCW9mX2lvbWFwKG5vZGUsIHNsYXZlX3R5 cGUpOw0KPiA+ICsJCWlmICghZGV2YXBjX2N0eC0+ZGV2YXBjX3BkX2Jhc2Vbc2xhdmVfdHlwZV0p DQo+ID4gKwkJCXJldHVybiAtRUlOVkFMOw0KPiA+ICsJfQ0KPiA+ICsNCj4gPiArCWRldmFwY19j dHgtPmluZnJhY2ZnX2Jhc2UgPSBvZl9pb21hcChub2RlLCBzbGF2ZV90eXBlX251bSArIDEpOw0K PiA+ICsJaWYgKCFkZXZhcGNfY3R4LT5pbmZyYWNmZ19iYXNlKQ0KPiA+ICsJCXJldHVybiAtRUlO VkFMOw0KPiA+ICsNCj4gPiArCWRldmFwY19jdHgtPmRldmFwY19pcnEgPSBpcnFfb2ZfcGFyc2Vf YW5kX21hcChub2RlLCAwKTsNCj4gPiArCWlmICghZGV2YXBjX2N0eC0+ZGV2YXBjX2lycSkNCj4g PiArCQlyZXR1cm4gLUVJTlZBTDsNCj4gPiArDQo+ID4gKwkvKiBDQ0YgKENvbW1vbiBDbG9jayBG cmFtZXdvcmspICovDQo+ID4gKwlkZXZhcGNfY3R4LT5kZXZhcGNfaW5mcmFfY2xrID0gZGV2bV9j bGtfZ2V0KCZwZGV2LT5kZXYsDQo+ID4gKwkJCQkJCSAgICAiZGV2YXBjLWluZnJhLWNsb2NrIik7 DQo+ID4gKw0KPiA+ICsJaWYgKElTX0VSUihkZXZhcGNfY3R4LT5kZXZhcGNfaW5mcmFfY2xrKSkN Cj4gPiArCQlyZXR1cm4gLUVJTlZBTDsNCj4gPiArDQo+ID4gKwlpZiAoY2xrX3ByZXBhcmVfZW5h YmxlKGRldmFwY19jdHgtPmRldmFwY19pbmZyYV9jbGspKQ0KPiA+ICsJCXJldHVybiAtRUlOVkFM Ow0KPiA+ICsNCj4gPiArCXN0YXJ0X2RldmFwYyhkZXZhcGNfY3R4KTsNCj4gPiArDQo+ID4gKwly ZXQgPSBkZXZtX3JlcXVlc3RfaXJxKCZwZGV2LT5kZXYsIGRldmFwY19jdHgtPmRldmFwY19pcnEs DQo+ID4gKwkJCSAgICAgICAoaXJxX2hhbmRsZXJfdClkZXZhcGNfdmlvbGF0aW9uX2lycSwNCj4g PiArCQkJICAgICAgIElSUUZfVFJJR0dFUl9OT05FLCAiZGV2YXBjIiwgZGV2YXBjX2N0eCk7DQo+ ID4gKwlpZiAocmV0KQ0KPiA+ICsJCXJldHVybiByZXQ7DQo+ID4gKw0KPiA+ICsJcmV0dXJuIDA7 DQo+ID4gK30NCj4gPiArDQo+ID4gK2ludCBtdGtfZGV2YXBjX3JlbW92ZShzdHJ1Y3QgcGxhdGZv cm1fZGV2aWNlICpkZXYpDQo+ID4gK3sNCj4gPiArCXJldHVybiAwOw0KPiA+ICt9DQo+ID4gKw0K PiA+ICtNT0RVTEVfREVTQ1JJUFRJT04oIk1lZGlhdGVrIERldmljZSBBUEMgRHJpdmVyIik7DQo+ ID4gK01PRFVMRV9BVVRIT1IoIk5lYWwgTGl1IDxuZWFsLmxpdUBtZWRpYXRlay5jb20+Iik7DQo+ ID4gK01PRFVMRV9MSUNFTlNFKCJHUEwiKTsNCj4gPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9zb2Mv bWVkaWF0ZWsvZGV2YXBjL2RldmFwYy1tdGstbXVsdGktYW8uaCBiL2RyaXZlcnMvc29jL21lZGlh dGVrL2RldmFwYy9kZXZhcGMtbXRrLW11bHRpLWFvLmgNCj4gPiBuZXcgZmlsZSBtb2RlIDEwMDY0 NA0KPiA+IGluZGV4IDAwMDAwMDAuLjFlNThhM2UNCj4gPiAtLS0gL2Rldi9udWxsDQo+ID4gKysr IGIvZHJpdmVycy9zb2MvbWVkaWF0ZWsvZGV2YXBjL2RldmFwYy1tdGstbXVsdGktYW8uaA0KPiA+ IEBAIC0wLDAgKzEsMTgyIEBADQo+ID4gKy8qIFNQRFgtTGljZW5zZS1JZGVudGlmaWVyOiBHUEwt Mi4wICovDQo+ID4gKy8qDQo+ID4gKyAqIENvcHlyaWdodCAoQykgMjAyMCBNZWRpYVRlayBJbmMu DQo+ID4gKyAqLw0KPiA+ICsNCj4gPiArI2lmbmRlZiBfX0RFVkFQQ19NVEtfTVVMVElfQU9fSF9f DQo+ID4gKyNkZWZpbmUgX19ERVZBUENfTVRLX01VTFRJX0FPX0hfXw0KPiA+ICsNCj4gPiArI2lu Y2x1ZGUgPGxpbnV4L3BsYXRmb3JtX2RldmljZS5oPg0KPiA+ICsjaW5jbHVkZSA8bGludXgvdHlw ZXMuaD4NCj4gPiArDQo+ID4gKy8qKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioNCj4gPiArICogVkFSSUFC TEUgREVGSU5BVElPTg0KPiA+ICsgKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqLw0KPiA+ICsjZGVmaW5l IE1PRF9OT19JTl8xX0RFVkFQQwkxNg0KPiA+ICsjZGVmaW5lIFZJT0xBVElPTl9UUklHR0VSRUQJ MQ0KPiA+ICsjZGVmaW5lIFZJT0xBVElPTl9NQVNLRUQJMQ0KPiA+ICsjZGVmaW5lIERFQUQJCQkw eGRlYWRiZWFmDQo+ID4gKyNkZWZpbmUgUEZYCQkJIltERVZBUENdOiAiDQo+ID4gKyNkZWZpbmUg U0xBVkVfVFlQRV9OVU1fTUFYCTUNCj4gPiArDQo+ID4gKyNkZWZpbmUgZGV2YXBjX2xvZyhwLCBz LCBmbXQsIGFyZ3MuLi4pIFwNCj4gPiArCWRvIHsgXA0KPiA+ICsJCXR5cGVvZihwKSAoX3ApID0g KHApOyBcDQo+ID4gKwkJKChfcCkgKz0gc2NucHJpbnRmKF9wLCBzaXplb2YocykgLSBzdHJsZW4o cyksIGZtdCwgIyNhcmdzKSk7IFwNCj4gPiArCX0gd2hpbGUgKDApDQo+ID4gKw0KPiA+ICsjZGVm aW5lIFVOVVNFRCh4KQkJKHZvaWQpKHgpDQo+ID4gKw0KPiA+ICsvKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqDQo+ID4gKyAqIERBVEEgU1RSVUNUVVJFICYgRlVOQ1RJT04gREVGSU5BVElPTg0KPiA+ICsg KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqLw0KPiA+ICtlbnVtIERFVkFQQ19QRF9SRUdfVFlQRSB7DQo+ ID4gKwlWSU9fTUFTSyA9IDAsDQo+ID4gKwlWSU9fU1RBLA0KPiA+ICsJVklPX0RCRzAsDQo+ID4g KwlWSU9fREJHMSwNCj4gPiArCVZJT19EQkcyLA0KPiA+ICsJQVBDX0NPTiwNCj4gPiArCVZJT19T SElGVF9TVEEsDQo+ID4gKwlWSU9fU0hJRlRfU0VMLA0KPiA+ICsJVklPX1NISUZUX0NPTiwNCj4g PiArCVBEX1JFR19UWVBFX05VTSwNCj4gPiArfTsNCj4gPiArDQo+ID4gK2VudW0gREVWQVBDX1VU X0NNRCB7DQo+ID4gKwlERVZBUENfVVRfREFQQ19WSU8gPSAxLA0KPiA+ICsJREVWQVBDX1VUX1NS QU1fVklPLA0KPiA+ICt9Ow0KPiA+ICsNCj4gPiArZW51bSBERVZBUENfRE9NX0lEIHsNCj4gPiAr CURPTUFJTl8wID0gMCwNCj4gPiArCURPTUFJTl8xLA0KPiA+ICsJRE9NQUlOXzIsDQo+ID4gKwlE T01BSU5fMywNCj4gPiArCURPTUFJTl80LA0KPiA+ICsJRE9NQUlOXzUsDQo+ID4gKwlET01BSU5f NiwNCj4gPiArCURPTUFJTl83LA0KPiA+ICsJRE9NQUlOXzgsDQo+ID4gKwlET01BSU5fOSwNCj4g PiArCURPTUFJTl8xMCwNCj4gPiArCURPTUFJTl8xMSwNCj4gPiArCURPTUFJTl8xMiwNCj4gPiAr CURPTUFJTl8xMywNCj4gPiArCURPTUFJTl8xNCwNCj4gPiArCURPTUFJTl8xNSwNCj4gPiArCURP TUFJTl9PVEhFUlMsDQo+ID4gK307DQo+ID4gKw0KPiA+ICtlbnVtIFNSQU1ST01fVklPIHsNCj4g PiArCVJPTV9WSU9MQVRJT04gPSAwLA0KPiA+ICsJU1JBTV9WSU9MQVRJT04sDQo+ID4gK307DQo+ ID4gKw0KPiA+ICtlbnVtIERFVkFQQ19QRVJNX1RZUEUgew0KPiA+ICsJTk9fUFJPVEVDVElPTiA9 IDAsDQo+ID4gKwlTRUNfUldfT05MWSwNCj4gPiArCVNFQ19SV19OU19SLA0KPiA+ICsJRk9SQklE REVOLA0KPiA+ICsJUEVSTV9UWVBFX05VTSwNCj4gPiArfTsNCj4gPiArDQo+ID4gK3N0cnVjdCBt dGtfZGV2YXBjX2RiZ19zdGF0dXMgew0KPiA+ICsJYm9vbCBlbmFibGVfdXQ7DQo+ID4gKwlib29s IGVuYWJsZV9kYXBjOyAvKiBkdW1wIEFQQyAqLw0KPiA+ICt9Ow0KPiA+ICsNCj4gPiArc3RydWN0 IG10a19kZXZpY2VfaW5mbyB7DQo+ID4gKwlpbnQgc3lzX2luZGV4Ow0KPiA+ICsJaW50IGN0cmxf aW5kZXg7DQo+ID4gKwlpbnQgdmlvX2luZGV4Ow0KPiA+ICt9Ow0KPiA+ICsNCj4gPiArc3RydWN0 IG10a19kZXZpY2VfbnVtIHsNCj4gPiArCWludCBzbGF2ZV90eXBlOw0KPiA+ICsJdTMyIHZpb19z bGF2ZV9udW07DQo+ID4gK307DQo+ID4gKw0KPiA+ICtzdHJ1Y3QgbXRrX2RldmFwY192aW9faW5m byB7DQo+ID4gKwlib29sIHJlYWQ7DQo+ID4gKwlib29sIHdyaXRlOw0KPiA+ICsJdTMyIHZpb19h ZGRyOw0KPiA+ICsJdTMyIHZpb19hZGRyX2hpZ2g7DQo+ID4gKwl1MzIgbWFzdGVyX2lkOw0KPiA+ ICsJdTMyIGRvbWFpbl9pZDsNCj4gPiArCWludCAqdmlvX21hc2tfc3RhX251bTsNCj4gPiArCWlu dCBzcmFtcm9tX3Nsdl90eXBlOw0KPiA+ICsJaW50IHNyYW1yb21fdmlvX2lkeDsNCj4gPiArCWlu dCBtbTJuZF9zbHZfdHlwZTsNCj4gPiArCWludCBtZHBfdmlvX2lkeDsNCj4gPiArCWludCBkaXNw Ml92aW9faWR4Ow0KPiA+ICsJaW50IG1tc3lzX3Zpb19pZHg7DQo+ID4gKwlpbnQgc2hpZnRfc3Rh X2JpdDsNCj4gPiArfTsNCj4gPiArDQo+ID4gK3N0cnVjdCBtdGtfaW5mcmFfdmlvX2RiZ19kZXNj IHsNCj4gPiArCXUzMiB2aW9fZGJnX21zdGlkOw0KPiA+ICsJdTggdmlvX2RiZ19tc3RpZF9zdGFy dF9iaXQ7DQo+ID4gKwl1MzIgdmlvX2RiZ19kbW5pZDsNCj4gPiArCXU4IHZpb19kYmdfZG1uaWRf c3RhcnRfYml0Ow0KPiA+ICsJdTMyIHZpb19kYmdfd192aW87DQo+ID4gKwl1OCB2aW9fZGJnX3df dmlvX3N0YXJ0X2JpdDsNCj4gPiArCXUzMiB2aW9fZGJnX3JfdmlvOw0KPiA+ICsJdTggdmlvX2Ri Z19yX3Zpb19zdGFydF9iaXQ7DQo+ID4gKwl1MzIgdmlvX2FkZHJfaGlnaDsNCj4gPiArCXU4IHZp b19hZGRyX2hpZ2hfc3RhcnRfYml0Ow0KPiA+ICt9Ow0KPiA+ICsNCj4gPiArc3RydWN0IG10a19z cmFtcm9tX3NlY192aW9fZGVzYyB7DQo+ID4gKwl1MzIgdmlvX2lkX21hc2s7DQo+ID4gKwl1OCB2 aW9faWRfc2hpZnQ7DQo+ID4gKwl1MzIgdmlvX2RvbWFpbl9tYXNrOw0KPiA+ICsJdTggdmlvX2Rv bWFpbl9zaGlmdDsNCj4gPiArCXUzMiB2aW9fcndfbWFzazsNCj4gPiArCXU4IHZpb19yd19zaGlm dDsNCj4gPiArfTsNCj4gPiArDQo+ID4gK3N0cnVjdCBtdGtfZGV2YXBjX3BkX2Rlc2Mgew0KPiA+ ICsJdTMyIHBkX3Zpb19tYXNrX29mZnNldDsNCj4gPiArCXUzMiBwZF92aW9fc3RhX29mZnNldDsN Cj4gPiArCXUzMiBwZF92aW9fZGJnMF9vZmZzZXQ7DQo+ID4gKwl1MzIgcGRfdmlvX2RiZzFfb2Zm c2V0Ow0KPiA+ICsJdTMyIHBkX2FwY19jb25fb2Zmc2V0Ow0KPiA+ICsJdTMyIHBkX3NoaWZ0X3N0 YV9vZmZzZXQ7DQo+ID4gKwl1MzIgcGRfc2hpZnRfc2VsX29mZnNldDsNCj4gPiArCXUzMiBwZF9z aGlmdF9jb25fb2Zmc2V0Ow0KPiA+ICt9Ow0KPiA+ICsNCj4gPiArc3RydWN0IG10a19kZXZhcGNf c29jIHsNCj4gPiArCXN0cnVjdCBtdGtfZGV2YXBjX2RiZ19zdGF0dXMgKmRiZ19zdGF0Ow0KPiA+ ICsJY29uc3QgY2hhciAqIGNvbnN0ICpzbGF2ZV90eXBlX2FycjsNCj4gPiArCXUzMiBzbGF2ZV90 eXBlX251bTsNCj4gPiArCWNvbnN0IHN0cnVjdCBtdGtfZGV2aWNlX2luZm8gKmRldmljZV9pbmZv W1NMQVZFX1RZUEVfTlVNX01BWF07DQo+ID4gKwljb25zdCBzdHJ1Y3QgbXRrX2RldmljZV9udW0g Km5kZXZpY2VzOw0KPiA+ICsJc3RydWN0IG10a19kZXZhcGNfdmlvX2luZm8gKnZpb19pbmZvOw0K PiA+ICsJY29uc3Qgc3RydWN0IG10a19pbmZyYV92aW9fZGJnX2Rlc2MgKnZpb19kYmdzOw0KPiA+ ICsJY29uc3Qgc3RydWN0IG10a19zcmFtcm9tX3NlY192aW9fZGVzYyAqc3JhbXJvbV9zZWNfdmlv czsNCj4gPiArCWNvbnN0IHUzMiAqZGV2YXBjX3BkczsNCj4gPiArDQo+ID4gKwkvKiBwbGF0Zm9y bSBzcGVjaWZpYyBvcGVyYXRpb25zICovDQo+ID4gKwljb25zdCBjaGFyKiAoKm1hc3Rlcl9nZXQp KHUzMiBidXNfaWQsIHUzMiB2aW9fYWRkciwNCj4gPiArCQkJCSAgaW50IHNsYXZlX3R5cGUsIGlu dCBzaGlmdF9zdGFfYml0LA0KPiA+ICsJCQkJICBpbnQgZG9tYWluKTsNCj4gPiArCXZvaWQgKCpt bTJuZF92aW9faGFuZGxlcikodm9pZCBfX2lvbWVtICppbmZyYWNmZywNCj4gPiArCQkJCSAgc3Ry dWN0IG10a19kZXZhcGNfdmlvX2luZm8gKnZpb19pbmZvLA0KPiA+ICsJCQkJICBib29sIG1kcF92 aW8sIGJvb2wgZGlzcDJfdmlvLCBib29sIG1tc3lzX3Zpbyk7DQo+ID4gKwl1MzIgKCpzaGlmdF9n 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(musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1662191522; Wed, 24 Jun 2020 00:07:59 -0800 Received: from MTKMBS01N2.mediatek.inc (172.21.101.79) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 24 Jun 2020 01:08:00 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 24 Jun 2020 16:07:58 +0800 Received: from [172.21.77.33] (172.21.77.33) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 24 Jun 2020 16:07:58 +0800 Message-ID: <1592986080.14160.11.camel@mtkswgap22> Subject: Re: [PATCH v2 2/2] soc: mediatek: devapc: add devapc-mt6873 driver From: Neal Liu To: Matthias Brugger Date: Wed, 24 Jun 2020 16:08:00 +0800 In-Reply-To: <0c8a88a5-3caa-b121-87ee-3396d204fb1b@gmail.com> References: <1592559720-8482-1-git-send-email-neal.liu@mediatek.com> <1592559720-8482-3-git-send-email-neal.liu@mediatek.com> <0c8a88a5-3caa-b121-87ee-3396d204fb1b@gmail.com> X-Mailer: Evolution 3.2.3-0ubuntu6 MIME-Version: 1.0 X-TM-SNTS-SMTP: 95BCE145C111093D0D4FF93E0CD196F31928225984C736B56976269825C62F702000:8 X-MTK: N X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, wsd_upstream@mediatek.com, linux-kernel@vger.kernel.org, Rob Herring , linux-mediatek@lists.infradead.org, Neal Liu , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org On Mon, 2020-06-22 at 12:05 +0200, Matthias Brugger wrote: > > On 19/06/2020 11:42, Neal Liu wrote: > > MT6873 bus frabric provides TrustZone security support and data > > protection to prevent slaves from being accessed by unexpected > > masters. > > The security violations are logged and sent to the processor for > > further analysis or countermeasures. > > > > Any occurrence of security violation would raise an interrupt, and > > it will be handled by devapc-mt6873 driver. The violation > > information is printed in order to find the murderer. > > Why don't we handle this in the TrustZone directly? There is no reason that it should be handled in TrustZone only. And it has no security issue to handle it in Normal World. > > > > > Signed-off-by: Neal Liu > > This is a really big patch and it will be difficult to review. > > Please do review the code and delete all the data structures that are not used > (I already found two). > > Please also check for code duplication (e.g. check_vio_mask and check_vio_status > are using 99% the same code). > > Please review your data structures and try to group the information in logical > structs. For example I don't understand why we need mtk_devapc_context. It seems > to me that all the values in there are SoC specific. > > Think how you could split the driver up in several commits adding more > functionality by each commit. With a good commit message it will be easier to > understand what the code does. > Thanks for your all suggestion, it's really helpful. I'll review again and try to make patches more readable. > On which SoC is the device used? I don't see any support for mt6873 in the > kernel or the mailing list. Why do we want to support this driver upstream if > it's not usable at all? > Our mt6873 upstream tasks is on going, we'll send basic platform drivers ASAP. > Try to understand how the upstream kernel device model works. It looks to me as > if all the information is hardcoded. Would it make sense to pass some of the > information via DT? Sorry for the generic question, but I hadn't had the time to > got through the whole driver to understand what it does. > > Regards, > Matthias > > > --- > > drivers/soc/mediatek/Kconfig | 6 + > > drivers/soc/mediatek/Makefile | 1 + > > drivers/soc/mediatek/devapc/Kconfig | 25 + > > drivers/soc/mediatek/devapc/Makefile | 13 + > > drivers/soc/mediatek/devapc/devapc-mt6873.c | 1652 +++++++++++++++++++++ > > drivers/soc/mediatek/devapc/devapc-mt6873.h | 111 ++ > > drivers/soc/mediatek/devapc/devapc-mtk-multi-ao.c | 756 ++++++++++ > > drivers/soc/mediatek/devapc/devapc-mtk-multi-ao.h | 182 +++ > > 8 files changed, 2746 insertions(+) > > create mode 100644 drivers/soc/mediatek/devapc/Kconfig > > create mode 100644 drivers/soc/mediatek/devapc/Makefile > > create mode 100644 drivers/soc/mediatek/devapc/devapc-mt6873.c > > create mode 100644 drivers/soc/mediatek/devapc/devapc-mt6873.h > > create mode 100644 drivers/soc/mediatek/devapc/devapc-mtk-multi-ao.c > > create mode 100644 drivers/soc/mediatek/devapc/devapc-mtk-multi-ao.h > > > > diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig > > index 59a56cd..2c9ad1f 100644 > > --- a/drivers/soc/mediatek/Kconfig > > +++ b/drivers/soc/mediatek/Kconfig > > @@ -51,4 +51,10 @@ config MTK_MMSYS > > Say yes here to add support for the MediaTek Multimedia > > Subsystem (MMSYS). > > > > +menu "Security" > > + > > +source "drivers/soc/mediatek/devapc/Kconfig" > > + > > +endmenu # Security > > + > > endmenu > > diff --git a/drivers/soc/mediatek/Makefile b/drivers/soc/mediatek/Makefile > > index 01f9f87..d6717a81 100644 > > --- a/drivers/soc/mediatek/Makefile > > +++ b/drivers/soc/mediatek/Makefile > > @@ -1,5 +1,6 @@ > > # SPDX-License-Identifier: GPL-2.0-only > > obj-$(CONFIG_MTK_CMDQ) += mtk-cmdq-helper.o > > +obj-$(CONFIG_MTK_DEVAPC) += devapc/ > > obj-$(CONFIG_MTK_INFRACFG) += mtk-infracfg.o > > obj-$(CONFIG_MTK_PMIC_WRAP) += mtk-pmic-wrap.o > > obj-$(CONFIG_MTK_SCPSYS) += mtk-scpsys.o > > diff --git a/drivers/soc/mediatek/devapc/Kconfig b/drivers/soc/mediatek/devapc/Kconfig > > new file mode 100644 > > index 0000000..9428360 > > --- /dev/null > > +++ b/drivers/soc/mediatek/devapc/Kconfig > > @@ -0,0 +1,25 @@ > > +config MTK_DEVAPC > > + tristate "Mediatek Device APC Support" > > + help > > + Device APC is a kernel driver controlling internal device security. > > + If someone tries to access a device, which is not allowed by the > > + device, it cannot access the device and will get a violation > > + interrupt. Device APC prevents malicious access to internal devices. > > + > > +config DEVAPC_ARCH_MULTI > > + tristate "Mediatek Device APC driver architecture multi" > > + help > > + Say yes here to enable support Mediatek > > + Device APC driver which is based on Infra > > + architecture. > > + This architecture supports multiple Infra AO. > > + > > +config DEVAPC_MT6873 > > + tristate "Mediatek MT6873 Device APC driver" > > + select MTK_DEVAPC > > + select DEVAPC_ARCH_MULTI > > + help > > + Say yes here to enable support Mediatek MT6873 > > + Device APC driver. > > + This driver is combined with DEVAPC_ARCH_MULTI for > > + common handle flow. > > diff --git a/drivers/soc/mediatek/devapc/Makefile b/drivers/soc/mediatek/devapc/Makefile > > new file mode 100644 > > index 0000000..bd471f2 > > --- /dev/null > > +++ b/drivers/soc/mediatek/devapc/Makefile > > @@ -0,0 +1,13 @@ > > +# SPDX-License-Identifier: GPL-2.0 > > + > > +ifeq ($(CONFIG_MTK_GCOV_KERNEL),y) > > +GCOV_PROFILE := y > > +endif > > + > > +obj-$(CONFIG_MTK_DEVAPC) := devapc.o > > + > > +# Core > > +devapc-$(CONFIG_DEVAPC_ARCH_MULTI) += devapc-mtk-multi-ao.o > > + > > +# Platform > > +devapc-$(CONFIG_DEVAPC_MT6873) += devapc-mt6873.o > > diff --git a/drivers/soc/mediatek/devapc/devapc-mt6873.c b/drivers/soc/mediatek/devapc/devapc-mt6873.c > > new file mode 100644 > > index 0000000..75a2140 > > --- /dev/null > > +++ b/drivers/soc/mediatek/devapc/devapc-mt6873.c > > @@ -0,0 +1,1652 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright (C) 2020 MediaTek Inc. > > + */ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > +#include "devapc-mt6873.h" > > +#include "devapc-mtk-multi-ao.h" > > + > > +static struct mtk_device_info mt6873_devices_infra[] = { > > + /* sys_idx, ctrl_idx, vio_idx */ > > + /* 0 */ > > + {0, 0, 0}, > > + {0, 1, 1}, > > + {0, 2, 2}, > > + {0, 3, 3}, > > + {0, 4, 4}, > > + {0, 5, 5}, > > + {0, 6, 6}, > > + {0, 7, 7}, > > + {0, 8, 8}, > > + {0, 9, 9}, > > + > > + /* 10 */ > > + {0, 10, 10}, > > + {0, 11, 11}, > > + {0, 12, 12}, > > + {0, 13, 13}, > > + {0, 14, 14}, > > + {0, 15, 15}, > > + {0, 16, 16}, > > + {0, 17, 17}, > > + {0, 18, 18}, > > + {0, 19, 19}, > > + > > + /* 20 */ > > + {0, 20, 20}, > > + {0, 21, 21}, > > + {0, 22, 352}, > > + {1, 0, 22}, > > + {1, 1, 23}, > > + {1, 2, 24}, > > + {1, 3, 25}, > > + {1, 4, 26}, > > + {1, 5, 27}, > > + {1, 6, 28}, > > + > > + /* 30 */ > > + {1, 7, 29}, > > + {1, 8, 30}, > > + {1, 9, 31}, > > + {1, 10, 32}, > > + {1, 11, 33}, > > + {1, 12, 34}, > > + {1, 13, 35}, > > + {1, 14, 36}, > > + {1, 15, 37}, > > + {1, 16, 38}, > > + > > + /* 40 */ > > + {1, 17, 39}, > > + {1, 18, 40}, > > + {1, 19, 41}, > > + {1, 20, 42}, > > + {1, 21, 43}, > > + {1, 22, 44}, > > + {1, 23, 45}, > > + {1, 24, 46}, > > + {1, 25, 47}, > > + {1, 26, 48}, > > + > > + /* 50 */ > > + {1, 27, 49}, > > + {1, 28, 50}, > > + {1, 29, 51}, > > + {1, 30, 52}, > > + {1, 31, 53}, > > + {1, 32, 54}, > > + {1, 33, 55}, > > + {1, 34, 56}, > > + {1, 35, 57}, > > + {1, 36, 58}, > > + > > + /* 60 */ > > + {1, 37, 59}, > > + {1, 38, 60}, > > + {1, 39, 61}, > > + {1, 40, 62}, > > + {1, 41, 63}, > > + {1, 42, 64}, > > + {1, 43, 65}, > > + {1, 44, 66}, > > + {1, 45, 67}, > > + {1, 46, 68}, > > + > > + /* 70 */ > > + {1, 47, 69}, > > + {1, 48, 70}, > > + {1, 49, 71}, > > + {1, 50, 72}, > > + {1, 51, 73}, > > + {1, 52, 74}, > > + {1, 53, 75}, > > + {1, 54, 76}, > > + {1, 55, 77}, > > + {1, 56, 78}, > > + > > + /* 80 */ > > + {1, 57, 79}, > > + {1, 58, 80}, > > + {1, 59, 81}, > > + {1, 60, 82}, > > + {1, 61, 83}, > > + {1, 62, 84}, > > + {1, 63, 85}, > > + {1, 64, 86}, > > + {1, 65, 87}, > > + {1, 66, 88}, > > + > > + /* 90 */ > > + {1, 67, 89}, > > + {1, 68, 90}, > > + {1, 69, 91}, > > + {1, 70, 92}, > > + {1, 71, 93}, > > + {1, 72, 94}, > > + {1, 73, 95}, > > + {1, 74, 96}, > > + {1, 75, 97}, > > + {1, 76, 98}, > > + > > + /* 100 */ > > + {1, 77, 99}, > > + {1, 78, 100}, > > + {1, 79, 101}, > > + {1, 80, 102}, > > + {1, 81, 103}, > > + {1, 82, 104}, > > + {1, 83, 105}, > > + {1, 84, 106}, > > + {1, 85, 107}, > > + {1, 86, 108}, > > + > > + /* 110 */ > > + {1, 87, 109}, > > + {1, 88, 110}, > > + {1, 89, 111}, > > + {1, 90, 112}, > > + {1, 91, 113}, > > + {1, 92, 114}, > > + {1, 93, 115}, > > + {1, 94, 116}, > > + {1, 95, 117}, > > + {1, 96, 118}, > > + > > + /* 120 */ > > + {1, 97, 119}, > > + {1, 98, 120}, > > + {1, 99, 121}, > > + {1, 100, 122}, > > + {1, 101, 123}, > > + {1, 102, 124}, > > + {1, 103, 125}, > > + {1, 104, 126}, > > + {1, 105, 127}, > > + {1, 106, 128}, > > + > > + /* 130 */ > > + {1, 107, 129}, > > + {1, 108, 130}, > > + {1, 109, 131}, > > + {1, 110, 132}, > > + {1, 111, 133}, > > + {1, 112, 134}, > > + {1, 113, 135}, > > + {1, 114, 136}, > > + {1, 115, 137}, > > + {1, 116, 138}, > > + > > + /* 140 */ > > + {1, 117, 139}, > > + {1, 118, 140}, > > + {1, 119, 141}, > > + {1, 120, 142}, > > + {1, 121, 143}, > > + {1, 122, 144}, > > + {1, 123, 145}, > > + {1, 124, 146}, > > + {1, 125, 147}, > > + {1, 126, 148}, > > + > > + /* 150 */ > > + {1, 127, 149}, > > + {1, 128, 150}, > > + {1, 129, 151}, > > + {1, 130, 152}, > > + {1, 131, 153}, > > + {1, 132, 154}, > > + {1, 133, 155}, > > + {1, 134, 156}, > > + {1, 135, 157}, > > + {1, 136, 158}, > > + > > + /* 160 */ > > + {1, 137, 159}, > > + {1, 138, 160}, > > + {1, 139, 161}, > > + {1, 140, 162}, > > + {1, 141, 163}, > > + {1, 142, 164}, > > + {1, 143, 165}, > > + {1, 144, 166}, > > + {1, 145, 167}, > > + {1, 146, 168}, > > + > > + /* 170 */ > > + {1, 147, 169}, > > + {1, 148, 170}, > > + {1, 149, 171}, > > + {1, 150, 172}, > > + {1, 151, 173}, > > + {1, 152, 174}, > > + {1, 153, 175}, > > + {1, 154, 176}, > > + {1, 155, 177}, > > + {1, 156, 178}, > > + > > + /* 180 */ > > + {1, 157, 179}, > > + {1, 158, 180}, > > + {1, 159, 181}, > > + {1, 160, 182}, > > + {1, 161, 183}, > > + {1, 162, 184}, > > + {1, 163, 185}, > > + {1, 164, 186}, > > + {1, 165, 187}, > > + {1, 166, 188}, > > + > > + /* 190 */ > > + {1, 167, 189}, > > + {1, 168, 190}, > > + {1, 169, 191}, > > + {1, 170, 192}, > > + {1, 171, 193}, > > + {1, 172, 194}, > > + {1, 173, 195}, > > + {1, 174, 196}, > > + {1, 175, 197}, > > + {1, 176, 198}, > > + > > + /* 200 */ > > + {1, 177, 199}, > > + {1, 178, 200}, > > + {1, 179, 201}, > > + {1, 180, 202}, > > + {1, 181, 203}, > > + {1, 182, 204}, > > + {1, 183, 205}, > > + {1, 184, 206}, > > + {1, 185, 207}, > > + {1, 186, 208}, > > + > > + /* 210 */ > > + {1, 187, 209}, > > + {1, 188, 210}, > > + {1, 189, 211}, > > + {1, 190, 212}, > > + {1, 191, 213}, > > + {1, 192, 214}, > > + {1, 193, 215}, > > + {1, 194, 216}, > > + {1, 195, 217}, > > + {1, 196, 218}, > > + > > + /* 220 */ > > + {1, 197, 219}, > > + {1, 198, 220}, > > + {1, 199, 221}, > > + {1, 200, 222}, > > + {1, 201, 223}, > > + {1, 202, 224}, > > + {1, 203, 225}, > > + {1, 204, 226}, > > + {1, 205, 227}, > > + {1, 206, 228}, > > + > > + /* 230 */ > > + {1, 207, 229}, > > + {1, 208, 230}, > > + {1, 209, 231}, > > + {1, 210, 232}, > > + {1, 211, 233}, > > + {1, 212, 234}, > > + {1, 213, 235}, > > + {1, 214, 236}, > > + {1, 215, 237}, > > + {1, 216, 238}, > > + > > + /* 240 */ > > + {1, 217, 239}, > > + {1, 218, 240}, > > + {1, 219, 241}, > > + {1, 220, 242}, > > + {1, 221, 243}, > > + {1, 222, 244}, > > + {1, 223, 245}, > > + {1, 224, 246}, > > + {1, 225, 247}, > > + {1, 226, 248}, > > + > > + /* 250 */ > > + {1, 227, 249}, > > + {1, 228, 250}, > > + {1, 229, 251}, > > + {1, 230, 252}, > > + {1, 231, 253}, > > + {1, 232, 254}, > > + {1, 233, 255}, > > + {1, 234, 256}, > > + {1, 235, 257}, > > + {1, 236, 258}, > > + > > + /* 260 */ > > + {1, 237, 259}, > > + {1, 238, 260}, > > + {1, 239, 261}, > > + {1, 240, 262}, > > + {1, 241, 263}, > > + {1, 242, 264}, > > + {1, 243, 265}, > > + {1, 244, 266}, > > + {1, 245, 267}, > > + {1, 246, 268}, > > + > > + /* 270 */ > > + {1, 247, 269}, > > + {1, 248, 270}, > > + {1, 249, 271}, > > + {1, 250, 272}, > > + {1, 251, 273}, > > + {1, 252, 274}, > > + {1, 253, 275}, > > + {1, 254, 276}, > > + {1, 255, 277}, > > + {2, 0, 278}, > > + > > + /* 280 */ > > + {2, 1, 279}, > > + {2, 2, 280}, > > + {2, 3, 281}, > > + {2, 4, 282}, > > + {2, 5, 283}, > > + {2, 6, 284}, > > + {2, 7, 285}, > > + {2, 8, 286}, > > + {2, 9, 287}, > > + {2, 10, 288}, > > + > > + /* 290 */ > > + {2, 11, 289}, > > + {2, 12, 290}, > > + {2, 13, 291}, > > + {2, 14, 292}, > > + {2, 15, 293}, > > + {2, 16, 294}, > > + {2, 17, 295}, > > + {2, 18, 296}, > > + {2, 19, 297}, > > + {2, 20, 298}, > > + > > + /* 300 */ > > + {2, 21, 299}, > > + {2, 22, 300}, > > + {2, 23, 301}, > > + {2, 24, 302}, > > + {2, 25, 303}, > > + {2, 26, 304}, > > + {2, 27, 305}, > > + {2, 28, 306}, > > + {2, 29, 307}, > > + {2, 30, 308}, > > + > > + /* 310 */ > > + {2, 31, 309}, > > + {2, 32, 310}, > > + {2, 33, 311}, > > + {2, 34, 312}, > > + {2, 35, 313}, > > + {2, 36, 314}, > > + {2, 37, 315}, > > + {2, 38, 316}, > > + {2, 39, 317}, > > + {2, 40, 318}, > > + > > + /* 320 */ > > + {2, 41, 319}, > > + {2, 42, 320}, > > + {2, 43, 321}, > > + {2, 44, 322}, > > + {2, 45, 323}, > > + {2, 46, 324}, > > + {2, 47, 325}, > > + {2, 48, 326}, > > + {2, 49, 327}, > > + {2, 50, 328}, > > + > > + /* 330 */ > > + {2, 51, 329}, > > + {2, 52, 330}, > > + {2, 53, 331}, > > + {2, 54, 332}, > > + {2, 55, 333}, > > + {2, 56, 334}, > > + {2, 57, 335}, > > + {2, 58, 336}, > > + {2, 59, 337}, > > + {2, 60, 338}, > > + > > + /* 340 */ > > + {2, 61, 339}, > > + {2, 62, 340}, > > + {2, 63, 341}, > > + {2, 64, 342}, > > + {2, 65, 343}, > > + {2, 66, 344}, > > + {2, 67, 345}, > > + {2, 68, 346}, > > + {2, 69, 347}, > > + {-1, -1, 355}, > > + > > + /* 350 */ > > + {-1, -1, 356}, > > + {-1, -1, 357}, > > + {-1, -1, 358}, > > + {-1, -1, 359}, > > + {-1, -1, 360}, > > + {-1, -1, 361}, > > + {-1, -1, 362}, > > + {-1, -1, 363}, > > + {-1, -1, 364}, > > + {-1, -1, 365}, > > + > > + /* 360 */ > > + {-1, -1, 366}, > > + {-1, -1, 367}, > > + {-1, -1, 368}, > > + {-1, -1, 369}, > > + {-1, -1, 370}, > > + {-1, -1, 371}, > > + > > +}; > > + > > +static struct mtk_device_info mt6873_devices_peri[] = { > > + /* sys_idx, ctrl_idx, vio_idx */ > > + /* 0 */ > > + {0, 0, 0}, > > + {0, 1, 1}, > > + {0, 2, 2}, > > + {0, 3, 3}, > > + {0, 4, 4}, > > + {0, 5, 5}, > > + {0, 6, 6}, > > + {0, 7, 7}, > > + {0, 8, 8}, > > + {0, 9, 9}, > > + > > + /* 10 */ > > + {0, 10, 10}, > > + {0, 11, 11}, > > + {0, 12, 13}, > > + {0, 13, 14}, > > + {0, 14, 15}, > > + {0, 15, 16}, > > + {0, 16, 17}, > > + {0, 17, 18}, > > + {0, 18, 19}, > > + {0, 19, 20}, > > + > > + /* 20 */ > > + {0, 20, 21}, > > + {0, 21, 23}, > > + {0, 22, 24}, > > + {0, 23, 25}, > > + {0, 24, 26}, > > + {0, 25, 27}, > > + {0, 26, 28}, > > + {0, 27, 29}, > > + {0, 28, 30}, > > + {0, 29, 31}, > > + > > + /* 30 */ > > + {0, 30, 32}, > > + {0, 31, 33}, > > + {0, 32, 34}, > > + {0, 33, 35}, > > + {0, 34, 36}, > > + {0, 35, 37}, > > + {0, 36, 38}, > > + {0, 37, 62}, > > + {0, 38, 63}, > > + {0, 39, 64}, > > + > > + /* 40 */ > > + {0, 40, 65}, > > + {0, 41, 66}, > > + {0, 42, 67}, > > + {0, 43, 68}, > > + {0, 44, 69}, > > + {0, 45, 70}, > > + {0, 46, 71}, > > + {0, 47, 72}, > > + {0, 48, 73}, > > + {0, 49, 74}, > > + > > + /* 50 */ > > + {0, 50, 119}, > > + {0, 51, 120}, > > + {0, 52, 121}, > > + {0, 53, 122}, > > + {0, 54, 123}, > > + {0, 55, 124}, > > + {0, 56, 125}, > > + {0, 57, 126}, > > + {0, 58, 127}, > > + {0, 59, 128}, > > + > > + /* 60 */ > > + {0, 60, 129}, > > + {0, 61, 130}, > > + {0, 62, 137}, > > + {0, 63, 143}, > > + {0, 64, 144}, > > + {0, 65, 145}, > > + {0, 66, 146}, > > + {0, 67, 147}, > > + {0, 68, 148}, > > + {0, 69, 149}, > > + > > + /* 70 */ > > + {0, 70, 150}, > > + {0, 71, 151}, > > + {0, 72, 152}, > > + {0, 73, 153}, > > + {0, 74, 154}, > > + {0, 75, 155}, > > + {0, 76, 156}, > > + {0, 77, 157}, > > + {0, 78, 158}, > > + {0, 79, 159}, > > + > > + /* 80 */ > > + {0, 80, 160}, > > + {0, 81, 161}, > > + {0, 82, 162}, > > + {0, 83, 163}, > > + {0, 84, 164}, > > + {0, 85, 165}, > > + {0, 86, 166}, > > + {0, 87, 167}, > > + {0, 88, 168}, > > + {0, 89, 169}, > > + > > + /* 90 */ > > + {0, 90, 170}, > > + {0, 91, 171}, > > + {0, 92, 174}, > > + {0, 93, 175}, > > + {0, 94, 176}, > > + {0, 95, 177}, > > + {0, 96, 178}, > > + {0, 97, 179}, > > + {0, 98, 180}, > > + {0, 99, 181}, > > + > > + /* 100 */ > > + {0, 100, 182}, > > + {0, 101, 183}, > > + {0, 102, 184}, > > + {0, 103, 185}, > > + {0, 104, 186}, > > + {1, 0, 39}, > > + {1, 1, 40}, > > + {1, 2, 41}, > > + {1, 3, 42}, > > + {1, 4, 43}, > > + > > + /* 110 */ > > + {1, 5, 44}, > > + {1, 6, 45}, > > + {1, 7, 46}, > > + {1, 8, 47}, > > + {1, 9, 48}, > > + {1, 10, 49}, > > + {1, 11, 50}, > > + {1, 12, 51}, > > + {1, 13, 52}, > > + {1, 14, 53}, > > + > > + /* 120 */ > > + {1, 15, 54}, > > + {1, 16, 55}, > > + {1, 17, 56}, > > + {1, 18, 57}, > > + {1, 19, 58}, > > + {1, 20, 59}, > > + {1, 21, 60}, > > + {1, 22, 61}, > > + {1, 23, 76}, > > + {1, 24, 77}, > > + > > + /* 130 */ > > + {1, 25, 78}, > > + {1, 26, 79}, > > + {1, 27, 80}, > > + {1, 28, 81}, > > + {1, 29, 82}, > > + {1, 30, 83}, > > + {1, 31, 84}, > > + {1, 32, 85}, > > + {1, 33, 86}, > > + {1, 34, 87}, > > + > > + /* 140 */ > > + {1, 35, 88}, > > + {1, 36, 89}, > > + {1, 37, 90}, > > + {1, 38, 91}, > > + {1, 39, 92}, > > + {1, 40, 93}, > > + {1, 41, 94}, > > + {1, 42, 95}, > > + {1, 43, 96}, > > + {1, 44, 97}, > > + > > + /* 150 */ > > + {1, 45, 98}, > > + {1, 46, 99}, > > + {1, 47, 100}, > > + {1, 48, 101}, > > + {1, 49, 102}, > > + {1, 50, 103}, > > + {1, 51, 104}, > > + {1, 52, 105}, > > + {1, 53, 106}, > > + {1, 54, 107}, > > + > > + /* 160 */ > > + {1, 55, 108}, > > + {1, 56, 109}, > > + {1, 57, 110}, > > + {1, 58, 111}, > > + {1, 59, 112}, > > + {1, 60, 113}, > > + {1, 61, 114}, > > + {1, 62, 115}, > > + {1, 63, 116}, > > + {1, 64, 117}, > > + > > + /* 170 */ > > + {1, 65, 118}, > > + {2, 0, 75}, > > + {-1, -1, 187}, > > + {-1, -1, 188}, > > + {-1, -1, 189}, > > + {-1, -1, 190}, > > + {-1, -1, 191}, > > + {-1, -1, 192}, > > + {-1, -1, 193}, > > + {-1, -1, 194}, > > + > > + /* 180 */ > > + {-1, -1, 195}, > > + {-1, -1, 196}, > > + {-1, -1, 197}, > > + {-1, -1, 198}, > > + {-1, -1, 199}, > > + {-1, -1, 200}, > > + {-1, -1, 201}, > > + {-1, -1, 202}, > > + {-1, -1, 203}, > > + {-1, -1, 204}, > > + > > + /* 190 */ > > + {-1, -1, 205}, > > + {-1, -1, 206}, > > + {-1, -1, 207}, > > + {-1, -1, 208}, > > + {-1, -1, 209}, > > + {-1, -1, 210}, > > + {-1, -1, 211}, > > + {-1, -1, 212}, > > + {-1, -1, 213}, > > + {-1, -1, 214}, > > + > > + /* 200 */ > > + {-1, -1, 215}, > > + {-1, -1, 216}, > > + {-1, -1, 217}, > > + {-1, -1, 218}, > > + {-1, -1, 219}, > > + {-1, -1, 220}, > > + {-1, -1, 221}, > > + {-1, -1, 222}, > > + {-1, -1, 223}, > > + {-1, -1, 224}, > > + > > + /* 210 */ > > + {-1, -1, 225}, > > + {-1, -1, 226}, > > + {-1, -1, 227}, > > + {-1, -1, 228}, > > + {-1, -1, 229}, > > + {-1, -1, 230}, > > + {-1, -1, 231}, > > + {-1, -1, 232}, > > + {-1, -1, 233}, > > + {-1, -1, 234}, > > + > > + /* 220 */ > > + {-1, -1, 235}, > > + {-1, -1, 236}, > > + {-1, -1, 237}, > > + {-1, -1, 238}, > > + {-1, -1, 239}, > > + {-1, -1, 240}, > > + {-1, -1, 241}, > > + {-1, -1, 242}, > > + {-1, -1, 243}, > > + {-1, -1, 244}, > > + > > + /* 230 */ > > + {-1, -1, 245}, > > + {-1, -1, 246}, > > + {-1, -1, 247}, > > + {-1, -1, 248}, > > + {-1, -1, 249}, > > + {-1, -1, 250}, > > + {-1, -1, 251}, > > + {-1, -1, 252}, > > + {-1, -1, 253}, > > + {-1, -1, 254}, > > + > > + /* 240 */ > > + {-1, -1, 255}, > > + {-1, -1, 256}, > > + {-1, -1, 257}, > > + {-1, -1, 258}, > > + {-1, -1, 259}, > > + {-1, -1, 260}, > > + {-1, -1, 261}, > > + {-1, -1, 262}, > > + {-1, -1, 263}, > > + {-1, -1, 264}, > > + > > + /* 250 */ > > + {-1, -1, 265}, > > + {-1, -1, 266}, > > + {-1, -1, 267}, > > + {-1, -1, 268}, > > + {-1, -1, 269}, > > + {-1, -1, 270}, > > + {-1, -1, 271}, > > + {-1, -1, 272}, > > + {-1, -1, 273}, > > + {-1, -1, 274}, > > + > > + /* 260 */ > > + {-1, -1, 275}, > > + {-1, -1, 276}, > > + {-1, -1, 277}, > > + {-1, -1, 278}, > > + {-1, -1, 279}, > > + {-1, -1, 280}, > > + {-1, -1, 281}, > > + {-1, -1, 282}, > > + {-1, -1, 283}, > > + {-1, -1, 284}, > > + > > + /* 270 */ > > + {-1, -1, 285}, > > + {-1, -1, 286}, > > + {-1, -1, 287}, > > + {-1, -1, 288}, > > + {-1, -1, 289}, > > + {-1, -1, 290}, > > + {-1, -1, 291}, > > + {-1, -1, 292}, > > + {-1, -1, 293}, > > + {-1, -1, 294}, > > + > > + /* 280 */ > > + {-1, -1, 295}, > > + {-1, -1, 296}, > > + {-1, -1, 297}, > > + {-1, -1, 298}, > > + > > +}; > > + > > +static struct mtk_device_info mt6873_devices_peri2[] = { > > + /* sys_idx, ctrl_idx, vio_idx */ > > + /* 0 */ > > + {0, 0, 0}, > > + {0, 1, 1}, > > + {0, 2, 2}, > > + {0, 3, 3}, > > + {0, 4, 4}, > > + {0, 5, 5}, > > + {0, 6, 6}, > > + {0, 7, 7}, > > + {0, 8, 8}, > > + {0, 9, 9}, > > + > > + /* 10 */ > > + {0, 10, 10}, > > + {0, 11, 11}, > > + {0, 12, 12}, > > + {0, 13, 13}, > > + {0, 14, 14}, > > + {0, 15, 15}, > > + {0, 16, 16}, > > + {0, 17, 17}, > > + {0, 18, 18}, > > + {0, 19, 19}, > > + > > + /* 20 */ > > + {0, 20, 20}, > > + {0, 21, 21}, > > + {0, 22, 22}, > > + {0, 23, 23}, > > + {0, 24, 24}, > > + {0, 25, 25}, > > + {0, 26, 26}, > > + {0, 27, 27}, > > + {0, 28, 28}, > > + {0, 29, 29}, > > + > > + /* 30 */ > > + {0, 30, 30}, > > + {0, 31, 31}, > > + {0, 32, 32}, > > + {0, 33, 33}, > > + {0, 34, 34}, > > + {0, 35, 35}, > > + {0, 36, 36}, > > + {0, 37, 37}, > > + {0, 38, 38}, > > + {0, 39, 39}, > > + > > + /* 40 */ > > + {0, 40, 40}, > > + {0, 41, 41}, > > + {0, 42, 42}, > > + {0, 43, 43}, > > + {0, 44, 44}, > > + {0, 45, 45}, > > + {0, 46, 46}, > > + {0, 47, 47}, > > + {0, 48, 48}, > > + {0, 49, 49}, > > + > > + /* 50 */ > > + {0, 50, 50}, > > + {0, 51, 51}, > > + {0, 52, 52}, > > + {0, 53, 53}, > > + {0, 54, 54}, > > + {0, 55, 55}, > > + {0, 56, 56}, > > + {0, 57, 57}, > > + {0, 58, 58}, > > + {0, 59, 59}, > > + > > + /* 60 */ > > + {0, 60, 60}, > > + {0, 61, 61}, > > + {0, 62, 62}, > > + {0, 63, 63}, > > + {0, 64, 64}, > > + {0, 65, 65}, > > + {0, 66, 66}, > > + {0, 67, 67}, > > + {0, 68, 68}, > > + {0, 69, 69}, > > + > > + /* 70 */ > > + {0, 70, 70}, > > + {0, 71, 71}, > > + {0, 72, 72}, > > + {0, 73, 73}, > > + {0, 74, 74}, > > + {0, 75, 75}, > > + {0, 76, 76}, > > + {0, 77, 77}, > > + {0, 78, 78}, > > + {0, 79, 79}, > > + > > + /* 80 */ > > + {0, 80, 80}, > > + {0, 81, 81}, > > + {0, 82, 82}, > > + {0, 83, 83}, > > + {0, 84, 84}, > > + {0, 85, 85}, > > + {0, 86, 86}, > > + {0, 87, 87}, > > + {0, 88, 88}, > > + {0, 89, 89}, > > + > > + /* 90 */ > > + {0, 90, 90}, > > + {0, 91, 91}, > > + {0, 92, 92}, > > + {0, 93, 93}, > > + {0, 94, 94}, > > + {0, 95, 95}, > > + {0, 96, 96}, > > + {0, 97, 97}, > > + {0, 98, 98}, > > + {0, 99, 99}, > > + > > + /* 100 */ > > + {0, 100, 100}, > > + {0, 101, 103}, > > + {0, 102, 104}, > > + {0, 103, 105}, > > + {0, 104, 106}, > > + {0, 105, 107}, > > + {0, 106, 108}, > > + {0, 107, 109}, > > + {0, 108, 110}, > > + {0, 109, 111}, > > + > > + /* 110 */ > > + {0, 110, 112}, > > + {0, 111, 113}, > > + {0, 112, 114}, > > + {0, 113, 115}, > > + {0, 114, 116}, > > + {-1, -1, 117}, > > + {-1, -1, 118}, > > + {-1, -1, 119}, > > + {-1, -1, 120}, > > + {-1, -1, 121}, > > + > > + /* 120 */ > > + {-1, -1, 122}, > > + {-1, -1, 123}, > > + {-1, -1, 124}, > > + {-1, -1, 125}, > > + {-1, -1, 126}, > > + {-1, -1, 127}, > > + {-1, -1, 128}, > > + {-1, -1, 129}, > > + {-1, -1, 130}, > > + {-1, -1, 131}, > > + > > + /* 130 */ > > + {-1, -1, 132}, > > + {-1, -1, 133}, > > + {-1, -1, 134}, > > + {-1, -1, 135}, > > + {-1, -1, 136}, > > + {-1, -1, 137}, > > + {-1, -1, 138}, > > + {-1, -1, 139}, > > + {-1, -1, 140}, > > + {-1, -1, 141}, > > + > > + /* 140 */ > > + {-1, -1, 142}, > > + {-1, -1, 143}, > > + {-1, -1, 144}, > > + {-1, -1, 145}, > > + {-1, -1, 146}, > > + {-1, -1, 147}, > > + {-1, -1, 148}, > > + {-1, -1, 149}, > > + {-1, -1, 150}, > > + {-1, -1, 151}, > > + > > + /* 150 */ > > + {-1, -1, 152}, > > + {-1, -1, 153}, > > + {-1, -1, 154}, > > + {-1, -1, 155}, > > + {-1, -1, 156}, > > + {-1, -1, 157}, > > + {-1, -1, 158}, > > + {-1, -1, 159}, > > + {-1, -1, 160}, > > + {-1, -1, 161}, > > + > > + /* 160 */ > > + {-1, -1, 162}, > > + {-1, -1, 163}, > > + {-1, -1, 164}, > > + {-1, -1, 165}, > > + {-1, -1, 166}, > > + {-1, -1, 167}, > > + {-1, -1, 168}, > > + {-1, -1, 169}, > > + {-1, -1, 170}, > > + {-1, -1, 171}, > > + > > + /* 170 */ > > + {-1, -1, 172}, > > + {-1, -1, 173}, > > + {-1, -1, 174}, > > + {-1, -1, 175}, > > + {-1, -1, 176}, > > + {-1, -1, 177}, > > + {-1, -1, 178}, > > + {-1, -1, 179}, > > + {-1, -1, 180}, > > + {-1, -1, 181}, > > + > > + /* 180 */ > > + {-1, -1, 182}, > > + {-1, -1, 183}, > > + {-1, -1, 184}, > > + {-1, -1, 185}, > > + {-1, -1, 186}, > > + {-1, -1, 187}, > > + {-1, -1, 188}, > > + {-1, -1, 189}, > > + {-1, -1, 190}, > > + {-1, -1, 191}, > > + > > + /* 190 */ > > + {-1, -1, 192}, > > + {-1, -1, 193}, > > + {-1, -1, 194}, > > + {-1, -1, 195}, > > + {-1, -1, 196}, > > + {-1, -1, 197}, > > + {-1, -1, 198}, > > + {-1, -1, 199}, > > + {-1, -1, 200}, > > + {-1, -1, 201}, > > + > > + /* 200 */ > > + {-1, -1, 202}, > > + {-1, -1, 203}, > > + {-1, -1, 204}, > > + {-1, -1, 205}, > > + {-1, -1, 206}, > > + {-1, -1, 207}, > > + {-1, -1, 208}, > > + {-1, -1, 209}, > > + {-1, -1, 210}, > > + {-1, -1, 211}, > > + > > + /* 210 */ > > + {-1, -1, 212}, > > + {-1, -1, 213}, > > + {-1, -1, 214}, > > + {-1, -1, 215}, > > + {-1, -1, 216}, > > + {-1, -1, 217}, > > + {-1, -1, 218}, > > + {-1, -1, 219}, > > + {-1, -1, 220}, > > + {-1, -1, 221}, > > + > > + /* 220 */ > > + {-1, -1, 222}, > > + {-1, -1, 223}, > > + {-1, -1, 224}, > > + {-1, -1, 225}, > > + {-1, -1, 226}, > > + {-1, -1, 227}, > > + {-1, -1, 228}, > > + {-1, -1, 229}, > > + {-1, -1, 230}, > > + {-1, -1, 231}, > > + > > + /* 230 */ > > + {-1, -1, 232}, > > + {-1, -1, 233}, > > + {-1, -1, 234}, > > + {-1, -1, 235}, > > + {-1, -1, 236}, > > + {-1, -1, 237}, > > + {-1, -1, 238}, > > + {-1, -1, 239}, > > + {-1, -1, 240}, > > + {-1, -1, 241}, > > + > > + /* 240 */ > > + {-1, -1, 242}, > > + {-1, -1, 243}, > > + {-1, -1, 244}, > > + {-1, -1, 245}, > > + {-1, -1, 246}, > > + {-1, -1, 247}, > > + {-1, -1, 248}, > > + > > +}; > > + > > +static struct mtk_device_info mt6873_devices_peri_par[] = { > > + /* sys_idx, ctrl_idx, vio_idx */ > > + /* 0 */ > > + {0, 0, 0}, > > + {0, 1, 1}, > > + {0, 2, 2}, > > + {0, 3, 3}, > > + {0, 4, 4}, > > + {0, 5, 5}, > > + {0, 6, 6}, > > + {0, 7, 7}, > > + {0, 8, 8}, > > + {0, 9, 9}, > > + > > + /* 10 */ > > + {0, 10, 10}, > > + {0, 11, 11}, > > + {0, 12, 12}, > > + {0, 13, 13}, > > + {0, 14, 14}, > > + {0, 15, 15}, > > + {0, 16, 16}, > > + {0, 17, 17}, > > + {0, 18, 18}, > > + {0, 19, 19}, > > + > > + /* 20 */ > > + {0, 20, 20}, > > + {0, 21, 21}, > > + {0, 22, 22}, > > + {0, 23, 23}, > > + {0, 24, 24}, > > + {0, 25, 25}, > > + {0, 26, 26}, > > + {-1, -1, 27}, > > + {-1, -1, 28}, > > + {-1, -1, 29}, > > + > > + /* 30 */ > > + {-1, -1, 30}, > > + {-1, -1, 31}, > > + {-1, -1, 32}, > > + {-1, -1, 33}, > > + {-1, -1, 34}, > > + {-1, -1, 35}, > > + {-1, -1, 36}, > > + {-1, -1, 37}, > > + {-1, -1, 38}, > > + {-1, -1, 39}, > > + > > + /* 40 */ > > + {-1, -1, 40}, > > + {-1, -1, 41}, > > + {-1, -1, 42}, > > + {-1, -1, 43}, > > + {-1, -1, 44}, > > + {-1, -1, 45}, > > + {-1, -1, 46}, > > + {-1, -1, 47}, > > + {-1, -1, 48}, > > + {-1, -1, 49}, > > + > > + /* 50 */ > > + {-1, -1, 50}, > > + {-1, -1, 51}, > > + {-1, -1, 52}, > > + {-1, -1, 53}, > > + {-1, -1, 54}, > > + {-1, -1, 55}, > > + {-1, -1, 56}, > > + {-1, -1, 57}, > > + > > +}; > > + > > +static struct mtk_device_num mtk6873_devices_num[] = { > > + {SLAVE_TYPE_INFRA, VIO_SLAVE_NUM_INFRA}, > > + {SLAVE_TYPE_PERI, VIO_SLAVE_NUM_PERI}, > > + {SLAVE_TYPE_PERI2, VIO_SLAVE_NUM_PERI2}, > > + {SLAVE_TYPE_PERI_PAR, VIO_SLAVE_NUM_PERI_PAR}, > > +}; > > + > > +static struct INFRAAXI_ID_INFO peri_mi_id_to_master[] = { > > + {"THERM2", 0x0, 0x7}, > > + {"SPM", 0x2, 0x7}, > > + {"CCU", 0x4, 0x7}, > > + {"THERM", 0x6, 0x7}, > > + {"SPM_DRAMC", 0x3, 0x7}, > > +}; > > + > > +static struct INFRAAXI_ID_INFO infra_mi_id_to_master[] = { > > + {"CONNSYS_WFDMA", 0x0, 0x3fff}, > > + {"CONNSYS_ICAP", 0x10, 0x3fff}, > > + {"CONNSYS_MCU_SYS", 0x20, 0x3fff}, > > + {"CONNSYS_GPS", 0x30, 0x3fff}, > > + {"Tinysys", 0x2, 0x3c0f}, > > + {"CQ_DMA", 0x4, 0x3c7f}, > > + {"DebugTop", 0x14, 0x3f7f}, > > + {"SSUSB", 0x24, 0xfff}, > > + {"SSUSB2", 0x424, 0xfff}, > > + {"NOR", 0x824, 0xfff}, > > + {"PWM", 0xc24, 0x3fff}, > > + {"SPI6", 0x2c24, 0x3fff}, > > + {"SPI0", 0x3c24, 0x3fff}, > > + {"APU", 0xa4, 0x33ff}, > > + {"SPI2", 0x124, 0x3fff}, > > + {"SPI3", 0x524, 0x3fff}, > > + {"SPI4", 0x924, 0x3fff}, > > + {"SPI5", 0xd24, 0x3fff}, > > + {"SPI7", 0x1a4, 0x3fff}, > > + {"Audio", 0x9a4, 0x3fff}, > > + {"SPI1", 0xda4, 0x3fff}, > > + {"AP_DMA_EXT", 0x224, 0x23ff}, > > + {"THERM2", 0x2a4, 0x3fff}, > > + {"SPM", 0x6a4, 0x3fff}, > > + {"CCU", 0xaa4, 0x3fff}, > > + {"THERM", 0xea4, 0x3fff}, > > + {"DX_CC", 0x34, 0x387f}, > > + {"GCE", 0x44, 0x3e7f}, > > + {"PCIE", 0x64, 0x307f}, > > + {"DPMAIF", 0x6, 0x3f0f}, > > + {"SSPM", 0x8, 0x3f8f}, > > + {"UFS", 0xa, 0x3f9f}, > > + {"MSDC0", 0x1a, 0x3fff}, > > + {"MSDC1", 0x3a, 0x3fff}, > > + {"MSDC2", 0x7a, 0x3fff}, > > + {"CPUEB", 0xc, 0x3c0f}, > > + {"APMCU_write", 0x1, 0x3fe1}, > > + {"APMCU_write", 0x81, 0x3fe1}, > > + {"APMCU_write", 0x201, 0x3e01}, > > + {"APMCU_read", 0x1, 0x3fe1}, > > + {"APMCU_read", 0x81, 0x3fe1}, > > + {"APMCU_read", 0x101, 0x3ffd}, > > + {"APMCU_read", 0x105, 0x3ffd}, > > + {"APMCU_read", 0x201, 0x3e01}, > > + {"APMCU_read", 0x401, 0x3c01}, > > +}; > > + > > +static const char *infra_mi_trans(u32 bus_id) > > +{ > > + int master_count = ARRAY_SIZE(infra_mi_id_to_master); > > + const char *master = "UNKNOWN_MASTER_FROM_INFRA"; > > + int i; > > + > > + for (i = 0; i < master_count; i++) { > > + if ((bus_id & infra_mi_id_to_master[i].mask) == > > + infra_mi_id_to_master[i].bus_id) > > + master = infra_mi_id_to_master[i].master; > > + } > > + > > + return master; > > +} > > + > > +static const char *peri_mi_trans(u32 bus_id) > > +{ > > + int master_count = ARRAY_SIZE(peri_mi_id_to_master); > > + const char *master = "UNKNOWN_MASTER_FROM_PERI"; > > + int i; > > + > > + if ((bus_id & 0x3) == 0x0) > > + return infra_mi_trans(bus_id >> 2); > > + else if ((bus_id & 0x3) == 0x2) > > + return "MD_AP_M"; > > + else if ((bus_id & 0x3) == 0x3) > > + return "AP_DMA_M"; > > + > > + bus_id = bus_id >> 2; > > + > > + for (i = 0 ; i < master_count; i++) { > > + if ((bus_id & peri_mi_id_to_master[i].mask) == > > + peri_mi_id_to_master[i].bus_id) > > + master = infra_mi_id_to_master[i].master; > > + } > > + > > + return master; > > +} > > + > > +static const char *mt6873_bus_id_to_master(u32 bus_id, u32 vio_addr, > > + int slave_type, int shift_sta_bit, > > + int domain) > > +{ > > + u8 h_1byte; > > + > > + if (bus_id == 0x0 && vio_addr == 0x0) > > + return NULL; > > + > > + h_1byte = (vio_addr >> 24) & 0xFF; > > + > > + if (slave_type == SLAVE_TYPE_INFRA) { > > + if (vio_addr <= 0x1FFFFF) { > > + if ((bus_id & 0x1) == 0) > > + return "EMI_L2C_M"; > > + > > + return infra_mi_trans(bus_id >> 1); > > + > > + } else if (shift_sta_bit == 3) { > > + if ((bus_id & 0x1) == 0) > > + return "EMI_L2C_M"; > > + > > + return infra_mi_trans(bus_id >> 1); > > + > > + } else if (shift_sta_bit == 4) { > > + if ((bus_id & 0x1) == 1) > > + return "GCE_M"; > > + > > + return infra_mi_trans(bus_id >> 1); > > + } > > + > > + return infra_mi_trans(bus_id); > > + > > + } else if (slave_type == SLAVE_TYPE_PERI) { > > + if ((h_1byte >= 0x14 && h_1byte < 0x18) || > > + (h_1byte >= 0x1A && h_1byte < 0x1C) || > > + (h_1byte >= 0x1F && h_1byte < 0x20)) { > > + if ((bus_id & 0x1) == 1) > > + return "GCE_M"; > > + > > + return infra_mi_trans(bus_id >> 1); > > + } > > + > > + if (shift_sta_bit == 3 || shift_sta_bit == 4 || > > + shift_sta_bit == 8) { > > + if ((bus_id & 0x1) == 0) > > + return "MD_AP_M"; > > + > > + return peri_mi_trans(bus_id >> 1); > > + } > > + return peri_mi_trans(bus_id); > > + > > + } else if (slave_type == SLAVE_TYPE_PERI2) { > > + return peri_mi_trans(bus_id); > > + > > + } else if (slave_type == SLAVE_TYPE_PERI_PAR) { > > + return peri_mi_trans(bus_id); > > + } > > + > > + return "UNKNOWN_MASTER"; > > +} > > + > > +static void mm2nd_vio_handler(void __iomem *infracfg, > > + struct mtk_devapc_vio_info *vio_info, > > + bool mdp_vio, bool disp2_vio, bool mmsys_vio) > > +{ > > + u32 vio_sta, vio_dbg, rw; > > + u32 vio_sta_num; > > + u32 vio0_offset; > > + char mm_str[64] = {0}; > > + void __iomem *reg; > > + int i; > > + > > + if (!infracfg) > > + return; > > + > > + if (mdp_vio) { > > + vio_sta_num = INFRACFG_MDP_VIO_STA_NUM; > > + vio0_offset = INFRACFG_MDP_SEC_VIO0_OFFSET; > > + > > + strncpy(mm_str, "INFRACFG_MDP_SEC_VIO", > > + sizeof("INFRACFG_MDP_SEC_VIO")); > > + > > + } else if (mmsys_vio) { > > + vio_sta_num = INFRACFG_MM_VIO_STA_NUM; > > + vio0_offset = INFRACFG_MM_SEC_VIO0_OFFSET; > > + > > + strncpy(mm_str, "INFRACFG_MM_SEC_VIO", > > + sizeof("INFRACFG_MM_SEC_VIO")); > > + > > + } else { > > + pr_err(PFX "%s: param check failed, mdp_vio:%s, disp2_vio:%s, mmsys_vio:%s\n", > > + __func__, mdp_vio ? "true" : "false", > > + disp2_vio ? "true" : "false", > > + mmsys_vio ? "true" : "false"); > > + return; > > + } > > + > > + /* Get mm2nd violation status */ > > + for (i = 0; i < vio_sta_num; i++) { > > + reg = infracfg + vio0_offset + i * 4; > > + vio_sta = readl(reg); > > + if (vio_sta) > > + pr_info(PFX "MM 2nd violation: %s%d:0x%x\n", > > + mm_str, i, vio_sta); > > + } > > + > > + /* Get mm2nd violation address */ > > + reg = infracfg + vio0_offset + i * 4; > > + vio_info->vio_addr = readl(reg); > > + > > + /* Get mm2nd violation information */ > > + reg = infracfg + vio0_offset + (i + 1) * 4; > > + vio_dbg = readl(reg); > > + > > + vio_info->domain_id = (vio_dbg & INFRACFG_MM2ND_VIO_DOMAIN_MASK) >> > > + INFRACFG_MM2ND_VIO_DOMAIN_SHIFT; > > + > > + vio_info->master_id = (vio_dbg & INFRACFG_MM2ND_VIO_ID_MASK) >> > > + INFRACFG_MM2ND_VIO_ID_SHIFT; > > + > > + rw = (vio_dbg & INFRACFG_MM2ND_VIO_RW_MASK) >> > > + INFRACFG_MM2ND_VIO_RW_SHIFT; > > + vio_info->read = (rw == 0); > > + vio_info->write = (rw == 1); > > +} > > + > > +static u32 mt6873_shift_group_get(int slave_type, u32 vio_idx) > > +{ > > + if (slave_type == SLAVE_TYPE_INFRA) { > > + if ((vio_idx >= 0 && vio_idx <= 8) || vio_idx == 355) > > + return 0; > > + else if ((vio_idx >= 9 && vio_idx <= 14) || vio_idx == 356) > > + return 1; > > + else if ((vio_idx >= 15 && vio_idx <= 19) || vio_idx == 357) > > + return 2; > > + else if ((vio_idx >= 20 && vio_idx <= 21) || vio_idx == 358) > > + return 3; > > + else if (vio_idx >= 22 && vio_idx <= 347) > > + return 4; > > + else if ((vio_idx >= 348 && vio_idx <= 354) || > > + (vio_idx >= 359 && vio_idx <= 365) || > > + vio_idx == 366) > > + return 5; > > + > > + pr_err(PFX "%s:%d Wrong vio_idx:0x%x\n", > > + __func__, __LINE__, vio_idx); > > + > > + } else if (slave_type == SLAVE_TYPE_PERI) { > > + if (vio_idx >= 0 && vio_idx <= 4) > > + return 0; > > + else if (vio_idx >= 5 && vio_idx <= 6) > > + return 1; > > + else if ((vio_idx >= 7 && vio_idx <= 38) || vio_idx == 187 || > > + (vio_idx >= 188 && vio_idx <= 219) || > > + vio_idx == 286) > > + return 2; > > + else if ((vio_idx >= 39 && vio_idx <= 61) || vio_idx == 220) > > + return 3; > > + else if ((vio_idx >= 62 && vio_idx <= 72) || vio_idx == 221) > > + return 4; > > + else if ((vio_idx >= 73 && vio_idx <= 74) || vio_idx == 222) > > + return 5; > > + else if (vio_idx == 75 || vio_idx == 223) > > + return 6; > > + else if ((vio_idx >= 76 && vio_idx <= 118) || vio_idx == 224) > > + return 7; > > + else if ((vio_idx >= 119 && vio_idx <= 121) || vio_idx == 225) > > + return 8; > > + if (vio_idx >= 122 && vio_idx <= 125) > > + return 9; > > + else if (vio_idx == 126 || (vio_idx >= 226 && vio_idx <= 227) || > > + vio_idx == 287) > > + return 10; > > + if (vio_idx >= 127 && vio_idx <= 128) > > + return 11; > > + if (vio_idx >= 129 && vio_idx <= 130) > > + return 12; > > + else if ((vio_idx >= 131 && vio_idx <= 141) || > > + (vio_idx >= 228 && vio_idx <= 238) || > > + vio_idx == 288) > > + return 13; > > + else if ((vio_idx >= 142 && vio_idx <= 143) || > > + (vio_idx >= 239 && vio_idx <= 240) || > > + vio_idx == 289) > > + return 14; > > + else if ((vio_idx >= 144 && vio_idx <= 173) || vio_idx == 241 || > > + (vio_idx >= 242 && vio_idx <= 271) || > > + vio_idx == 290) > > + return 15; > > + else if ((vio_idx >= 174 && vio_idx <= 186) || vio_idx == 272 || > > + (vio_idx >= 273 && vio_idx <= 285) || > > + vio_idx == 291) > > + return 16; > > + > > + pr_err(PFX "%s:%d Wrong vio_idx:0x%x\n", > > + __func__, __LINE__, vio_idx); > > + > > + } else if (slave_type == SLAVE_TYPE_PERI2) { > > + if ((vio_idx >= 0 && vio_idx <= 12) || vio_idx == 117 || > > + (vio_idx >= 118 && vio_idx <= 130) || > > + vio_idx == 234) > > + return 0; > > + else if (vio_idx >= 13 && vio_idx <= 16) > > + return 1; > > + else if (vio_idx >= 17 && vio_idx <= 20) > > + return 2; > > + else if ((vio_idx >= 21 && vio_idx <= 36) || vio_idx == 131 || > > + (vio_idx >= 132 && vio_idx <= 147) || > > + vio_idx == 235) > > + return 3; > > + else if ((vio_idx >= 37 && vio_idx <= 44) || vio_idx == 148 || > > + (vio_idx >= 149 && vio_idx <= 156) || > > + vio_idx == 236) > > + return 4; > > + else if ((vio_idx >= 45 && vio_idx <= 60) || vio_idx == 157 || > > + (vio_idx >= 158 && vio_idx <= 173) || > > + vio_idx == 237) > > + return 5; > > + else if ((vio_idx >= 61 && vio_idx <= 76) || vio_idx == 174 || > > + (vio_idx >= 175 && vio_idx <= 190) || > > + vio_idx == 238) > > + return 6; > > + else if ((vio_idx >= 77 && vio_idx <= 84) || vio_idx == 191 || > > + (vio_idx >= 192 && vio_idx <= 199) || > > + vio_idx == 239) > > + return 7; > > + else if ((vio_idx >= 85 && vio_idx <= 105) || vio_idx == 200 || > > + (vio_idx >= 201 && vio_idx <= 221) || > > + vio_idx == 240) > > + return 8; > > + else if ((vio_idx >= 106 && vio_idx <= 116) || vio_idx == 222 || > > + (vio_idx >= 223 && vio_idx <= 233) || > > + vio_idx == 241) > > + return 9; > > + > > + pr_err(PFX "%s:%d Wrong vio_idx:0x%x\n", > > + __func__, __LINE__, vio_idx); > > + > > + } else if (slave_type == SLAVE_TYPE_PERI_PAR) { > > + if ((vio_idx >= 0 && vio_idx <= 23) || vio_idx == 27 || > > + (vio_idx >= 28 && vio_idx <= 51) || > > + vio_idx == 56) > > + return 0; > > + else if ((vio_idx >= 24 && vio_idx <= 26) || vio_idx == 52 || > > + (vio_idx >= 53 && vio_idx <= 55) || > > + vio_idx == 57) > > + return 1; > > + > > + pr_err(PFX "%s:%d Wrong vio_idx:0x%x\n", > > + __func__, __LINE__, vio_idx); > > + > > + } else { > > + pr_err(PFX "%s:%d Wrong slave_type:0x%x\n", > > + __func__, __LINE__, slave_type); > > + } > > + > > + return 31; > > +} > > + > > +static struct mtk_devapc_dbg_status mt6873_devapc_dbg_stat = { > > + .enable_ut = PLAT_DBG_UT_DEFAULT, > > + .enable_dapc = PLAT_DBG_DAPC_DEFAULT, > > +}; > > + > > +static const char * const slave_type_to_str[] = { > > + "SLAVE_TYPE_INFRA", > > + "SLAVE_TYPE_PERI", > > + "SLAVE_TYPE_PERI2", > > + "SLAVE_TYPE_PERI_PAR", > > + "WRONG_SLAVE_TYPE", > > +}; > > + > > +static int mtk_vio_mask_sta_num[] = { > > + VIO_MASK_STA_NUM_INFRA, > > + VIO_MASK_STA_NUM_PERI, > > + VIO_MASK_STA_NUM_PERI2, > > + VIO_MASK_STA_NUM_PERI_PAR, > > +}; > > + > > +static struct mtk_devapc_vio_info mt6873_devapc_vio_info = { > > + .vio_mask_sta_num = mtk_vio_mask_sta_num, > > + .sramrom_vio_idx = SRAMROM_VIO_INDEX, > > + .mdp_vio_idx = MDP_VIO_INDEX, > > + .disp2_vio_idx = MDP_VIO_INDEX, > > + .mmsys_vio_idx = MMSYS_VIO_INDEX, > > + .sramrom_slv_type = SRAMROM_SLAVE_TYPE, > > + .mm2nd_slv_type = MM2ND_SLAVE_TYPE, > > +}; > > + > > +static const struct mtk_infra_vio_dbg_desc mt6873_vio_dbgs = { > > + .vio_dbg_mstid = INFRA_VIO_DBG_MSTID, > > + .vio_dbg_mstid_start_bit = INFRA_VIO_DBG_MSTID_START_BIT, > > + .vio_dbg_dmnid = INFRA_VIO_DBG_DMNID, > > + .vio_dbg_dmnid_start_bit = INFRA_VIO_DBG_DMNID_START_BIT, > > + .vio_dbg_w_vio = INFRA_VIO_DBG_W_VIO, > > + .vio_dbg_w_vio_start_bit = INFRA_VIO_DBG_W_VIO_START_BIT, > > + .vio_dbg_r_vio = INFRA_VIO_DBG_R_VIO, > > + .vio_dbg_r_vio_start_bit = INFRA_VIO_DBG_R_VIO_START_BIT, > > + .vio_addr_high = INFRA_VIO_ADDR_HIGH, > > + .vio_addr_high_start_bit = INFRA_VIO_ADDR_HIGH_START_BIT, > > +}; > > + > > +static const struct mtk_sramrom_sec_vio_desc mt6873_sramrom_sec_vios = { > > + .vio_id_mask = SRAMROM_SEC_VIO_ID_MASK, > > + .vio_id_shift = SRAMROM_SEC_VIO_ID_SHIFT, > > + .vio_domain_mask = SRAMROM_SEC_VIO_DOMAIN_MASK, > > + .vio_domain_shift = SRAMROM_SEC_VIO_DOMAIN_SHIFT, > > + .vio_rw_mask = SRAMROM_SEC_VIO_RW_MASK, > > + .vio_rw_shift = SRAMROM_SEC_VIO_RW_SHIFT, > > +}; > > + > > +static const u32 mt6873_devapc_pds[] = { > > + PD_VIO_MASK_OFFSET, > > + PD_VIO_STA_OFFSET, > > + PD_VIO_DBG0_OFFSET, > > + PD_VIO_DBG1_OFFSET, > > + PD_VIO_DBG2_OFFSET, > > + PD_APC_CON_OFFSET, > > + PD_SHIFT_STA_OFFSET, > > + PD_SHIFT_SEL_OFFSET, > > + PD_SHIFT_CON_OFFSET, > > +}; > > + > > +static struct mtk_devapc_soc mt6873_data = { > > + .dbg_stat = &mt6873_devapc_dbg_stat, > > + .slave_type_arr = slave_type_to_str, > > + .slave_type_num = SLAVE_TYPE_NUM, > > + .device_info[SLAVE_TYPE_INFRA] = mt6873_devices_infra, > > + .device_info[SLAVE_TYPE_PERI] = mt6873_devices_peri, > > + .device_info[SLAVE_TYPE_PERI2] = mt6873_devices_peri2, > > + .device_info[SLAVE_TYPE_PERI_PAR] = mt6873_devices_peri_par, > > + .ndevices = mtk6873_devices_num, > > + .vio_info = &mt6873_devapc_vio_info, > > + .vio_dbgs = &mt6873_vio_dbgs, > > + .sramrom_sec_vios = &mt6873_sramrom_sec_vios, > > + .devapc_pds = mt6873_devapc_pds, > > + .master_get = &mt6873_bus_id_to_master, > > + .mm2nd_vio_handler = &mm2nd_vio_handler, > > + .shift_group_get = mt6873_shift_group_get, > > +}; > > + > > +static const struct of_device_id mt6873_devapc_dt_match[] = { > > + { .compatible = "mediatek,mt6873-devapc" }, > > + {}, > > +}; > > + > > +static int mt6873_devapc_probe(struct platform_device *pdev) > > +{ > > + return mtk_devapc_probe(pdev, &mt6873_data); > > +} > > + > > +static int mt6873_devapc_remove(struct platform_device *dev) > > +{ > > + return mtk_devapc_remove(dev); > > +} > > + > > +static struct platform_driver mt6873_devapc_driver = { > > + .probe = mt6873_devapc_probe, > > + .remove = mt6873_devapc_remove, > > + .driver = { > > + .name = KBUILD_MODNAME, > > + .of_match_table = mt6873_devapc_dt_match, > > + }, > > +}; > > + > > +module_platform_driver(mt6873_devapc_driver); > > + > > +MODULE_DESCRIPTION("Mediatek MT6873 Device APC Driver"); > > +MODULE_AUTHOR("Neal Liu "); > > +MODULE_LICENSE("GPL"); > > diff --git a/drivers/soc/mediatek/devapc/devapc-mt6873.h b/drivers/soc/mediatek/devapc/devapc-mt6873.h > > new file mode 100644 > > index 0000000..16be09e > > --- /dev/null > > +++ b/drivers/soc/mediatek/devapc/devapc-mt6873.h > > @@ -0,0 +1,111 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * Copyright (C) 2020 MediaTek Inc. > > + */ > > + > > +#ifndef __DEVAPC_MT6873_H__ > > +#define __DEVAPC_MT6873_H__ > > + > > +/****************************************************************************** > > + * VARIABLE DEFINITION > > + ******************************************************************************/ > > +/* dbg status default setting */ > > +#define PLAT_DBG_UT_DEFAULT false > > +#define PLAT_DBG_DAPC_DEFAULT false > > + > > +/****************************************************************************** > > + * STRUCTURE DEFINITION > > + ******************************************************************************/ > > +enum DEVAPC_SLAVE_TYPE { > > + SLAVE_TYPE_INFRA = 0, > > + SLAVE_TYPE_PERI, > > + SLAVE_TYPE_PERI2, > > + SLAVE_TYPE_PERI_PAR, > > + SLAVE_TYPE_NUM, > > +}; > > + > > +enum DEVAPC_VIO_MASK_STA_NUM { > > + VIO_MASK_STA_NUM_INFRA = 12, > > + VIO_MASK_STA_NUM_PERI = 10, > > + VIO_MASK_STA_NUM_PERI2 = 8, > > + VIO_MASK_STA_NUM_PERI_PAR = 2, > > +}; > > + > > +enum DEVAPC_VIO_SLAVE_NUM { > > + VIO_SLAVE_NUM_INFRA = 366, > > + VIO_SLAVE_NUM_PERI = 284, > > + VIO_SLAVE_NUM_PERI2 = 247, > > + VIO_SLAVE_NUM_PERI_PAR = 58, > > +}; > > + > > +enum DEVAPC_PD_OFFSET { > > + PD_VIO_MASK_OFFSET = 0x0, > > + PD_VIO_STA_OFFSET = 0x400, > > + PD_VIO_DBG0_OFFSET = 0x900, > > + PD_VIO_DBG1_OFFSET = 0x904, > > + PD_VIO_DBG2_OFFSET = 0x908, > > + PD_APC_CON_OFFSET = 0xF00, > > + PD_SHIFT_STA_OFFSET = 0xF20, > > + PD_SHIFT_SEL_OFFSET = 0xF30, > > + PD_SHIFT_CON_OFFSET = 0xF10, > > +}; > > + > > +#define SRAMROM_SLAVE_TYPE SLAVE_TYPE_INFRA /* Infra */ > > +#define MM2ND_SLAVE_TYPE SLAVE_TYPE_PERI /* Peri */ > > + > > +enum OTHER_TYPES_INDEX { > > + SRAMROM_VIO_INDEX = 367, > > + CONN_VIO_INDEX = 75, /* starts from 0x18 */ > > + MDP_VIO_INDEX = 292, > > + MMSYS_VIO_INDEX = 294, > > +}; > > + > > +enum INFRACFG_MM2ND_VIO_NUM { > > + INFRACFG_MM_VIO_STA_NUM = 2, > > + INFRACFG_MDP_VIO_STA_NUM = 8, > > +}; > > + > > +enum INFRACFG_MM2ND_OFFSET { > > + INFRACFG_MM_SEC_VIO0_OFFSET = 0xB30, > > + INFRACFG_MDP_SEC_VIO0_OFFSET = 0xB40, > > +}; > > + > > +struct INFRAAXI_ID_INFO { > > + const char *master; > > + u32 bus_id; > > + u32 mask; > > +}; > > + > > +/****************************************************************************** > > + * PLATFORM DEFINATION > > + ******************************************************************************/ > > + > > +/* For Infra VIO_DBG */ > > +#define INFRA_VIO_DBG_MSTID 0xFFFFFFFF > > +#define INFRA_VIO_DBG_MSTID_START_BIT 0 > > +#define INFRA_VIO_DBG_DMNID 0x0000003F > > +#define INFRA_VIO_DBG_DMNID_START_BIT 0 > > +#define INFRA_VIO_DBG_W_VIO 0x00000040 > > +#define INFRA_VIO_DBG_W_VIO_START_BIT 6 > > +#define INFRA_VIO_DBG_R_VIO 0x00000080 > > +#define INFRA_VIO_DBG_R_VIO_START_BIT 7 > > +#define INFRA_VIO_ADDR_HIGH 0x00000F00 > > +#define INFRA_VIO_ADDR_HIGH_START_BIT 8 > > + > > +/* For SRAMROM VIO */ > > +#define SRAMROM_SEC_VIO_ID_MASK 0x00FFFF00 > > +#define SRAMROM_SEC_VIO_ID_SHIFT 8 > > +#define SRAMROM_SEC_VIO_DOMAIN_MASK 0x0F000000 > > +#define SRAMROM_SEC_VIO_DOMAIN_SHIFT 24 > > +#define SRAMROM_SEC_VIO_RW_MASK 0x80000000 > > +#define SRAMROM_SEC_VIO_RW_SHIFT 31 > > + > > +/* For MM 2nd VIO */ > > +#define INFRACFG_MM2ND_VIO_DOMAIN_MASK 0x00000030 > > +#define INFRACFG_MM2ND_VIO_DOMAIN_SHIFT 4 > > +#define INFRACFG_MM2ND_VIO_ID_MASK 0x00FFFF00 > > +#define INFRACFG_MM2ND_VIO_ID_SHIFT 8 > > +#define INFRACFG_MM2ND_VIO_RW_MASK 0x01000000 > > +#define INFRACFG_MM2ND_VIO_RW_SHIFT 24 > > + > > +#endif /* __DEVAPC_MT6873_H__ */ > > diff --git a/drivers/soc/mediatek/devapc/devapc-mtk-multi-ao.c b/drivers/soc/mediatek/devapc/devapc-mtk-multi-ao.c > > new file mode 100644 > > index 0000000..6c4a8ec > > --- /dev/null > > +++ b/drivers/soc/mediatek/devapc/devapc-mtk-multi-ao.c > > @@ -0,0 +1,756 @@ > > +// SPDX-License-Identifier: GPL-2.0 > > +/* > > + * Copyright (C) 2020 MediaTek Inc. > > + */ > > + > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include "devapc-mtk-multi-ao.h" > > + > > +/* > > + * mtk_devapc_pd_get - get devapc pd_types of register address. > > + * > > + * Returns the value of reg addr > > + */ > > +static void __iomem *mtk_devapc_pd_get(struct mtk_devapc_context *devapc_ctx, > > + int slave_type, > > + enum DEVAPC_PD_REG_TYPE pd_reg_type, > > + u32 index) > > +{ > > + struct mtk_devapc_vio_info *vio_info = devapc_ctx->soc->vio_info; > > + u32 slave_type_num = devapc_ctx->soc->slave_type_num; > > + const u32 *devapc_pds = devapc_ctx->soc->devapc_pds; > > + void __iomem *reg; > > + > > + if (!devapc_pds) > > + return NULL; > > + > > + if ((slave_type < slave_type_num && > > + index < vio_info->vio_mask_sta_num[slave_type]) && > > + pd_reg_type < PD_REG_TYPE_NUM) { > > + reg = devapc_ctx->devapc_pd_base[slave_type] + > > + devapc_pds[pd_reg_type]; > > + > > + if (pd_reg_type == VIO_MASK || pd_reg_type == VIO_STA) > > + reg += 0x4 * index; > > + > > + } else { > > + pr_err(PFX "Out Of Boundary, slave_type:0x%x/pd_reg_type:0x%x/index:0x%x\n", > > + slave_type, pd_reg_type, index); > > + return NULL; > > + } > > + > > + return reg; > > +} > > + > > +/* > > + * sramrom_vio_handler - clean sramrom violation & print violation information > > + * for debugging. > > + */ > > +static void sramrom_vio_handler(struct mtk_devapc_context *devapc_ctx) > > +{ > > + const struct mtk_sramrom_sec_vio_desc *sramrom_vios; > > + struct mtk_devapc_vio_info *vio_info; > > + struct arm_smccc_res res; > > + size_t sramrom_vio_sta; > > + int sramrom_vio; > > + u32 rw; > > + > > + sramrom_vios = devapc_ctx->soc->sramrom_sec_vios; > > + vio_info = devapc_ctx->soc->vio_info; > > + > > + arm_smccc_smc(MTK_SIP_KERNEL_CLR_SRAMROM_VIO, > > + 0, 0, 0, 0, 0, 0, 0, &res); > > + > > + sramrom_vio = res.a0; > > + sramrom_vio_sta = res.a1; > > + vio_info->vio_addr = res.a2; > > + > > + if (sramrom_vio == SRAM_VIOLATION) > > + pr_info(PFX "SRAM violation is triggered\n"); > > + else if (sramrom_vio == ROM_VIOLATION) > > + pr_info(PFX "ROM violation is triggered\n"); > > + else > > + return; > > + > > + vio_info->master_id = (sramrom_vio_sta & sramrom_vios->vio_id_mask) > > + >> sramrom_vios->vio_id_shift; > > + vio_info->domain_id = (sramrom_vio_sta & sramrom_vios->vio_domain_mask) > > + >> sramrom_vios->vio_domain_shift; > > + rw = (sramrom_vio_sta & sramrom_vios->vio_rw_mask) >> > > + sramrom_vios->vio_rw_shift; > > + > > + if (rw) > > + vio_info->write = 1; > > + else > > + vio_info->read = 1; > > + > > + pr_info(PFX "%s: master_id:0x%x, domain_id:0x%x, rw:%s, vio_addr:0x%x\n", > > + __func__, vio_info->master_id, vio_info->domain_id, > > + rw ? "Write" : "Read", vio_info->vio_addr); > > +} > > + > > +static void mask_module_irq(struct mtk_devapc_context *devapc_ctx, > > + int slave_type, u32 module, bool mask) > > +{ > > + struct mtk_devapc_vio_info *vio_info = devapc_ctx->soc->vio_info; > > + u32 slave_type_num = devapc_ctx->soc->slave_type_num; > > + u32 apc_register_index; > > + u32 apc_set_index; > > + void __iomem *reg; > > + > > + apc_register_index = module / (MOD_NO_IN_1_DEVAPC * 2); > > + apc_set_index = module % (MOD_NO_IN_1_DEVAPC * 2); > > + > > + if (slave_type < slave_type_num && > > + apc_register_index < vio_info->vio_mask_sta_num[slave_type]) { > > + reg = mtk_devapc_pd_get(devapc_ctx, slave_type, VIO_MASK, > > + apc_register_index); > > + > > + if (mask) > > + writel(readl(reg) | (1 << apc_set_index), reg); > > + else > > + writel(readl(reg) & (~(1 << apc_set_index)), reg); > > + > > + } else { > > + pr_err(PFX "%s: Out Of Boundary, slave_type:0x%x, module_index:0x%x, mask:%s\n", > > + __func__, slave_type, module, mask ? "true" : "false"); > > + } > > +} > > + > > +static int check_vio_mask(struct mtk_devapc_context *devapc_ctx, int slave_type, > > + u32 module) > > +{ > > + struct mtk_devapc_vio_info *vio_info = devapc_ctx->soc->vio_info; > > + u32 slave_type_num = devapc_ctx->soc->slave_type_num; > > + u32 apc_register_index; > > + u32 apc_set_index; > > + void __iomem *reg; > > + > > + apc_register_index = module / (MOD_NO_IN_1_DEVAPC * 2); > > + apc_set_index = module % (MOD_NO_IN_1_DEVAPC * 2); > > + > > + if (slave_type < slave_type_num && > > + apc_register_index < vio_info->vio_mask_sta_num[slave_type]) > > + reg = mtk_devapc_pd_get(devapc_ctx, slave_type, VIO_MASK, > > + apc_register_index); > > + else > > + return -EOVERFLOW; > > + > > + if (readl(reg) & (0x1 << apc_set_index)) > > + return VIOLATION_MASKED; > > + > > + return 0; > > +} > > + > > +static int32_t check_vio_status(struct mtk_devapc_context *devapc_ctx, > > + int slave_type, u32 module) > > +{ > > + struct mtk_devapc_vio_info *vio_info = devapc_ctx->soc->vio_info; > > + u32 slave_type_num = devapc_ctx->soc->slave_type_num; > > + u32 apc_register_index; > > + u32 apc_set_index; > > + void __iomem *reg; > > + > > + apc_register_index = module / (MOD_NO_IN_1_DEVAPC * 2); > > + apc_set_index = module % (MOD_NO_IN_1_DEVAPC * 2); > > + > > + if (slave_type < slave_type_num && > > + apc_register_index < vio_info->vio_mask_sta_num[slave_type]) { > > + reg = mtk_devapc_pd_get(devapc_ctx, slave_type, VIO_STA, > > + apc_register_index); > > + > > + } else { > > + pr_err(PFX "%s: Out Of Boundary, slave_type:0x%x, module_index:0x%x\n", > > + __func__, slave_type, module); > > + return -EOVERFLOW; > > + } > > + > > + if (readl(reg) & (0x1 << apc_set_index)) > > + return VIOLATION_TRIGGERED; > > + > > + return 0; > > +} > > + > > +static int32_t clear_vio_status(struct mtk_devapc_context *devapc_ctx, > > + int slave_type, u32 module) > > +{ > > + struct mtk_devapc_vio_info *vio_info = devapc_ctx->soc->vio_info; > > + u32 slave_type_num = devapc_ctx->soc->slave_type_num; > > + u32 apc_register_index; > > + u32 apc_set_index; > > + void __iomem *reg; > > + > > + apc_register_index = module / (MOD_NO_IN_1_DEVAPC * 2); > > + apc_set_index = module % (MOD_NO_IN_1_DEVAPC * 2); > > + > > + if (slave_type < slave_type_num && > > + apc_register_index < vio_info->vio_mask_sta_num[slave_type]) { > > + reg = mtk_devapc_pd_get(devapc_ctx, slave_type, VIO_STA, > > + apc_register_index); > > + writel(0x1 << apc_set_index, reg); > > + > > + } else { > > + pr_err(PFX "%s: Out Of Boundary, slave_type:0x%x, module_index:0x%x\n", > > + __func__, slave_type, module); > > + return -EOVERFLOW; > > + } > > + > > + if (check_vio_status(devapc_ctx, slave_type, module)) > > + return -EIO; > > + > > + return 0; > > +} > > + > > +static void devapc_vio_info_print(struct mtk_devapc_context *devapc_ctx) > > +{ > > + struct mtk_devapc_vio_info *vio_info; > > + > > + vio_info = devapc_ctx->soc->vio_info; > > + > > + /* Print violation information */ > > + if (vio_info->write) > > + pr_info(PFX "Write Violation\n"); > > + else if (vio_info->read) > > + pr_info(PFX "Read Violation\n"); > > + > > + pr_info(PFX "%s%x, %s%x, %s%x, %s%x\n", > > + "Vio Addr:0x", vio_info->vio_addr, > > + "High:0x", vio_info->vio_addr_high, > > + "Bus ID:0x", vio_info->master_id, > > + "Dom ID:0x", vio_info->domain_id); > > +} > > + > > +/* > > + * check_type2_vio_status - there are type 2 slaves which violation information > > + * is stored in different register bank. > > + * > > + * Returns true if type2 violation is triggered. > > + */ > > +static bool check_type2_vio_status(struct mtk_devapc_context *devapc_ctx, > > + int slave_type, int *vio_idx, int *index) > > +{ > > + u32 sramrom_vio_idx, mdp_vio_idx, disp2_vio_idx, mmsys_vio_idx; > > + const struct mtk_device_info **device_info; > > + const struct mtk_device_num *ndevices; > > + int sramrom_slv_type, mm2nd_slv_type; > > + bool mdp_vio, disp2_vio, mmsys_vio; > > + int i; > > + > > + sramrom_slv_type = devapc_ctx->soc->vio_info->sramrom_slv_type; > > + sramrom_vio_idx = devapc_ctx->soc->vio_info->sramrom_vio_idx; > > + > > + mm2nd_slv_type = devapc_ctx->soc->vio_info->mm2nd_slv_type; > > + mdp_vio_idx = devapc_ctx->soc->vio_info->mdp_vio_idx; > > + disp2_vio_idx = devapc_ctx->soc->vio_info->disp2_vio_idx; > > + mmsys_vio_idx = devapc_ctx->soc->vio_info->mmsys_vio_idx; > > + > > + device_info = devapc_ctx->soc->device_info; > > + ndevices = devapc_ctx->soc->ndevices; > > + > > + /* check SRAMROM violation */ > > + if (slave_type == sramrom_slv_type && > > + check_vio_status(devapc_ctx, slave_type, sramrom_vio_idx)) { > > + pr_info(PFX "SRAMROM violation is triggered\n"); > > + sramrom_vio_handler(devapc_ctx); > > + > > + *vio_idx = sramrom_vio_idx; > > + for (i = 0; i < ndevices[slave_type].vio_slave_num; i++) { > > + if (device_info[slave_type][i].vio_index == *vio_idx) > > + *index = i; > > + } > > + > > + return true; > > + } > > + > > + /* check MM 2nd level violation */ > > + if (slave_type == mm2nd_slv_type) { > > + mdp_vio = check_vio_status(devapc_ctx, slave_type, > > + mdp_vio_idx) == > > + VIOLATION_TRIGGERED; > > + disp2_vio = check_vio_status(devapc_ctx, slave_type, > > + disp2_vio_idx) == > > + VIOLATION_TRIGGERED; > > + mmsys_vio = check_vio_status(devapc_ctx, slave_type, > > + mmsys_vio_idx) == > > + VIOLATION_TRIGGERED; > > + > > + if (mdp_vio || disp2_vio || mmsys_vio) { > > + pr_info(PFX "MM2nd violation is triggered\n"); > > + devapc_ctx->soc->mm2nd_vio_handler > > + (devapc_ctx->infracfg_base, > > + devapc_ctx->soc->vio_info, > > + mdp_vio, > > + disp2_vio, > > + mmsys_vio); > > + } else { > > + return false; > > + } > > + > > + if (mdp_vio) > > + *vio_idx = mdp_vio_idx; > > + else if (disp2_vio) > > + *vio_idx = disp2_vio_idx; > > + else if (mmsys_vio) > > + *vio_idx = mmsys_vio_idx; > > + > > + for (i = 0; i < ndevices[slave_type].vio_slave_num; i++) { > > + if (device_info[slave_type][i].vio_index == *vio_idx) > > + *index = i; > > + } > > + > > + devapc_vio_info_print(devapc_ctx); > > + return true; > > + } > > + > > + return false; > > +} > > + > > +/* > > + * sync_vio_dbg - start to get violation information by selecting violation > > + * group and enable violation shift. > > + * > > + * Returns sync done or not > > + */ > > +static u32 sync_vio_dbg(struct mtk_devapc_context *devapc_ctx, int slave_type, > > + u32 shift_bit) > > +{ > > + u32 slave_type_num = devapc_ctx->soc->slave_type_num; > > + void __iomem *pd_vio_shift_sta_reg; > > + void __iomem *pd_vio_shift_sel_reg; > > + void __iomem *pd_vio_shift_con_reg; > > + u32 shift_count; > > + u32 sync_done; > > + > > + if (slave_type >= slave_type_num || > > + shift_bit >= (MOD_NO_IN_1_DEVAPC * 2)) { > > + pr_err(PFX "param check failed, slave_type:0x%x, shift_bit:0x%x\n", > > + slave_type, shift_bit); > > + return 0; > > + } > > + > > + pd_vio_shift_sta_reg = mtk_devapc_pd_get(devapc_ctx, slave_type, > > + VIO_SHIFT_STA, 0); > > + pd_vio_shift_sel_reg = mtk_devapc_pd_get(devapc_ctx, slave_type, > > + VIO_SHIFT_SEL, 0); > > + pd_vio_shift_con_reg = mtk_devapc_pd_get(devapc_ctx, slave_type, > > + VIO_SHIFT_CON, 0); > > + > > + writel(0x1 << shift_bit, pd_vio_shift_sel_reg); > > + writel(0x1, pd_vio_shift_con_reg); > > + > > + for (shift_count = 0; (shift_count < 100) && > > + ((readl(pd_vio_shift_con_reg) & 0x3) != 0x3); > > + ++shift_count) > > + ; > > + > > + if ((readl(pd_vio_shift_con_reg) & 0x3) == 0x3) > > + sync_done = 1; > > + else > > + sync_done = 0; > > + > > + /* Disable shift mechanism */ > > + writel(0x0, pd_vio_shift_con_reg); > > + writel(0x0, pd_vio_shift_sel_reg); > > + writel(0x1 << shift_bit, pd_vio_shift_sta_reg); > > + > > + return sync_done; > > +} > > + > > +static const char * const perm_to_str[] = { > > + "NO_PROTECTION", > > + "SECURE_RW_ONLY", > > + "SECURE_RW_NS_R_ONLY", > > + "FORBIDDEN", > > + "NO_PERM_CTRL" > > +}; > > + > > +static const char *perm_to_string(u8 perm) > > +{ > > + if (perm < PERM_TYPE_NUM) > > + return perm_to_str[perm]; > > + else > > + return perm_to_str[PERM_TYPE_NUM]; > > +} > > + > > +static void devapc_vio_reason(u8 perm) > > +{ > > + pr_info(PFX "Permission setting: %s\n", perm_to_string(perm)); > > + > > + if (perm == NO_PROTECTION || perm >= PERM_TYPE_NUM) > > + pr_info(PFX "Reason: power/clock is not enabled\n"); > > + else if (perm == SEC_RW_ONLY || > > + perm == SEC_RW_NS_R || > > + perm == FORBIDDEN) > > + pr_info(PFX "Reason: might be permission denied\n"); > > +} > > + > > +/* > > + * get_permission - get slave's access permission of domain id. > > + * > > + * Returns the value of access permission > > + */ > > +static u8 get_permission(struct mtk_devapc_context *devapc_ctx, int slave_type, > > + int module_index, int domain) > > +{ > > + u32 slave_type_num = devapc_ctx->soc->slave_type_num; > > + const struct mtk_device_info **device_info; > > + const struct mtk_device_num *ndevices; > > + int sys_index, ctrl_index, vio_index; > > + struct arm_smccc_res res; > > + u32 ret, apc_set_index; > > + > > + ndevices = devapc_ctx->soc->ndevices; > > + > > + if (slave_type >= slave_type_num || > > + module_index >= ndevices[slave_type].vio_slave_num) { > > + pr_err(PFX "%s: param check failed, slave_type:0x%x, module_index:0x%x\n", > > + __func__, slave_type, module_index); > > + return 0xFF; > > + } > > + > > + device_info = devapc_ctx->soc->device_info; > > + > > + sys_index = device_info[slave_type][module_index].sys_index; > > + ctrl_index = device_info[slave_type][module_index].ctrl_index; > > + vio_index = device_info[slave_type][module_index].vio_index; > > + > > + if (sys_index == -1 || ctrl_index == -1) > > + return 0xFF; > > + > > + arm_smccc_smc(MTK_SIP_KERNEL_DAPC_PERM_GET, slave_type, sys_index, > > + domain, ctrl_index, vio_index, 0, 0, &res); > > + ret = res.a0; > > + > > + if (ret == DEAD) { > > + pr_err(PFX "permission get failed, ret:0x%x\n", ret); > > + return 0xFF; > > + } > > + > > + apc_set_index = ctrl_index % MOD_NO_IN_1_DEVAPC; > > + ret = (ret & (0x3 << (apc_set_index * 2))) >> (apc_set_index * 2); > > + > > + return (ret & 0x3); > > +} > > + > > +/* > > + * mtk_devapc_vio_check - check violation shift status is raised or not. > > + * > > + * Returns the value of violation shift status reg > > + */ > > +static void mtk_devapc_vio_check(struct mtk_devapc_context *devapc_ctx, > > + int slave_type, int *shift_bit) > > +{ > > + struct mtk_devapc_vio_info *vio_info; > > + u32 vio_shift_sta; > > + int i; > > + > > + vio_info = devapc_ctx->soc->vio_info; > > + vio_shift_sta = readl(mtk_devapc_pd_get(devapc_ctx, slave_type, > > + VIO_SHIFT_STA, 0)); > > + > > + if (!vio_shift_sta) { > > + pr_info(PFX "violation is triggered before. shift_bit:0x%x\n", > > + *shift_bit); > > + > > + } else if (vio_shift_sta & (0x1UL << *shift_bit)) { > > + pr_debug(PFX "vio_shift_sta:0x%x is matched with shift_bit:%d\n", > > + vio_shift_sta, *shift_bit); > > + > > + } else { > > + pr_info(PFX "vio_shift_sta:0x%x is not matched with shift_bit:%d\n", > > + vio_shift_sta, *shift_bit); > > + > > + for (i = 0; i < MOD_NO_IN_1_DEVAPC * 2; i++) { > > + if (vio_shift_sta & (0x1 << i)) { > > + *shift_bit = i; > > + break; > > + } > > + } > > + } > > + > > + vio_info->shift_sta_bit = *shift_bit; > > +} > > + > > +static void devapc_extract_vio_dbg(struct mtk_devapc_context *devapc_ctx, > > + int slave_type) > > +{ > > + void __iomem *vio_dbg0_reg, *vio_dbg1_reg, *vio_dbg2_reg; > > + const struct mtk_infra_vio_dbg_desc *vio_dbgs; > > + struct mtk_devapc_vio_info *vio_info; > > + u32 dbg0; > > + > > + vio_dbg0_reg = mtk_devapc_pd_get(devapc_ctx, slave_type, VIO_DBG0, 0); > > + vio_dbg1_reg = mtk_devapc_pd_get(devapc_ctx, slave_type, VIO_DBG1, 0); > > + vio_dbg2_reg = mtk_devapc_pd_get(devapc_ctx, slave_type, VIO_DBG2, 0); > > + > > + vio_dbgs = devapc_ctx->soc->vio_dbgs; > > + vio_info = devapc_ctx->soc->vio_info; > > + > > + /* Extract violation information */ > > + dbg0 = readl(vio_dbg0_reg); > > + vio_info->master_id = readl(vio_dbg1_reg); > > + vio_info->vio_addr = readl(vio_dbg2_reg); > > + > > + vio_info->domain_id = (dbg0 & vio_dbgs->vio_dbg_dmnid) > > + >> vio_dbgs->vio_dbg_dmnid_start_bit; > > + vio_info->write = ((dbg0 & vio_dbgs->vio_dbg_w_vio) > > + >> vio_dbgs->vio_dbg_w_vio_start_bit) == 1; > > + vio_info->read = ((dbg0 & vio_dbgs->vio_dbg_r_vio) > > + >> vio_dbgs->vio_dbg_r_vio_start_bit) == 1; > > + vio_info->vio_addr_high = (dbg0 & vio_dbgs->vio_addr_high) > > + >> vio_dbgs->vio_addr_high_start_bit; > > + > > + devapc_vio_info_print(devapc_ctx); > > +} > > + > > +/* > > + * mtk_devapc_dump_vio_dbg - shift & dump the violation debug information. > > + */ > > +static bool mtk_devapc_dump_vio_dbg(struct mtk_devapc_context *devapc_ctx, > > + int slave_type, int *vio_idx, int *index) > > +{ > > + const struct mtk_device_info **device_info; > > + const struct mtk_device_num *ndevices; > > + void __iomem *pd_vio_shift_sta_reg; > > + u32 shift_bit; > > + int i; > > + > > + if (!vio_idx) > > + return NULL; > > + > > + device_info = devapc_ctx->soc->device_info; > > + ndevices = devapc_ctx->soc->ndevices; > > + > > + pd_vio_shift_sta_reg = mtk_devapc_pd_get(devapc_ctx, slave_type, > > + VIO_SHIFT_STA, 0); > > + > > + for (i = 0; i < ndevices[slave_type].vio_slave_num; i++) { > > + *vio_idx = device_info[slave_type][i].vio_index; > > + > > + if (check_vio_mask(devapc_ctx, slave_type, *vio_idx)) > > + continue; > > + > > + if (check_vio_status(devapc_ctx, slave_type, *vio_idx) != > > + VIOLATION_TRIGGERED) > > + continue; > > + > > + shift_bit = devapc_ctx->soc->shift_group_get(slave_type, > > + *vio_idx); > > + > > + mtk_devapc_vio_check(devapc_ctx, slave_type, &shift_bit); > > + > > + if (!sync_vio_dbg(devapc_ctx, slave_type, shift_bit)) > > + continue; > > + > > + devapc_extract_vio_dbg(devapc_ctx, slave_type); > > + *index = i; > > + > > + return true; > > + } > > + > > + return false; > > +} > > + > > +/* > > + * start_devapc - initialize devapc status and start receiving interrupt > > + * while devapc violation is triggered. > > + */ > > +static void start_devapc(struct mtk_devapc_context *devapc_ctx) > > +{ > > + u32 slave_type_num = devapc_ctx->soc->slave_type_num; > > + const struct mtk_device_info **device_info; > > + const struct mtk_device_num *ndevices; > > + void __iomem *pd_vio_shift_sta_reg; > > + void __iomem *pd_apc_con_reg; > > + int slave_type, i, vio_idx, index; > > + u32 vio_shift_sta; > > + > > + ndevices = devapc_ctx->soc->ndevices; > > + > > + device_info = devapc_ctx->soc->device_info; > > + > > + for (slave_type = 0; slave_type < slave_type_num; slave_type++) { > > + pd_apc_con_reg = mtk_devapc_pd_get(devapc_ctx, slave_type, > > + APC_CON, 0); > > + pd_vio_shift_sta_reg = mtk_devapc_pd_get(devapc_ctx, slave_type, > > + VIO_SHIFT_STA, 0); > > + > > + if (!pd_apc_con_reg || !pd_vio_shift_sta_reg || !device_info) > > + return; > > + > > + /* Clear DEVAPC violation status */ > > + writel(BIT(31), pd_apc_con_reg); > > + > > + /* Clear violation shift status */ > > + vio_shift_sta = readl(pd_vio_shift_sta_reg); > > + if (vio_shift_sta) > > + writel(vio_shift_sta, pd_vio_shift_sta_reg); > > + > > + /* Clear type 2 violation status */ > > + check_type2_vio_status(devapc_ctx, slave_type, &vio_idx, &i); > > + > > + /* Clear violation status */ > > + for (i = 0; i < ndevices[slave_type].vio_slave_num; i++) { > > + vio_idx = device_info[slave_type][i].vio_index; > > + if ((check_vio_status(devapc_ctx, slave_type, vio_idx) > > + == VIOLATION_TRIGGERED) && > > + clear_vio_status(devapc_ctx, slave_type, > > + vio_idx)) { > > + pr_warn(PFX "Clear vio status failed, slave_type:0x%x, vio_index:0x%x\n", > > + slave_type, vio_idx); > > + > > + index = i; > > + mtk_devapc_dump_vio_dbg(devapc_ctx, slave_type, > > + &vio_idx, &index); > > + i = index - 1; > > + } > > + > > + mask_module_irq(devapc_ctx, slave_type, vio_idx, false); > > + } > > + } > > +} > > + > > +static DEFINE_SPINLOCK(devapc_lock); > > + > > +/* > > + * devapc_violation_irq - the devapc Interrupt Service Routine (ISR) will dump > > + * violation information including which master violates > > + * access slave. > > + */ > > +static irqreturn_t devapc_violation_irq(int irq_number, > > + struct mtk_devapc_context *devapc_ctx) > > +{ > > + u32 slave_type_num = devapc_ctx->soc->slave_type_num; > > + const struct mtk_device_info **device_info; > > + struct mtk_devapc_vio_info *vio_info; > > + int slave_type, vio_idx, index; > > + const char *vio_master; > > + unsigned long flags; > > + u8 perm; > > + > > + spin_lock_irqsave(&devapc_lock, flags); > > + > > + device_info = devapc_ctx->soc->device_info; > > + vio_info = devapc_ctx->soc->vio_info; > > + vio_idx = -1; > > + index = -1; > > + > > + /* There are multiple DEVAPC_PD */ > > + for (slave_type = 0; slave_type < slave_type_num; slave_type++) { > > + if (!check_type2_vio_status(devapc_ctx, slave_type, &vio_idx, > > + &index)) > > + if (!mtk_devapc_dump_vio_dbg(devapc_ctx, slave_type, > > + &vio_idx, &index)) > > + continue; > > + > > + /* Ensure that violation info are written before > > + * further operations > > + */ > > + smp_mb(); > > + > > + mask_module_irq(devapc_ctx, slave_type, vio_idx, true); > > + > > + clear_vio_status(devapc_ctx, slave_type, vio_idx); > > + > > + perm = get_permission(devapc_ctx, slave_type, index, > > + vio_info->domain_id); > > + > > + vio_master = devapc_ctx->soc->master_get > > + (vio_info->master_id, > > + vio_info->vio_addr, > > + slave_type, > > + vio_info->shift_sta_bit, > > + vio_info->domain_id); > > + > > + if (!vio_master) > > + vio_master = "UNKNOWN_MASTER"; > > + > > + pr_info(PFX "Violation - slave_type:0x%x, sys_index:0x%x, ctrl_index:0x%x, vio_index:0x%x\n", > > + slave_type, > > + device_info[slave_type][index].sys_index, > > + device_info[slave_type][index].ctrl_index, > > + device_info[slave_type][index].vio_index); > > + > > + pr_info(PFX "Violation Master: %s\n", vio_master); > > + > > + devapc_vio_reason(perm); > > + > > + mask_module_irq(devapc_ctx, slave_type, vio_idx, false); > > + } > > + > > + spin_unlock_irqrestore(&devapc_lock, flags); > > + return IRQ_HANDLED; > > +} > > + > > +int mtk_devapc_probe(struct platform_device *pdev, struct mtk_devapc_soc *soc) > > +{ > > + struct device_node *node = pdev->dev.of_node; > > + struct mtk_devapc_context *devapc_ctx; > > + u32 slave_type_num; > > + int slave_type; > > + int ret; > > + > > + if (IS_ERR(node)) > > + return -ENODEV; > > + > > + devapc_ctx = devm_kzalloc(&pdev->dev, sizeof(struct mtk_devapc_context), > > + GFP_KERNEL); > > + if (!devapc_ctx) > > + return -ENOMEM; > > + > > + devapc_ctx->soc = soc; > > + slave_type_num = devapc_ctx->soc->slave_type_num; > > + > > + for (slave_type = 0; slave_type < slave_type_num; slave_type++) { > > + devapc_ctx->devapc_pd_base[slave_type] = > > + of_iomap(node, slave_type); > > + if (!devapc_ctx->devapc_pd_base[slave_type]) > > + return -EINVAL; > > + } > > + > > + devapc_ctx->infracfg_base = of_iomap(node, slave_type_num + 1); > > + if (!devapc_ctx->infracfg_base) > > + return -EINVAL; > > + > > + devapc_ctx->devapc_irq = irq_of_parse_and_map(node, 0); > > + if (!devapc_ctx->devapc_irq) > > + return -EINVAL; > > + > > + /* CCF (Common Clock Framework) */ > > + devapc_ctx->devapc_infra_clk = devm_clk_get(&pdev->dev, > > + "devapc-infra-clock"); > > + > > + if (IS_ERR(devapc_ctx->devapc_infra_clk)) > > + return -EINVAL; > > + > > + if (clk_prepare_enable(devapc_ctx->devapc_infra_clk)) > > + return -EINVAL; > > + > > + start_devapc(devapc_ctx); > > + > > + ret = devm_request_irq(&pdev->dev, devapc_ctx->devapc_irq, > > + (irq_handler_t)devapc_violation_irq, > > + IRQF_TRIGGER_NONE, "devapc", devapc_ctx); > > + if (ret) > > + return ret; > > + > > + return 0; > > +} > > + > > +int mtk_devapc_remove(struct platform_device *dev) > > +{ > > + return 0; > > +} > > + > > +MODULE_DESCRIPTION("Mediatek Device APC Driver"); > > +MODULE_AUTHOR("Neal Liu "); > > +MODULE_LICENSE("GPL"); > > diff --git a/drivers/soc/mediatek/devapc/devapc-mtk-multi-ao.h b/drivers/soc/mediatek/devapc/devapc-mtk-multi-ao.h > > new file mode 100644 > > index 0000000..1e58a3e > > --- /dev/null > > +++ b/drivers/soc/mediatek/devapc/devapc-mtk-multi-ao.h > > @@ -0,0 +1,182 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +/* > > + * Copyright (C) 2020 MediaTek Inc. > > + */ > > + > > +#ifndef __DEVAPC_MTK_MULTI_AO_H__ > > +#define __DEVAPC_MTK_MULTI_AO_H__ > > + > > +#include > > +#include > > + > > +/****************************************************************************** > > + * VARIABLE DEFINATION > > + ******************************************************************************/ > > +#define MOD_NO_IN_1_DEVAPC 16 > > +#define VIOLATION_TRIGGERED 1 > > +#define VIOLATION_MASKED 1 > > +#define DEAD 0xdeadbeaf > > +#define PFX "[DEVAPC]: " > > +#define SLAVE_TYPE_NUM_MAX 5 > > + > > +#define devapc_log(p, s, fmt, args...) \ > > + do { \ > > + typeof(p) (_p) = (p); \ > > + ((_p) += scnprintf(_p, sizeof(s) - strlen(s), fmt, ##args)); \ > > + } while (0) > > + > > +#define UNUSED(x) (void)(x) > > + > > +/****************************************************************************** > > + * DATA STRUCTURE & FUNCTION DEFINATION > > + ******************************************************************************/ > > +enum DEVAPC_PD_REG_TYPE { > > + VIO_MASK = 0, > > + VIO_STA, > > + VIO_DBG0, > > + VIO_DBG1, > > + VIO_DBG2, > > + APC_CON, > > + VIO_SHIFT_STA, > > + VIO_SHIFT_SEL, > > + VIO_SHIFT_CON, > > + PD_REG_TYPE_NUM, > > +}; > > + > > +enum DEVAPC_UT_CMD { > > + DEVAPC_UT_DAPC_VIO = 1, > > + DEVAPC_UT_SRAM_VIO, > > +}; > > + > > +enum DEVAPC_DOM_ID { > > + DOMAIN_0 = 0, > > + DOMAIN_1, > > + DOMAIN_2, > > + DOMAIN_3, > > + DOMAIN_4, > > + DOMAIN_5, > > + DOMAIN_6, > > + DOMAIN_7, > > + DOMAIN_8, > > + DOMAIN_9, > > + DOMAIN_10, > > + DOMAIN_11, > > + DOMAIN_12, > > + DOMAIN_13, > > + DOMAIN_14, > > + DOMAIN_15, > > + DOMAIN_OTHERS, > > +}; > > + > > +enum SRAMROM_VIO { > > + ROM_VIOLATION = 0, > > + SRAM_VIOLATION, > > +}; > > + > > +enum DEVAPC_PERM_TYPE { > > + NO_PROTECTION = 0, > > + SEC_RW_ONLY, > > + SEC_RW_NS_R, > > + FORBIDDEN, > > + PERM_TYPE_NUM, > > +}; > > + > > +struct mtk_devapc_dbg_status { > > + bool enable_ut; > > + bool enable_dapc; /* dump APC */ > > +}; > > + > > +struct mtk_device_info { > > + int sys_index; > > + int ctrl_index; > > + int vio_index; > > +}; > > + > > +struct mtk_device_num { > > + int slave_type; > > + u32 vio_slave_num; > > +}; > > + > > +struct mtk_devapc_vio_info { > > + bool read; > > + bool write; > > + u32 vio_addr; > > + u32 vio_addr_high; > > + u32 master_id; > > + u32 domain_id; > > + int *vio_mask_sta_num; > > + int sramrom_slv_type; > > + int sramrom_vio_idx; > > + int mm2nd_slv_type; > > + int mdp_vio_idx; > > + int disp2_vio_idx; > > + int mmsys_vio_idx; > > + int shift_sta_bit; > > +}; > > + > > +struct mtk_infra_vio_dbg_desc { > > + u32 vio_dbg_mstid; > > + u8 vio_dbg_mstid_start_bit; > > + u32 vio_dbg_dmnid; > > + u8 vio_dbg_dmnid_start_bit; > > + u32 vio_dbg_w_vio; > > + u8 vio_dbg_w_vio_start_bit; > > + u32 vio_dbg_r_vio; > > + u8 vio_dbg_r_vio_start_bit; > > + u32 vio_addr_high; > > + u8 vio_addr_high_start_bit; > > +}; > > + > > +struct mtk_sramrom_sec_vio_desc { > > + u32 vio_id_mask; > > + u8 vio_id_shift; > > + u32 vio_domain_mask; > > + u8 vio_domain_shift; > > + u32 vio_rw_mask; > > + u8 vio_rw_shift; > > +}; > > + > > +struct mtk_devapc_pd_desc { > > + u32 pd_vio_mask_offset; > > + u32 pd_vio_sta_offset; > > + u32 pd_vio_dbg0_offset; > > + u32 pd_vio_dbg1_offset; > > + u32 pd_apc_con_offset; > > + u32 pd_shift_sta_offset; > > + u32 pd_shift_sel_offset; > > + u32 pd_shift_con_offset; > > +}; > > + > > +struct mtk_devapc_soc { > > + struct mtk_devapc_dbg_status *dbg_stat; > > + const char * const *slave_type_arr; > > + u32 slave_type_num; > > + const struct mtk_device_info *device_info[SLAVE_TYPE_NUM_MAX]; > > + const struct mtk_device_num *ndevices; > > + struct mtk_devapc_vio_info *vio_info; > > + const struct mtk_infra_vio_dbg_desc *vio_dbgs; > > + const struct mtk_sramrom_sec_vio_desc *sramrom_sec_vios; > > + const u32 *devapc_pds; > > + > > + /* platform specific operations */ > > + const char* (*master_get)(u32 bus_id, u32 vio_addr, > > + int slave_type, int shift_sta_bit, > > + int domain); > > + void (*mm2nd_vio_handler)(void __iomem *infracfg, > > + struct mtk_devapc_vio_info *vio_info, > > + bool mdp_vio, bool disp2_vio, bool mmsys_vio); > > + u32 (*shift_group_get)(int slave_type, u32 vio_index); > > +}; > > + > > +struct mtk_devapc_context { > > + struct clk *devapc_infra_clk; > > + u32 devapc_irq; > > + void __iomem *devapc_pd_base[4]; > > + void __iomem *infracfg_base; > > + struct mtk_devapc_soc *soc; > > +}; > > + > > +int mtk_devapc_probe(struct platform_device *pdev, struct mtk_devapc_soc *soc); > > +int mtk_devapc_remove(struct platform_device *dev); > > + > > +#endif /* __DEVAPC_MTK_MULTI_AO_H__ */ > > _______________________________________________ Linux-mediatek mailing list Linux-mediatek@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-mediatek