Patch Details
Series:drm/i915/tgl+: Fix Combo PHY DPLL fractional divider for 38.4MHz ref clock
URL:https://patchwork.freedesktop.org/series/79486/
State:success
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18165/index.html

CI Bug Log - changes from CI_DRM_8747_full -> Patchwork_18165_full

Summary

SUCCESS

No regressions found.

Known issues

Here are the changes found in Patchwork_18165_full that come from known issues:

IGT changes

Issues hit

Possible fixes

Warnings

Participating hosts (9 -> 9)

No changes in participating hosts

Build changes

CI-20190529: 20190529
CI_DRM_8747: f778a4bc7c6d0314c8a007e792313f5cbd549566 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5735: 21f8204e54c122e4a0f8ca4b59e4b2db8d1ba687 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18165: 15a59fd3625e65744f412456887d5af33389b393 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit