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From: K <1887854@bugs.launchpad.net>
To: qemu-devel@nongnu.org
Subject: [Bug 1887854] Re: Spurious Data Abort on qemu-system-aarch64
Date: Mon, 20 Jul 2020 11:41:35 -0000	[thread overview]
Message-ID: <159524529510.12761.8229043582980359818.malone@gac.canonical.com> (raw)
In-Reply-To: 159492817809.19148.14056725236873205625.malonedeb@chaenomeles.canonical.com

An update for anyone interested: I didn't remember seeing the leading
0x10 because the values are correct when retrieved from memory. They get
packed into a structure that gets returned in a single register, so the
0x10 second element ends up in the upper 4 bytes of x0 which is provided
as the first argument to strcmp. strcmp doesn't appear to clear the
upper bytes of x0 in ilp32 mode before using it to access memory. This
issue is actually either a GCC codegen problem or a multilib selection
problem in the build environment.

Also of note, GDB prints the full 64bit address when printing $w0
instead of the lower 4 bytes, but I don't think that's a Qemu bug
either.

-- 
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https://bugs.launchpad.net/bugs/1887854

Title:
  Spurious Data Abort on qemu-system-aarch64

Status in QEMU:
  Invalid

Bug description:
  When running RTEMS test psxndbm01.exe built for AArch64-ilp32 (this code is not yet publically available), the test generates a spurious data abort (the MMU and alignment checks should be disabled according to bits 1, 0 of SCTLR_EL1). The abort information is as follows:
  Taking exception 4 [Data Abort]
  ...from EL1 to EL1
  ...with ESR 0x25/0x96000010
  ...with FAR 0x104010ca28
  ...with ELR 0x400195d8
  ...to EL1 PC 0x40018200 PSTATE 0x3c5

  The ESR indicates that a synchronous external abort has occurred.
  ESR EC field: 0b100101

  From the ARMv8 technical manual: Data Abort taken without a change in
  Exception level. Used for MMU faults generated by data accesses,
  alignment faults other than those caused by Stack Pointer
  misalignment, and synchronous External aborts, including synchronous
  parity or ECC errors. Not used for debug related exceptions.

  ESR ISS field: 0b10000

  From the ARMv8 technical manual: Synchronous External abort, not on
  translation table walk or hardware update of translation table.

  The following command line is used to invoke qemu:
  qemu-system-aarch64 -machine virt -cpu cortex-a53 -m 256M -no-reboot -nographic -serial mon:stdio -kernel build/aarch64/a53_ilp32_qemu/testsuites/psxtests/psxndbm01.exe -D qemu.log -d in_asm,int,cpu_reset,unimp,guest_errors

  This occurs on Qemu 3.1.0 as distributed via Debian and on Qemu 4.1 as
  built by the RTEMS source builder (4.1+minor patches).

  Edit: This bug can be worked around by getting and setting SCTLR
  without changing its value before each data abort would occur. This
  test needs 6 of these workarounds to operate successfully.

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1887854/+subscriptions


      parent reply	other threads:[~2020-07-20 11:51 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-16 19:36 [Bug 1887854] [NEW] Spurious Data Abort on qemu-system-aarch64 K
2020-07-16 19:58 ` [Bug 1887854] " K
2020-07-16 20:18 ` Peter Maydell
2020-07-17 11:50 ` K
2020-07-17 12:32 ` Peter Maydell
2020-07-17 12:56 ` K
2020-07-20 11:41 ` K [this message]

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