From: Dhananjay Phadke <dphadke@linux.microsoft.com>
To: ray.jui@broadcom.com
Cc: bcm-kernel-feedback-list@broadcom.com,
dphadke@linux.microsoft.com, linux-i2c@vger.kernel.org,
linux-kernel@vger.kernel.org, rayagonda.kokatanur@broadcom.com,
rjui@broadcom.com, wsa@kernel.org
Subject: Re: [PATCH] i2c: iproc: fix race between client unreg and isr
Date: Mon, 27 Jul 2020 10:38:28 -0700 [thread overview]
Message-ID: <1595871508-28566-1-git-send-email-dphadke@linux.microsoft.com> (raw)
In-Reply-To: <4cf12c92-889d-ffbf-f8de-c1e08cfb8ce9@broadcom.com>
Ray Jui <ray.jui@broadcom.com> wrote:
>>> I think the following sequence needs to be implemented to make this
>>> safe, i.e., after 'synchronize_irq', no further slave interrupt will be
>>> fired.
>>>
>>> In 'bcm_iproc_i2c_unreg_slave':
>>>
>>> 1. Set an atomic variable 'unreg_slave' (I'm bad in names so please come
>>> up with a better name than this)
>>>
>>> 2. Disable all slave interrupts
>>>
>>> 3. synchronize_irq
>>>
>>> 4. Set slave to NULL
>>>
>>> 5. Erase slave addresses
>>
>> What about this in unreg_slave?
>>
>> 1. disable_irq()
>> This includes synchronize_irq() and avoids the race. Because irq
>> will be masked at interrupt controller level, interrupts coming
>> in at the I2C IP core level should still be pending once we
>> reenable the irq.
>>
>
> Can you confirm that even if we have irq pending at the i2c IP core
> level, as long as we execute Step 2. below (to disable/mask all slave
> interrupts), after 'enable_irq' is called, we still will not receive any
> further i2c slave interrupt?
>
> Basically I'm asking if interrupts will be "cached" at the GIC
> controller level after 'disable_irq' is called. As long as that is not
> the case, then I think we are good.
>
> The goal of course is to ensure there's no further slave interrupts
> after 'enable_irq' in Step 3 below.
That was my question as well, the best would be if the i2c controller itself
has a bit for masking all interrupts overriding individual event enables
set by the ISR.
Also with regards to the original sequence, I think slave address should
be erased before enable_irq(), besides draining rx and tx FIFOs.
I'll send reworked patch.
@Rayagonda will validate new sequence with the test that hit the race condition.
- Dhananjay
next prev parent reply other threads:[~2020-07-27 17:38 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-18 23:39 [PATCH] i2c: iproc: fix race between client unreg and isr Dhananjay Phadke
2020-07-19 7:59 ` Rayagonda Kokatanur
2020-07-20 17:40 ` Scott Branden
2020-07-20 17:49 ` Ray Jui
2020-07-22 10:41 ` Wolfram Sang
2020-07-22 15:51 ` Ray Jui
2020-07-22 16:55 ` Ray Jui
2020-07-23 0:58 ` Dhananjay Phadke
2020-07-25 10:18 ` Wolfram Sang
2020-07-27 4:32 ` Rayagonda Kokatanur
2020-07-27 15:42 ` Ray Jui
2020-07-27 17:38 ` Dhananjay Phadke [this message]
2020-07-27 18:13 ` Wolfram Sang
2020-07-27 20:26 ` Wolfram Sang
2020-07-27 20:43 ` Ray Jui
2020-08-05 9:17 ` Wolfram Sang
2020-08-07 16:40 ` Ray Jui
2020-08-07 17:38 ` Dhananjay Phadke
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