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From: Stephen Boyd <swboyd@chromium.org>
To: Maulik Shah <mkshah@codeaurora.org>,
	bjorn.andersson@linaro.org, evgreen@chromium.org,
	linus.walleij@linaro.org, maz@kernel.org, mka@chromium.org
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-gpio@vger.kernel.org, agross@kernel.org,
	tglx@linutronix.de, jason@lakedaemon.net, dianders@chromium.org,
	rnayak@codeaurora.org, ilina@codeaurora.org,
	lsrao@codeaurora.org
Subject: Re: [PATCH v4 7/7] irqchip: qcom-pdc: Reset all pdc interrupts during init
Date: Fri, 14 Aug 2020 13:24:42 -0700	[thread overview]
Message-ID: <159743668207.33733.6711446681138353287@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <1272cba3-1a6c-4d2e-0b4b-a19dfb5f3a4d@codeaurora.org>

Quoting Maulik Shah (2020-08-13 00:30:44)
> Hi,
> 
> On 8/12/2020 3:01 AM, Stephen Boyd wrote:
> > Quoting Maulik Shah (2020-08-10 04:21:00)
> >> Clear previous kernel's configuration during init by resetting
> >> interrupts in enable bank to zero.
> > Can you please add some more information here about why we're not
> > clearing all the pdc irqs and only the ones that are listed in DT?
> sure.
> >   Is
> > that because the pdc is shared between exception levels of the CPU and
> > so some irqs shouldn't be used? Does the DT binding need to change to
> > only list the hwirqs that are usable by the OS instead of the ones that
> > are usable for the entire system? The binding doesn't mention this at
> > all so I am just guessing here.
> 
> The IRQs specified in qcom,pdc-ranges property in DT are the only ones 
> that can be used in the current OS for the PDC.
> 
> So instead of setting entire register to zero (each reg supports 32 
> interrupts enable bit) only clearing the ones that can be used.
> 

Ok. Is something wrong with setting all the register bits to 0? Is there
something else in those registers that shouldn't be touched? Please add
these details to the commit message.

      reply	other threads:[~2020-08-14 20:24 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-10 11:20 [PATCH v4 0/7] irqchip: qcom: pdc: Introduce irq_set_wake call Maulik Shah
2020-08-10 11:20 ` [PATCH v4 1/7] pinctrl: qcom: Add msmgpio irqchip flags Maulik Shah
2020-08-11 19:32   ` Stephen Boyd
2020-08-13  5:47     ` Maulik Shah
2020-08-11 20:04   ` Doug Anderson
2020-08-10 11:20 ` [PATCH v4 2/7] pinctrl: qcom: Use return value from irq_set_wake call Maulik Shah
2020-08-11 19:34   ` Stephen Boyd
2020-08-11 20:06     ` Doug Anderson
2020-08-13  7:17     ` Maulik Shah
2020-08-13  7:21       ` Stephen Boyd
2020-08-27 22:46   ` Linus Walleij
2020-08-10 11:20 ` [PATCH v4 3/7] genirq: Introduce irq_suspend_one() and irq_resume_one() callbacks Maulik Shah
2020-08-11 20:09   ` Doug Anderson
2020-08-13  7:18     ` Maulik Shah
2020-08-13  9:29   ` Thomas Gleixner
2020-08-13 16:09     ` Doug Anderson
2020-08-13 22:09       ` Thomas Gleixner
2020-08-13 22:58         ` Doug Anderson
2020-08-14  2:07           ` Thomas Gleixner
2020-08-14  3:04             ` Doug Anderson
2020-08-14 12:43               ` Thomas Gleixner
2020-08-18  4:35           ` Maulik Shah
2020-08-18 14:40             ` Thomas Gleixner
2020-08-10 11:20 ` [PATCH v4 4/7] genirq: introduce irq_suspend_parent() and irq_resume_parent() Maulik Shah
2020-08-11 20:10   ` Doug Anderson
2020-08-13  7:19     ` Maulik Shah
2020-08-10 11:20 ` [PATCH v4 5/7] pinctrl: qcom: Call our parent for irq_suspend_one / irq_resume_one Maulik Shah
2020-08-10 11:20 ` [PATCH v4 6/7] irqchip: qcom-pdc: Unmask wake up irqs during suspend Maulik Shah
2020-08-10 11:21 ` [PATCH v4 7/7] irqchip: qcom-pdc: Reset all pdc interrupts during init Maulik Shah
2020-08-10 12:09   ` Felipe Balbi
2020-08-13  7:21     ` Maulik Shah
2020-08-11 21:31   ` Stephen Boyd
2020-08-13  7:30     ` Maulik Shah
2020-08-14 20:24       ` Stephen Boyd [this message]

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