From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CD72C433E1 for ; Wed, 19 Aug 2020 03:14:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7396C2078B for ; Wed, 19 Aug 2020 03:14:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597806855; bh=hLuwTC7klaEgIk64JrkEA7uqeW5wvcuVuslfVY4Brv8=; h=In-Reply-To:References:Subject:From:Cc:To:Date:List-ID:From; b=1dNGATmwtLbIZ49PguwNoPKyvn22DB+RFUcPvZTL9c0L48duehyNDIhG76fAS91bt N4n77jncuH6jZd/vvxEXbj5hEyTEw2UgPLQYnAdx1r6oToHwvSKy6JgWETakV3u8iZ KpB/rRPdRRTkrn0MO++eVYsI2d3TZ70r3DfChiM0= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727793AbgHSDOP (ORCPT ); Tue, 18 Aug 2020 23:14:15 -0400 Received: from mail.kernel.org ([198.145.29.99]:47766 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727077AbgHSDON (ORCPT ); Tue, 18 Aug 2020 23:14:13 -0400 Received: from kernel.org (unknown [104.132.0.74]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 6AE392065F; Wed, 19 Aug 2020 03:14:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1597806853; bh=hLuwTC7klaEgIk64JrkEA7uqeW5wvcuVuslfVY4Brv8=; h=In-Reply-To:References:Subject:From:Cc:To:Date:From; b=Z8MP8FCwKQucUhc1d23z5aT8pfgxeSEVQ4qA4Z4OKn5culdPfiUhljFQPZa9wn1ap Oeeb3+G7yA9VhJP7iu+UV4wPAbfpriAh3KIqZHqcVUIjJvyYhSvuqcTVUNH7kxsbWd UiKCDUEaT4WF0hae7Wa4ngIxAqstH1tE8TkqgvKE= Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable In-Reply-To: <20200807133143.22748-1-m.szyprowski@samsung.com> References: <20200807133143.22748-1-m.szyprowski@samsung.com> Subject: Re: [PATCH v2] clk: samsung: Keep top BPLL mux on Exynos542x enabled From: Stephen Boyd Cc: Marek Szyprowski , Sylwester Nawrocki , Chanwoo Choi , Krzysztof Kozlowski , Bartlomiej Zolnierkiewicz , Lukasz Luba To: Marek Szyprowski , linux-clk@vger.kernel.org, linux-pm@vger.kernel.org, linux-samsung-soc@vger.kernel.org Date: Tue, 18 Aug 2020 20:14:12 -0700 Message-ID: <159780685238.334488.5802955284004610550@swboyd.mtv.corp.google.com> User-Agent: alot/0.9.1 Sender: linux-clk-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-clk@vger.kernel.org Quoting Marek Szyprowski (2020-08-07 06:31:43) > BPLL clock must not be disabled because it is needed for proper DRAM > operation. This is normally handled by respective memory devfreq driver, > but when that driver is not yet probed or its probe has been deferred the > clock might got disabled what causes board hang. Fix this by calling > clk_prepare_enable() directly from the clock provider driver. >=20 > Signed-off-by: Marek Szyprowski > Reviewed-by: Lukasz Luba > Tested-by: Lukasz Luba > Acked-by: Krzysztof Kozlowski > --- Can I pick this up for clk-fixes?