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[187.189.51.144]) by smtp.gmail.com with ESMTPSA id m10sm2039424oig.27.2020.12.11.09.28.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 11 Dec 2020 09:28:38 -0800 (PST) Subject: Re: [PATCH v11 18/25] cpu: Move synchronize_from_tb() to tcg_ops To: Claudio Fontana , Paolo Bonzini , Thomas Huth , Stefano Stabellini , Wenchao Wang , Roman Bolshakov , Sunil Muthuswamy , =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= References: <20201211083143.14350-1-cfontana@suse.de> <20201211083143.14350-19-cfontana@suse.de> <78a7119d-1b4b-47dc-8f16-510708c9fcd4@linaro.org> From: Richard Henderson Message-ID: <15b884b7-94e4-1476-f883-e84379b2661e@linaro.org> Date: Fri, 11 Dec 2020 11:28:35 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::342; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x342.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Peter Maydell , Eduardo Habkost , Paul Durrant , =?UTF-8?Q?Alex_Benn=c3=a9e?= , Jason Wang , Marcelo Tosatti , qemu-devel@nongnu.org, Peter Xu , Dario Faggioli , Cameron Esfahani , haxm-team@intel.com, Colin Xu , Anthony Perard , Bruce Rogers , Olaf Hering , "Emilio G . Cota" Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 12/11/20 11:10 AM, Claudio Fontana wrote: > On 12/11/20 6:05 PM, Richard Henderson wrote: >> On 12/11/20 2:31 AM, Claudio Fontana wrote: >>> From: Eduardo Habkost >>> >>> Signed-off-by: Eduardo Habkost >>> [claudio: wrapped in CONFIG_TCG] >>> Signed-off-by: Claudio Fontana >>> Reviewed-by: Philippe Mathieu-Daudé >>> Reviewed-by: Alex Bennée >>> --- >>> include/hw/core/cpu.h | 8 -------- >>> include/hw/core/tcg-cpu-ops.h | 12 ++++++++++++ >>> accel/tcg/cpu-exec.c | 4 ++-- >>> target/arm/cpu.c | 4 +++- >>> target/avr/cpu.c | 2 +- >>> target/hppa/cpu.c | 2 +- >>> target/i386/tcg/tcg-cpu.c | 2 +- >>> target/microblaze/cpu.c | 2 +- >>> target/mips/cpu.c | 4 +++- >>> target/riscv/cpu.c | 2 +- >>> target/rx/cpu.c | 2 +- >>> target/sh4/cpu.c | 2 +- >>> target/sparc/cpu.c | 2 +- >>> target/tricore/cpu.c | 2 +- >>> 14 files changed, 29 insertions(+), 21 deletions(-) >>> >>> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h >>> index ea648d52ad..83007d262c 100644 >>> --- a/include/hw/core/cpu.h >>> +++ b/include/hw/core/cpu.h >>> @@ -110,13 +110,6 @@ struct TranslationBlock; >>> * If the target behaviour here is anything other than "set >>> * the PC register to the value passed in" then the target must >>> * also implement the synchronize_from_tb hook. >>> - * @synchronize_from_tb: Callback for synchronizing state from a TCG >>> - * #TranslationBlock. This is called when we abandon execution >>> - * of a TB before starting it, and must set all parts of the CPU >>> - * state which the previous TB in the chain may not have updated. >>> - * This always includes at least the program counter; some targets >>> - * will need to do more. If this hook is not implemented then the >>> - * default is to call @set_pc(tb->pc). >>> * @tlb_fill: Callback for handling a softmmu tlb miss or user-only >>> * address fault. For system mode, if the access is valid, call >>> * tlb_set_page and return true; if the access is invalid, and >>> @@ -193,7 +186,6 @@ struct CPUClass { >>> void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, >>> Error **errp); >>> void (*set_pc)(CPUState *cpu, vaddr value); >>> - void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb); >>> bool (*tlb_fill)(CPUState *cpu, vaddr address, int size, >>> MMUAccessType access_type, int mmu_idx, >>> bool probe, uintptr_t retaddr); >>> diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h >>> index 4475ef0996..e1d50b3c8b 100644 >>> --- a/include/hw/core/tcg-cpu-ops.h >>> +++ b/include/hw/core/tcg-cpu-ops.h >>> @@ -10,6 +10,8 @@ >>> #ifndef TCG_CPU_OPS_H >>> #define TCG_CPU_OPS_H >>> >>> +#include "hw/core/cpu.h" >> >> This include is circular. > > Yes, it's protected though, it was asked that way. Well, in my strong opinion, someone asked incorrectly. It's "harmless" because of the protection ifdefs, but it's Wrong because it has the potential to hide bugs. What is it that you thought you needed from core/cpu.h anyway? >> Are you sure that splitting out hw/core/tcg-cpu-ops.h from hw/core/cpu.h in >> patch 15 is even useful? > > it avoids a huge #ifdef CONFIG_TCG So? The question should be: is it useful on its own, and I think the answer to that is clearly not. Thus it should not pretend to be a standalone header file. r~