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[91.12.101.171]) by smtp.gmail.com with ESMTPSA id y10sm280628ejh.105.2021.05.12.11.18.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 12 May 2021 11:18:00 -0700 (PDT) Subject: Re: [PATCH 30/72] softfloat: Move pick_nan_muladd to softfloat-parts.c.inc To: Richard Henderson , qemu-devel@nongnu.org References: <20210508014802.892561-1-richard.henderson@linaro.org> <20210508014802.892561-31-richard.henderson@linaro.org> From: David Hildenbrand Organization: Red Hat Message-ID: <15c4ae34-4e1d-bede-a0ca-8e8aed49a9ed@redhat.com> Date: Wed, 12 May 2021 20:18:00 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210508014802.892561-31-richard.henderson@linaro.org> Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=david@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.133.124; envelope-from=david@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.7, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 08.05.21 03:47, Richard Henderson wrote: > At the same time, convert to pointers, rename to pick_nan_muladd$N > and define a macro for pick_nan_muladd using QEMU_GENERIC. > > Signed-off-by: Richard Henderson > --- > fpu/softfloat.c | 53 ++++++++++----------------------------- > fpu/softfloat-parts.c.inc | 40 +++++++++++++++++++++++++++++ > 2 files changed, 53 insertions(+), 40 deletions(-) > > diff --git a/fpu/softfloat.c b/fpu/softfloat.c > index 77efaedeaa..40ee294e35 100644 > --- a/fpu/softfloat.c > +++ b/fpu/softfloat.c > @@ -720,6 +720,18 @@ static FloatParts128 *parts128_pick_nan(FloatParts128 *a, FloatParts128 *b, > > #define parts_pick_nan(A, B, S) PARTS_GENERIC_64_128(pick_nan, A)(A, B, S) > > +static FloatParts64 *parts64_pick_nan_muladd(FloatParts64 *a, FloatParts64 *b, > + FloatParts64 *c, float_status *s, > + int ab_mask, int abc_mask); > +static FloatParts128 *parts128_pick_nan_muladd(FloatParts128 *a, > + FloatParts128 *b, > + FloatParts128 *c, > + float_status *s, > + int ab_mask, int abc_mask); > + > +#define parts_pick_nan_muladd(A, B, C, S, ABM, ABCM) \ > + PARTS_GENERIC_64_128(pick_nan_muladd, A)(A, B, C, S, ABM, ABCM) > + > /* > * Helper functions for softfloat-parts.c.inc, per-size operations. > */ > @@ -947,45 +959,6 @@ static FloatParts64 round_canonical(FloatParts64 p, float_status *s, > return p; > } > > -static FloatParts64 pick_nan_muladd(FloatParts64 a, FloatParts64 b, FloatParts64 c, > - bool inf_zero, float_status *s) > -{ > - int which; > - > - if (is_snan(a.cls) || is_snan(b.cls) || is_snan(c.cls)) { > - float_raise(float_flag_invalid, s); > - } > - > - which = pickNaNMulAdd(a.cls, b.cls, c.cls, inf_zero, s); > - > - if (s->default_nan_mode) { > - /* Note that this check is after pickNaNMulAdd so that function > - * has an opportunity to set the Invalid flag. > - */ > - which = 3; > - } > - > - switch (which) { > - case 0: > - break; > - case 1: > - a = b; > - break; > - case 2: > - a = c; > - break; > - case 3: > - parts_default_nan(&a, s); > - break; > - default: > - g_assert_not_reached(); > - } > - > - if (is_snan(a.cls)) { > - parts_silence_nan(&a, s); > - } > - return a; > -} > > #define partsN(NAME) parts64_##NAME > #define FloatPartsN FloatParts64 > @@ -1496,7 +1469,7 @@ static FloatParts64 muladd_floats(FloatParts64 a, FloatParts64 b, FloatParts64 c > * off to the target-specific pick-a-NaN routine. > */ > if (unlikely(abc_mask & float_cmask_anynan)) { > - return pick_nan_muladd(a, b, c, inf_zero, s); > + return *parts_pick_nan_muladd(&a, &b, &c, s, ab_mask, abc_mask); > } > > if (inf_zero) { > diff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc > index 11a71650f7..a78d61ea07 100644 > --- a/fpu/softfloat-parts.c.inc > +++ b/fpu/softfloat-parts.c.inc > @@ -60,3 +60,43 @@ static FloatPartsN *partsN(pick_nan)(FloatPartsN *a, FloatPartsN *b, > } > return a; > } > + > +static FloatPartsN *partsN(pick_nan_muladd)(FloatPartsN *a, FloatPartsN *b, > + FloatPartsN *c, float_status *s, > + int ab_mask, int abc_mask) > +{ > + int which; > + > + if (unlikely(abc_mask & float_cmask_snan)) { > + float_raise(float_flag_invalid, s); > + } > + > + which = pickNaNMulAdd(a->cls, b->cls, c->cls, > + ab_mask == float_cmask_infzero, s); > + > + if (s->default_nan_mode || which == 3) { > + /* > + * Note that this check is after pickNaNMulAdd so that function > + * has an opportunity to set the Invalid flag for infzero. > + */ > + parts_default_nan(a, s); > + return a; > + } > + > + switch (which) { > + case 0: > + break; > + case 1: > + a = b; > + break; > + case 2: > + a = c; > + break; > + default: > + g_assert_not_reached(); > + } > + if (is_snan(a->cls)) { > + parts_silence_nan(a, s); > + } > + return a; > +} > Reviewed-by: David Hildenbrand -- Thanks, David / dhildenb