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From: kan.liang@linux.intel.com
To: peterz@infradead.org, mingo@redhat.com, linux-kernel@vger.kernel.org
Cc: bhelgaas@google.com, eranian@google.com, ak@linux.intel.com,
	Kan Liang <kan.liang@linux.intel.com>
Subject: [RESEND PATCH V2 3/6] perf/x86/intel/uncore: Factor out uncore_pci_pmu_register()
Date: Mon, 14 Sep 2020 07:34:17 -0700	[thread overview]
Message-ID: <1600094060-82746-4-git-send-email-kan.liang@linux.intel.com> (raw)
In-Reply-To: <1600094060-82746-1-git-send-email-kan.liang@linux.intel.com>

From: Kan Liang <kan.liang@linux.intel.com>

The PMU registration in the uncore PCI sub driver is similar as the
normal PMU registration for a PCI device. The codes to register a PCI
PMU can be shared.

Factor out uncore_pci_pmu_register(), which will be used later.

The pci_set_drvdata() is not included in uncore_pci_pmu_register(). The
uncore PCI sub driver doesn't own the PCI device. It will not touch the
private driver data pointer for the device.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
---
 arch/x86/events/intel/uncore.c | 82 ++++++++++++++++++++++++++----------------
 1 file changed, 51 insertions(+), 31 deletions(-)

diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
index f6ff1b9..a884747 100644
--- a/arch/x86/events/intel/uncore.c
+++ b/arch/x86/events/intel/uncore.c
@@ -1040,13 +1040,61 @@ uncore_pci_find_dev_pmu(struct pci_dev *pdev, const struct pci_device_id *ids)
 }
 
 /*
+ * Register the PMU for a PCI device
+ * @pdev: The PCI device.
+ * @type: The corresponding PMU type of the device.
+ * @pmu: The corresponding PMU of the device.
+ * @phys_id: The physical socket id which the device maps to.
+ * @die: The die id which the device maps to.
+ */
+static int uncore_pci_pmu_register(struct pci_dev *pdev,
+				   struct intel_uncore_type *type,
+				   struct intel_uncore_pmu *pmu,
+				   int phys_id, int die)
+{
+	struct intel_uncore_box *box;
+	int ret;
+
+	if (WARN_ON_ONCE(pmu->boxes[die] != NULL))
+		return -EINVAL;
+
+	box = uncore_alloc_box(type, NUMA_NO_NODE);
+	if (!box)
+		return -ENOMEM;
+
+	if (pmu->func_id < 0)
+		pmu->func_id = pdev->devfn;
+	else
+		WARN_ON_ONCE(pmu->func_id != pdev->devfn);
+
+	atomic_inc(&box->refcnt);
+	box->pci_phys_id = phys_id;
+	box->dieid = die;
+	box->pci_dev = pdev;
+	box->pmu = pmu;
+	uncore_box_init(box);
+
+	pmu->boxes[die] = box;
+	if (atomic_inc_return(&pmu->activeboxes) > 1)
+		return 0;
+
+	/* First active box registers the pmu */
+	ret = uncore_pmu_register(pmu);
+	if (ret) {
+		pmu->boxes[die] = NULL;
+		uncore_box_exit(box);
+		kfree(box);
+	}
+	return ret;
+}
+
+/*
  * add a pci uncore device
  */
 static int uncore_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 {
 	struct intel_uncore_type *type;
 	struct intel_uncore_pmu *pmu = NULL;
-	struct intel_uncore_box *box;
 	int phys_id, die, ret;
 
 	ret = uncore_pci_get_dev_die_info(pdev, &phys_id, &die);
@@ -1082,38 +1130,10 @@ static int uncore_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id
 		pmu = &type->pmus[UNCORE_PCI_DEV_IDX(id->driver_data)];
 	}
 
-	if (WARN_ON_ONCE(pmu->boxes[die] != NULL))
-		return -EINVAL;
-
-	box = uncore_alloc_box(type, NUMA_NO_NODE);
-	if (!box)
-		return -ENOMEM;
+	ret = uncore_pci_pmu_register(pdev, type, pmu, phys_id, die);
 
-	if (pmu->func_id < 0)
-		pmu->func_id = pdev->devfn;
-	else
-		WARN_ON_ONCE(pmu->func_id != pdev->devfn);
+	pci_set_drvdata(pdev, pmu->boxes[die]);
 
-	atomic_inc(&box->refcnt);
-	box->pci_phys_id = phys_id;
-	box->dieid = die;
-	box->pci_dev = pdev;
-	box->pmu = pmu;
-	uncore_box_init(box);
-	pci_set_drvdata(pdev, box);
-
-	pmu->boxes[die] = box;
-	if (atomic_inc_return(&pmu->activeboxes) > 1)
-		return 0;
-
-	/* First active box registers the pmu */
-	ret = uncore_pmu_register(pmu);
-	if (ret) {
-		pci_set_drvdata(pdev, NULL);
-		pmu->boxes[die] = NULL;
-		uncore_box_exit(box);
-		kfree(box);
-	}
 	return ret;
 }
 
-- 
2.7.4


  parent reply	other threads:[~2020-09-14 14:47 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-14 14:34 [RESEND PATCH V2 0/6] Support PCIe3 uncore PMU on Snow Ridge kan.liang
2020-09-14 14:34 ` [RESEND PATCH V2 1/6] perf/x86/intel/uncore: Factor out uncore_pci_get_dev_die_info() kan.liang
2020-09-25 12:23   ` [tip: perf/core] " tip-bot2 for Kan Liang
2020-09-14 14:34 ` [RESEND PATCH V2 2/6] perf/x86/intel/uncore: Factor out uncore_pci_find_dev_pmu() kan.liang
2020-09-25 12:23   ` [tip: perf/core] " tip-bot2 for Kan Liang
2020-09-14 14:34 ` kan.liang [this message]
2020-09-25 12:23   ` [tip: perf/core] perf/x86/intel/uncore: Factor out uncore_pci_pmu_register() tip-bot2 for Kan Liang
2020-09-14 14:34 ` [RESEND PATCH V2 4/6] perf/x86/intel/uncore: Factor out uncore_pci_pmu_unregister() kan.liang
2020-09-25 12:23   ` [tip: perf/core] " tip-bot2 for Kan Liang
2020-09-14 14:34 ` [RESEND PATCH V2 5/6] perf/x86/intel/uncore: Generic support for the PCI sub driver kan.liang
2020-09-21 22:19   ` Bjorn Helgaas
2020-09-22 13:05     ` Liang, Kan
2020-09-25 12:23   ` [tip: perf/core] " tip-bot2 for Kan Liang
2020-09-14 14:34 ` [RESEND PATCH V2 6/6] perf/x86/intel/uncore: Support PCIe3 unit on Snow Ridge kan.liang
2020-09-25 12:23   ` [tip: perf/core] " tip-bot2 for Kan Liang
2020-09-21 15:06 ` [RESEND PATCH V2 0/6] Support PCIe3 uncore PMU " peterz
2020-09-21 22:19   ` Bjorn Helgaas
2020-09-24 11:08     ` Peter Zijlstra

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