From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D491C43463 for ; Fri, 18 Sep 2020 09:03:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 25FF221D42 for ; Fri, 18 Sep 2020 09:03:33 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="o3lYoFks"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="aIwdlh90" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726558AbgIRJD3 (ORCPT ); Fri, 18 Sep 2020 05:03:29 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:33066 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725874AbgIRJD1 (ORCPT ); Fri, 18 Sep 2020 05:03:27 -0400 Date: Fri, 18 Sep 2020 09:03:24 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1600419805; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=m+kXnnTGhK+z6ZpNRUPD47PPgu90ft+gqoY9kRw890s=; b=o3lYoFksFwyoriu1hS1QebqnH1AIWHmATREyetjU7IceYNQNBmz6AaNDrIaUIrxQfSdmdN niDEwT7YIZDpEKl8yDwc3f02aQmamx3pMjoOedkY+/RuuRWU4MKSFFkBS/Ush7+Ecm20+S joRUCxalbOgEJq7xcF2i1LfTs1uFLwZdtGfY2s6QSNVmNxuCmt7DxdnCLcdfq5CUnTnc01 6xkt6CjTv3h0jHCpoBvI6dzx8CcyJQIoLFOT+YPaA3pzGL4myS2+UaAn2ZhmQFPjarKPPD pMocp0NwniCFCVOwHBqZzepwxoWDwN9ny0F+I7T8spzuzDV4cFNvqlUBme6EdA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1600419805; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=m+kXnnTGhK+z6ZpNRUPD47PPgu90ft+gqoY9kRw890s=; b=aIwdlh90mdveNpGnqTVpegymmQPlDTe4bEm8kp07bsigVoybex40jUv3wMUvNfBIqPUG0A U75do3Aw0DWfq4AQ== From: "tip-bot2 for Krish Sadhukhan" Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cpu] x86/mm/pat: Don't flush cache if hardware enforces cache coherency across encryption domnains Cc: Tom Lendacky , Krish Sadhukhan , Borislav Petkov , x86 , LKML In-Reply-To: <20200917212038.5090-3-krish.sadhukhan@oracle.com> References: <20200917212038.5090-3-krish.sadhukhan@oracle.com> MIME-Version: 1.0 Message-ID: <160041980431.15536.3131614271066491139.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/cpu branch of tip: Commit-ID: 75d1cc0e05af579301ce4e49cf6399be4b4e6e76 Gitweb: https://git.kernel.org/tip/75d1cc0e05af579301ce4e49cf6399be4b4e6e76 Author: Krish Sadhukhan AuthorDate: Thu, 17 Sep 2020 21:20:37 Committer: Borislav Petkov CommitterDate: Fri, 18 Sep 2020 10:47:00 +02:00 x86/mm/pat: Don't flush cache if hardware enforces cache coherency across encryption domnains In some hardware implementations, coherency between the encrypted and unencrypted mappings of the same physical page is enforced. In such a system, it is not required for software to flush the page from all CPU caches in the system prior to changing the value of the C-bit for the page. So check that bit before flushing the cache. [ bp: Massage commit message. ] Suggested-by: Tom Lendacky Signed-off-by: Krish Sadhukhan Signed-off-by: Borislav Petkov Link: https://lkml.kernel.org/r/20200917212038.5090-3-krish.sadhukhan@oracle.com --- arch/x86/mm/pat/set_memory.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/mm/pat/set_memory.c b/arch/x86/mm/pat/set_memory.c index d1b2a88..40baa90 100644 --- a/arch/x86/mm/pat/set_memory.c +++ b/arch/x86/mm/pat/set_memory.c @@ -1999,7 +1999,7 @@ static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc) /* * Before changing the encryption attribute, we need to flush caches. */ - cpa_flush(&cpa, 1); + cpa_flush(&cpa, !this_cpu_has(X86_FEATURE_SME_COHERENT)); ret = __change_page_attr_set_clr(&cpa, 1);