From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.9 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B5D3EC43464 for ; Sat, 19 Sep 2020 18:57:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5B32120874 for ; Sat, 19 Sep 2020 18:57:41 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="wiMmCwv7"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="GNzgJyc0" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726597AbgISS5k (ORCPT ); Sat, 19 Sep 2020 14:57:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37544 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726449AbgISS5j (ORCPT ); Sat, 19 Sep 2020 14:57:39 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 954E7C0613CE; Sat, 19 Sep 2020 11:57:39 -0700 (PDT) Date: Sat, 19 Sep 2020 18:57:27 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1600541853; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mrhy/4PNeswPO7VxIUEcBRAZ4qKr20VRiqemKU3AXIA=; b=wiMmCwv7F4m8GYSaeLAa0GGg7oMIET7ccseP1HwjRIpBri2ELROccJ/4pfRK/Z9uyHZZpa sK0BmajyykD7wCGXKWQg8CFmzkXp9e/kih9Gvz7RR6Ybuq3VVxvixRSQJhRfIGuS9wAQzS w+vy/sIS5tCeim6GZ1R28VytEH7ABUEkMIriHcw0Eh0Upzn7kUS1JKKi3BLZEEmUxGsBCR OiBoGAbWpq+9sTyiN8IsCUtHKpn+FX83FlLIMoKqtnlsBPabTeMpNjST/RW/aO9gvrC0dV CoBrnT+aVtoGc/i49qxoIc3sDNk9YD2IDL+K7OjIvZGVzEzFrBp87KSMUZUZRQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1600541853; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mrhy/4PNeswPO7VxIUEcBRAZ4qKr20VRiqemKU3AXIA=; b=GNzgJyc0QNk2MoPwNeRcV2T1HQXG6NTBBiaXzE5N+hkNfJC4CdwClCuujdVnQKve6WKq88 a+CyggX4x90qGfCA== From: "tip-bot2 for Krish Sadhukhan" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/cpu] KVM: SVM: Don't flush cache if hardware enforces cache coherency across encryption domains Cc: Krish Sadhukhan , Borislav Petkov , Paolo Bonzini , x86 , LKML In-Reply-To: <20200917212038.5090-4-krish.sadhukhan@oracle.com> References: <20200917212038.5090-4-krish.sadhukhan@oracle.com> MIME-Version: 1.0 Message-ID: <160054184758.15536.15665221112789518623.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/cpu branch of tip: Commit-ID: e1ebb2b49048c4767cfa0d8466f9c701e549fa5e Gitweb: https://git.kernel.org/tip/e1ebb2b49048c4767cfa0d8466f9c701e549fa5e Author: Krish Sadhukhan AuthorDate: Thu, 17 Sep 2020 21:20:38 Committer: Borislav Petkov CommitterDate: Sat, 19 Sep 2020 20:46:59 +02:00 KVM: SVM: Don't flush cache if hardware enforces cache coherency across encryption domains In some hardware implementations, coherency between the encrypted and unencrypted mappings of the same physical page in a VM is enforced. In such a system, it is not required for software to flush the VM's page from all CPU caches in the system prior to changing the value of the C-bit for the page. So check that bit before flushing the cache. Signed-off-by: Krish Sadhukhan Signed-off-by: Borislav Petkov Acked-by: Paolo Bonzini Link: https://lkml.kernel.org/r/20200917212038.5090-4-krish.sadhukhan@oracle.com --- arch/x86/kvm/svm/sev.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/svm/sev.c b/arch/x86/kvm/svm/sev.c index 402dc42..567792f 100644 --- a/arch/x86/kvm/svm/sev.c +++ b/arch/x86/kvm/svm/sev.c @@ -384,7 +384,8 @@ static void sev_clflush_pages(struct page *pages[], unsigned long npages) uint8_t *page_virtual; unsigned long i; - if (npages == 0 || pages == NULL) + if (this_cpu_has(X86_FEATURE_SME_COHERENT) || npages == 0 || + pages == NULL) return; for (i = 0; i < npages; i++) {