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From: Mansur Alisha Shaik <mansur@codeaurora.org>
To: linux-media@vger.kernel.org, stanimir.varbanov@linaro.org
Cc: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	vgarodia@codeaurora.org,
	Mansur Alisha Shaik <mansur@codeaurora.org>
Subject: [PATCH v3 1/4] venus: core: change clk enable and disable order in resume and suspend
Date: Thu, 24 Sep 2020 12:21:03 +0530	[thread overview]
Message-ID: <1600930266-9668-2-git-send-email-mansur@codeaurora.org> (raw)
In-Reply-To: <1600930266-9668-1-git-send-email-mansur@codeaurora.org>

Currently video driver is voting after clk enable and un voting
before clk disable. This is incorrect, video driver should vote
before clk enable and unvote after clk disable.

Corrected this by changing the order of clk enable and clk disable.

Fixes: 7482a983d ("media: venus: redesign clocks and pm domains control")
Signed-off-by: Mansur Alisha Shaik <mansur@codeaurora.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
---
 drivers/media/platform/qcom/venus/core.c | 17 ++++++++++-------
 1 file changed, 10 insertions(+), 7 deletions(-)

diff --git a/drivers/media/platform/qcom/venus/core.c b/drivers/media/platform/qcom/venus/core.c
index 6103aaf..52a3886 100644
--- a/drivers/media/platform/qcom/venus/core.c
+++ b/drivers/media/platform/qcom/venus/core.c
@@ -355,13 +355,16 @@ static __maybe_unused int venus_runtime_suspend(struct device *dev)
 	if (ret)
 		return ret;
 
+	if (pm_ops->core_power) {
+		ret = pm_ops->core_power(dev, POWER_OFF);
+		if (ret)
+			return ret;
+	}
+
 	ret = icc_set_bw(core->cpucfg_path, 0, 0);
 	if (ret)
 		return ret;
 
-	if (pm_ops->core_power)
-		ret = pm_ops->core_power(dev, POWER_OFF);
-
 	return ret;
 }
 
@@ -371,16 +374,16 @@ static __maybe_unused int venus_runtime_resume(struct device *dev)
 	const struct venus_pm_ops *pm_ops = core->pm_ops;
 	int ret;
 
+	ret = icc_set_bw(core->cpucfg_path, 0, kbps_to_icc(1000));
+	if (ret)
+		return ret;
+
 	if (pm_ops->core_power) {
 		ret = pm_ops->core_power(dev, POWER_ON);
 		if (ret)
 			return ret;
 	}
 
-	ret = icc_set_bw(core->cpucfg_path, 0, kbps_to_icc(1000));
-	if (ret)
-		return ret;
-
 	return hfi_core_resume(core, false);
 }
 
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member 
of Code Aurora Forum, hosted by The Linux Foundation


  reply	other threads:[~2020-09-24  6:51 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-24  6:51 [PATCH v3 0/4] Venus - change clk enable, disable order and change bw values Mansur Alisha Shaik
2020-09-24  6:51 ` Mansur Alisha Shaik [this message]
2020-09-24 23:11   ` [PATCH v3 1/4] venus: core: change clk enable and disable order in resume and suspend Stanimir Varbanov
2020-09-24  6:51 ` [PATCH v3 2/4] venus: core: vote for video-mem path Mansur Alisha Shaik
2020-09-24  7:54   ` Stephen Boyd
2020-09-24  6:51 ` [PATCH v3 3/4] venus: core: vote with average bandwidth and peak bandwidth as zero Mansur Alisha Shaik
2020-09-24  7:53   ` Stephen Boyd
2020-09-24  6:51 ` [PATCH v3 4/4] venus: put dummy vote on video-mem path after last session release Mansur Alisha Shaik
2020-09-24  7:54   ` Stephen Boyd

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