Patch Details
Series:drm/i915/tgl: Fix Combo PHY DPLL fractional divider for 38.4MHz ref clock (rev3)
URL:https://patchwork.freedesktop.org/series/82173/
State:failure
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18620/index.html

CI Bug Log - changes from CI_DRM_9093_full -> Patchwork_18620_full

Summary

FAILURE

Serious unknown changes coming with Patchwork_18620_full absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_18620_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

Possible new issues

Here are the unknown changes that may have been introduced in Patchwork_18620_full:

IGT changes

Possible regressions

Known issues

Here are the changes found in Patchwork_18620_full that come from known issues:

IGT changes

Issues hit

Possible fixes

Warnings

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Participating hosts (11 -> 11)

No changes in participating hosts

Build changes

CI-20190529: 20190529
CI_DRM_9093: 827ebff930c6340ed1c1c274909717525951c496 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5798: 430bad5a53c08125fbd48978ed6a66f61a33a40b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18620: 77fe9153f15371efa976b7ebdb10e9a1df31054e @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit