From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7E86C388F9 for ; Fri, 23 Oct 2020 18:39:31 +0000 (UTC) Received: from dpdk.org (dpdk.org [92.243.14.124]) by mail.kernel.org (Postfix) with ESMTP id 2A7D720882 for ; Fri, 23 Oct 2020 18:39:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2A7D720882 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=dev-bounces@dpdk.org Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8C04AA8FD; Fri, 23 Oct 2020 20:30:52 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 2619F5AAE for ; Fri, 23 Oct 2020 20:30:44 +0200 (CEST) IronPort-SDR: QfE0Xrwk2lM/cLla8bOS3UxfeoK7LgR5XEmvcH9iLtQQ2FdfVh6uhzXRGClH/RDkq3VmStFSe/ yi74Plr/oLHw== X-IronPort-AV: E=McAfee;i="6000,8403,9783"; a="167837633" X-IronPort-AV: E=Sophos;i="5.77,409,1596524400"; d="scan'208";a="167837633" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2020 11:30:43 -0700 IronPort-SDR: 1Fi4J9Kk/iocP98M23pl59JRBjyIJ75HtqnrH8kp3N2HM9hDCOmX48Ilrd8ivn1hwITkwwE/UE p62QvH28SULw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,409,1596524400"; d="scan'208";a="534500538" Received: from txasoft-yocto.an.intel.com ([10.123.72.192]) by orsmga005.jf.intel.com with ESMTP; 23 Oct 2020 11:30:42 -0700 From: Timothy McDaniel To: Cc: dev@dpdk.org, erik.g.carrillo@intel.com, gage.eads@intel.com, harry.van.haaren@intel.com, jerinj@marvell.com Date: Fri, 23 Oct 2020 13:32:14 -0500 Message-Id: <1603477952-583-6-git-send-email-timothy.mcdaniel@intel.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1603477952-583-1-git-send-email-timothy.mcdaniel@intel.com> References: <1596138614-17409-2-git-send-email-timothy.mcdaniel@intel.com> <1603477952-583-1-git-send-email-timothy.mcdaniel@intel.com> Subject: [dpdk-dev] [PATCH v6 05/23] event/dlb: add inline functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add miscellaneous inline functions that may be called from multiple files. These functions include inline assembly of new x86 instructions, such as movdir64b, since they are not available as builtin functions in the minimum supported GCC version. Signed-off-by: Timothy McDaniel Reviewed-by: Gage Eads --- drivers/event/dlb/dlb_inline_fns.h | 59 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 drivers/event/dlb/dlb_inline_fns.h diff --git a/drivers/event/dlb/dlb_inline_fns.h b/drivers/event/dlb/dlb_inline_fns.h new file mode 100644 index 0000000..7bbe69e --- /dev/null +++ b/drivers/event/dlb/dlb_inline_fns.h @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2016-2020 Intel Corporation + */ + +#include "rte_memcpy.h" +#include "rte_io.h" + +/* Inline functions required in more than one source file. */ + +static inline struct dlb_eventdev * +dlb_pmd_priv(const struct rte_eventdev *eventdev) +{ + return eventdev->data->dev_private; +} + +static inline void +dlb_umonitor(volatile void *addr) +{ + asm volatile(".byte 0xf3, 0x0f, 0xae, 0xf7\t\n" + : + : "D" (addr)); +} + +static inline void +dlb_umwait(int state, uint64_t timeout) +{ + uint32_t eax = timeout & UINT32_MAX; + uint32_t edx = timeout >> 32; + + asm volatile(".byte 0xf2, 0x0f, 0xae, 0xf7\t\n" + : + : "D" (state), "a" (eax), "d" (edx)); +} + +static inline void +dlb_movntdq_single(void *dest, void *src) +{ + long long *_src = (long long *)src; + __v2di src_data0 = (__v2di){_src[0], _src[1]}; + + __builtin_ia32_movntdq((__v2di *)dest, (__v2di)src_data0); +} + +static inline void +dlb_cldemote(void *addr) +{ + /* Load addr into RSI, then demote the cache line of the address + * contained in that register. + */ + asm volatile(".byte 0x0f, 0x1c, 0x06" :: "S" (addr)); +} + +static inline void +dlb_movdir64b(void *dest, void *src) +{ + asm volatile(".byte 0x66, 0x0f, 0x38, 0xf8, 0x02" + : + : "a" (dest), "d" (src)); +} -- 2.6.4