From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 220A4C55178 for ; Thu, 29 Oct 2020 12:17:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B1D1C207DE for ; Thu, 29 Oct 2020 12:16:59 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="3BNgC+yE"; dkim=permerror (0-bit key) header.d=linutronix.de header.i=@linutronix.de header.b="plV4JflA" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727028AbgJ2MQy (ORCPT ); Thu, 29 Oct 2020 08:16:54 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:33306 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726411AbgJ2MPp (ORCPT ); Thu, 29 Oct 2020 08:15:45 -0400 Date: Thu, 29 Oct 2020 12:15:42 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1603973742; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6RCBehm7zkq7gJxGCHZr23h0m55YTmACO25G3+RpmSA=; b=3BNgC+yEFn8BXUadV6o/lufSSLCkFSJU+oV10F1Kw7+QoQswcDn312RsDWmutahUK9Ezu9 GsO/sIuXC/WtzNREutuLIkp3KuFNOUddlmuOUacT/OgvTajh3pfn3wjhK1oLyg20ex+ApX OFtpi1wVD6ZRNm6dOUbrSVuDE56IOV/tbV2IkKqDtbt4naMZrV5jcxMfD76JIVxZzb+4qG AqkzwtYzpdppeO0ecDKNLiM/L7n/0sR2iauNFwkbVMbhJ9yMt6/D3o3xSxKx4/3AdrKn8D 71Do3QBBv14ISRYNa89v8n9FVy/yDN95miJymdFKwG6mNrD2J4dB0ll7TMHEmg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1603973742; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6RCBehm7zkq7gJxGCHZr23h0m55YTmACO25G3+RpmSA=; b=plV4JflAEneDdzw3kwtd4ACQS5eANP3uQvMy8m9r4mJsH8enFo4IzQn5XGepPGQRYW8LAe ucSBF2Ji4nAlZwCw== From: "tip-bot2 for Thomas Gleixner" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/apic] iommu/intel: Use msi_msg shadow structs Cc: Thomas Gleixner , David Woodhouse , x86 , LKML In-Reply-To: <20201024213535.443185-14-dwmw2@infradead.org> References: <20201024213535.443185-14-dwmw2@infradead.org> MIME-Version: 1.0 Message-ID: <160397374201.397.2267143454147222965.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the x86/apic branch of tip: Commit-ID: 5c0d0e2cc6e0e7a96c25351fd67c775e7b1f11f0 Gitweb: https://git.kernel.org/tip/5c0d0e2cc6e0e7a96c25351fd67c775e7b1f11f0 Author: Thomas Gleixner AuthorDate: Sat, 24 Oct 2020 22:35:13 +01:00 Committer: Thomas Gleixner CommitterDate: Wed, 28 Oct 2020 20:26:25 +01:00 iommu/intel: Use msi_msg shadow structs Use the bitfields in the x86 shadow struct to compose the MSI message. Signed-off-by: Thomas Gleixner Signed-off-by: David Woodhouse Signed-off-by: Thomas Gleixner Link: https://lore.kernel.org/r/20201024213535.443185-14-dwmw2@infradead.org --- drivers/iommu/intel/irq_remapping.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/intel/irq_remapping.c b/drivers/iommu/intel/irq_remapping.c index 5628d43..30269b7 100644 --- a/drivers/iommu/intel/irq_remapping.c +++ b/drivers/iommu/intel/irq_remapping.c @@ -20,7 +20,6 @@ #include #include #include -#include #include "../irq_remapping.h" @@ -1260,6 +1259,21 @@ static struct irq_chip intel_ir_chip = { .irq_set_vcpu_affinity = intel_ir_set_vcpu_affinity, }; +static void fill_msi_msg(struct msi_msg *msg, u32 index, u32 subhandle) +{ + memset(msg, 0, sizeof(*msg)); + + msg->arch_addr_lo.dmar_base_address = X86_MSI_BASE_ADDRESS_LOW; + msg->arch_addr_lo.dmar_subhandle_valid = true; + msg->arch_addr_lo.dmar_format = true; + msg->arch_addr_lo.dmar_index_0_14 = index & 0x7FFF; + msg->arch_addr_lo.dmar_index_15 = !!(index & 0x8000); + + msg->address_hi = X86_MSI_BASE_ADDRESS_HIGH; + + msg->arch_data.dmar_subhandle = subhandle; +} + static void intel_irq_remapping_prepare_irte(struct intel_ir_data *data, struct irq_cfg *irq_cfg, struct irq_alloc_info *info, @@ -1267,7 +1281,6 @@ static void intel_irq_remapping_prepare_irte(struct intel_ir_data *data, { struct IR_IO_APIC_route_entry *entry; struct irte *irte = &data->irte_entry; - struct msi_msg *msg = &data->msi_entry; prepare_irte(irte, irq_cfg->vector, irq_cfg->dest_apicid); switch (info->type) { @@ -1308,12 +1321,7 @@ static void intel_irq_remapping_prepare_irte(struct intel_ir_data *data, else set_msi_sid(irte, msi_desc_to_pci_dev(info->desc)); - msg->address_hi = MSI_ADDR_BASE_HI; - msg->data = sub_handle; - msg->address_lo = MSI_ADDR_BASE_LO | MSI_ADDR_IR_EXT_INT | - MSI_ADDR_IR_SHV | - MSI_ADDR_IR_INDEX1(index) | - MSI_ADDR_IR_INDEX2(index); + fill_msi_msg(&data->msi_entry, index, sub_handle); break; default: