* [PATCH v4 0/5] Add PMIC wrapper support for Mediatek MT6873/8192 SoC IC
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Hsin-Hsiung Wang
This series adds support for new SoC MT6873/8192 to the pmic-wrap driver.
changes since v3:
- refine some coding style about PWRAP_CAP_ARB capacity for better code quality.
- make struct pwrap_mt6873 const.
- add pwrap node into Mediatek MT8192 dtsi.
Hsin-Hsiung Wang (5):
soc: mediatek: pwrap: use BIT() macro
soc: mediatek: pwrap: add arbiter capability
dt-bindings: mediatek: add compatible for MT6873/8192 pwrap
soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
arm64: dts: mt8192: add pwrap node
.../devicetree/bindings/soc/mediatek/pwrap.txt | 1 +
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 +++
drivers/soc/mediatek/mtk-pmic-wrap.c | 90 +++++++++++++++++++---
3 files changed, 92 insertions(+), 11 deletions(-)
--
2.6.4
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v4 0/5] Add PMIC wrapper support for Mediatek MT6873/8192 SoC IC
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, srv_heupstream, linux-kernel, linux-mediatek,
linux-arm-kernel, Hsin-Hsiung Wang
This series adds support for new SoC MT6873/8192 to the pmic-wrap driver.
changes since v3:
- refine some coding style about PWRAP_CAP_ARB capacity for better code quality.
- make struct pwrap_mt6873 const.
- add pwrap node into Mediatek MT8192 dtsi.
Hsin-Hsiung Wang (5):
soc: mediatek: pwrap: use BIT() macro
soc: mediatek: pwrap: add arbiter capability
dt-bindings: mediatek: add compatible for MT6873/8192 pwrap
soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
arm64: dts: mt8192: add pwrap node
.../devicetree/bindings/soc/mediatek/pwrap.txt | 1 +
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 +++
drivers/soc/mediatek/mtk-pmic-wrap.c | 90 +++++++++++++++++++---
3 files changed, 92 insertions(+), 11 deletions(-)
--
2.6.4
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v4 0/5] Add PMIC wrapper support for Mediatek MT6873/8192 SoC IC
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, srv_heupstream, linux-kernel, linux-mediatek,
linux-arm-kernel, Hsin-Hsiung Wang
This series adds support for new SoC MT6873/8192 to the pmic-wrap driver.
changes since v3:
- refine some coding style about PWRAP_CAP_ARB capacity for better code quality.
- make struct pwrap_mt6873 const.
- add pwrap node into Mediatek MT8192 dtsi.
Hsin-Hsiung Wang (5):
soc: mediatek: pwrap: use BIT() macro
soc: mediatek: pwrap: add arbiter capability
dt-bindings: mediatek: add compatible for MT6873/8192 pwrap
soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
arm64: dts: mt8192: add pwrap node
.../devicetree/bindings/soc/mediatek/pwrap.txt | 1 +
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 +++
drivers/soc/mediatek/mtk-pmic-wrap.c | 90 +++++++++++++++++++---
3 files changed, 92 insertions(+), 11 deletions(-)
--
2.6.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 34+ messages in thread
* [PATCH v4 1/5] soc: mediatek: pwrap: use BIT() macro
2020-11-18 12:01 ` Hsin-Hsiung Wang
(?)
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
-1 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Hsin-Hsiung Wang
Use a better BIT() marco for the bit definition.
No functional changes, cleanup only.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 5d34e8b..c897205 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -27,8 +27,8 @@
#define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
#define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
#define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
-#define PWRAP_STATE_SYNC_IDLE0 (1 << 20)
-#define PWRAP_STATE_INIT_DONE0 (1 << 21)
+#define PWRAP_STATE_SYNC_IDLE0 BIT(20)
+#define PWRAP_STATE_INIT_DONE0 BIT(21)
/* macro for WACS FSM */
#define PWRAP_WACS_FSM_IDLE 0x00
--
2.6.4
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 1/5] soc: mediatek: pwrap: use BIT() macro
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, srv_heupstream, linux-kernel, linux-mediatek,
linux-arm-kernel, Hsin-Hsiung Wang
Use a better BIT() marco for the bit definition.
No functional changes, cleanup only.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 5d34e8b..c897205 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -27,8 +27,8 @@
#define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
#define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
#define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
-#define PWRAP_STATE_SYNC_IDLE0 (1 << 20)
-#define PWRAP_STATE_INIT_DONE0 (1 << 21)
+#define PWRAP_STATE_SYNC_IDLE0 BIT(20)
+#define PWRAP_STATE_INIT_DONE0 BIT(21)
/* macro for WACS FSM */
#define PWRAP_WACS_FSM_IDLE 0x00
--
2.6.4
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 1/5] soc: mediatek: pwrap: use BIT() macro
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, srv_heupstream, linux-kernel, linux-mediatek,
linux-arm-kernel, Hsin-Hsiung Wang
Use a better BIT() marco for the bit definition.
No functional changes, cleanup only.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 5d34e8b..c897205 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -27,8 +27,8 @@
#define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
#define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
#define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
-#define PWRAP_STATE_SYNC_IDLE0 (1 << 20)
-#define PWRAP_STATE_INIT_DONE0 (1 << 21)
+#define PWRAP_STATE_SYNC_IDLE0 BIT(20)
+#define PWRAP_STATE_INIT_DONE0 BIT(21)
/* macro for WACS FSM */
#define PWRAP_WACS_FSM_IDLE 0x00
--
2.6.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 2/5] soc: mediatek: pwrap: add arbiter capability
2020-11-18 12:01 ` Hsin-Hsiung Wang
(?)
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
-1 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Hsin-Hsiung Wang
Add arbiter capability for pwrap driver.
The arbiter capability uses new design to judge the priority and latency
for multi-channel.
This patch is preparing for adding mt6873/8192 pwrap support.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 57 ++++++++++++++++++++++++++++++------
1 file changed, 48 insertions(+), 9 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index c897205..5678f46 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -25,10 +25,12 @@
/* macro for wrapper status */
#define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
+#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x00000007)
#define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
#define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
#define PWRAP_STATE_SYNC_IDLE0 BIT(20)
#define PWRAP_STATE_INIT_DONE0 BIT(21)
+#define PWRAP_STATE_INIT_DONE1 BIT(15)
/* macro for WACS FSM */
#define PWRAP_WACS_FSM_IDLE 0x00
@@ -74,6 +76,7 @@
#define PWRAP_CAP_DCM BIT(2)
#define PWRAP_CAP_INT1_EN BIT(3)
#define PWRAP_CAP_WDT_SRC1 BIT(4)
+#define PWRAP_CAP_ARB BIT(5)
/* defines for slave device wrapper registers */
enum dew_regs {
@@ -340,6 +343,8 @@ enum pwrap_regs {
PWRAP_DCM_DBC_PRD,
PWRAP_EINT_STA0_ADR,
PWRAP_EINT_STA1_ADR,
+ PWRAP_SWINF_2_WDATA_31_0,
+ PWRAP_SWINF_2_RDATA_31_0,
/* MT2701 only regs */
PWRAP_ADC_CMD_ADDR,
@@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
{
- u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ u32 val;
+
+ val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
}
static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
{
- u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ u32 val;
+
+ val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
}
@@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
{
int ret;
+ u32 val;
ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
if (ret) {
@@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
return ret;
}
- pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ val = adr;
+ else
+ val = (adr >> 1) << 16;
+ pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
if (ret)
return ret;
- *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
+ else
+ val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ *rdata = PWRAP_GET_WACS_RDATA(val);
pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
@@ -1228,8 +1250,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
return ret;
}
- pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
- PWRAP_WACS2_CMD);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
+ pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
+ pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
+ } else {
+ pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
+ PWRAP_WACS2_CMD);
+ }
return 0;
}
@@ -2022,6 +2049,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
static int pwrap_probe(struct platform_device *pdev)
{
int ret, irq;
+ u32 mask_done;
struct pmic_wrapper *wrp;
struct device_node *np = pdev->dev.of_node;
const struct of_device_id *of_slave_id = NULL;
@@ -2116,14 +2144,21 @@ static int pwrap_probe(struct platform_device *pdev)
}
}
- if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ mask_done = PWRAP_STATE_INIT_DONE1;
+ else
+ mask_done = PWRAP_STATE_INIT_DONE0;
+
+ if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
dev_dbg(wrp->dev, "initialization isn't finished\n");
ret = -ENODEV;
goto err_out2;
}
/* Initialize watchdog, may not be done by the bootloader */
- pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
+ if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
+
/*
* Since STAUPD was not used on mt8173 platform,
* so STAUPD of WDT_SRC which should be turned off
@@ -2132,7 +2167,11 @@ static int pwrap_probe(struct platform_device *pdev)
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_WDT_SRC1))
pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN_1);
- pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
+ if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
+ else
+ pwrap_writel(wrp, 0x3, PWRAP_TIMER_EN);
+
pwrap_writel(wrp, wrp->master->int_en_all, PWRAP_INT_EN);
/*
* We add INT1 interrupt to handle starvation and request exception
--
2.6.4
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 2/5] soc: mediatek: pwrap: add arbiter capability
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, srv_heupstream, linux-kernel, linux-mediatek,
linux-arm-kernel, Hsin-Hsiung Wang
Add arbiter capability for pwrap driver.
The arbiter capability uses new design to judge the priority and latency
for multi-channel.
This patch is preparing for adding mt6873/8192 pwrap support.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 57 ++++++++++++++++++++++++++++++------
1 file changed, 48 insertions(+), 9 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index c897205..5678f46 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -25,10 +25,12 @@
/* macro for wrapper status */
#define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
+#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x00000007)
#define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
#define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
#define PWRAP_STATE_SYNC_IDLE0 BIT(20)
#define PWRAP_STATE_INIT_DONE0 BIT(21)
+#define PWRAP_STATE_INIT_DONE1 BIT(15)
/* macro for WACS FSM */
#define PWRAP_WACS_FSM_IDLE 0x00
@@ -74,6 +76,7 @@
#define PWRAP_CAP_DCM BIT(2)
#define PWRAP_CAP_INT1_EN BIT(3)
#define PWRAP_CAP_WDT_SRC1 BIT(4)
+#define PWRAP_CAP_ARB BIT(5)
/* defines for slave device wrapper registers */
enum dew_regs {
@@ -340,6 +343,8 @@ enum pwrap_regs {
PWRAP_DCM_DBC_PRD,
PWRAP_EINT_STA0_ADR,
PWRAP_EINT_STA1_ADR,
+ PWRAP_SWINF_2_WDATA_31_0,
+ PWRAP_SWINF_2_RDATA_31_0,
/* MT2701 only regs */
PWRAP_ADC_CMD_ADDR,
@@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
{
- u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ u32 val;
+
+ val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
}
static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
{
- u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ u32 val;
+
+ val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
}
@@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
{
int ret;
+ u32 val;
ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
if (ret) {
@@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
return ret;
}
- pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ val = adr;
+ else
+ val = (adr >> 1) << 16;
+ pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
if (ret)
return ret;
- *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
+ else
+ val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ *rdata = PWRAP_GET_WACS_RDATA(val);
pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
@@ -1228,8 +1250,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
return ret;
}
- pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
- PWRAP_WACS2_CMD);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
+ pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
+ pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
+ } else {
+ pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
+ PWRAP_WACS2_CMD);
+ }
return 0;
}
@@ -2022,6 +2049,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
static int pwrap_probe(struct platform_device *pdev)
{
int ret, irq;
+ u32 mask_done;
struct pmic_wrapper *wrp;
struct device_node *np = pdev->dev.of_node;
const struct of_device_id *of_slave_id = NULL;
@@ -2116,14 +2144,21 @@ static int pwrap_probe(struct platform_device *pdev)
}
}
- if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ mask_done = PWRAP_STATE_INIT_DONE1;
+ else
+ mask_done = PWRAP_STATE_INIT_DONE0;
+
+ if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
dev_dbg(wrp->dev, "initialization isn't finished\n");
ret = -ENODEV;
goto err_out2;
}
/* Initialize watchdog, may not be done by the bootloader */
- pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
+ if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
+
/*
* Since STAUPD was not used on mt8173 platform,
* so STAUPD of WDT_SRC which should be turned off
@@ -2132,7 +2167,11 @@ static int pwrap_probe(struct platform_device *pdev)
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_WDT_SRC1))
pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN_1);
- pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
+ if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
+ else
+ pwrap_writel(wrp, 0x3, PWRAP_TIMER_EN);
+
pwrap_writel(wrp, wrp->master->int_en_all, PWRAP_INT_EN);
/*
* We add INT1 interrupt to handle starvation and request exception
--
2.6.4
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 2/5] soc: mediatek: pwrap: add arbiter capability
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, srv_heupstream, linux-kernel, linux-mediatek,
linux-arm-kernel, Hsin-Hsiung Wang
Add arbiter capability for pwrap driver.
The arbiter capability uses new design to judge the priority and latency
for multi-channel.
This patch is preparing for adding mt6873/8192 pwrap support.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 57 ++++++++++++++++++++++++++++++------
1 file changed, 48 insertions(+), 9 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index c897205..5678f46 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -25,10 +25,12 @@
/* macro for wrapper status */
#define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
+#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x00000007)
#define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
#define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
#define PWRAP_STATE_SYNC_IDLE0 BIT(20)
#define PWRAP_STATE_INIT_DONE0 BIT(21)
+#define PWRAP_STATE_INIT_DONE1 BIT(15)
/* macro for WACS FSM */
#define PWRAP_WACS_FSM_IDLE 0x00
@@ -74,6 +76,7 @@
#define PWRAP_CAP_DCM BIT(2)
#define PWRAP_CAP_INT1_EN BIT(3)
#define PWRAP_CAP_WDT_SRC1 BIT(4)
+#define PWRAP_CAP_ARB BIT(5)
/* defines for slave device wrapper registers */
enum dew_regs {
@@ -340,6 +343,8 @@ enum pwrap_regs {
PWRAP_DCM_DBC_PRD,
PWRAP_EINT_STA0_ADR,
PWRAP_EINT_STA1_ADR,
+ PWRAP_SWINF_2_WDATA_31_0,
+ PWRAP_SWINF_2_RDATA_31_0,
/* MT2701 only regs */
PWRAP_ADC_CMD_ADDR,
@@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
{
- u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ u32 val;
+
+ val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
}
static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
{
- u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ u32 val;
+
+ val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
}
@@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
{
int ret;
+ u32 val;
ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
if (ret) {
@@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
return ret;
}
- pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ val = adr;
+ else
+ val = (adr >> 1) << 16;
+ pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
if (ret)
return ret;
- *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
+ else
+ val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
+ *rdata = PWRAP_GET_WACS_RDATA(val);
pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
@@ -1228,8 +1250,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
return ret;
}
- pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
- PWRAP_WACS2_CMD);
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
+ pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
+ pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
+ } else {
+ pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
+ PWRAP_WACS2_CMD);
+ }
return 0;
}
@@ -2022,6 +2049,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
static int pwrap_probe(struct platform_device *pdev)
{
int ret, irq;
+ u32 mask_done;
struct pmic_wrapper *wrp;
struct device_node *np = pdev->dev.of_node;
const struct of_device_id *of_slave_id = NULL;
@@ -2116,14 +2144,21 @@ static int pwrap_probe(struct platform_device *pdev)
}
}
- if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
+ if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ mask_done = PWRAP_STATE_INIT_DONE1;
+ else
+ mask_done = PWRAP_STATE_INIT_DONE0;
+
+ if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
dev_dbg(wrp->dev, "initialization isn't finished\n");
ret = -ENODEV;
goto err_out2;
}
/* Initialize watchdog, may not be done by the bootloader */
- pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
+ if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
+
/*
* Since STAUPD was not used on mt8173 platform,
* so STAUPD of WDT_SRC which should be turned off
@@ -2132,7 +2167,11 @@ static int pwrap_probe(struct platform_device *pdev)
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_WDT_SRC1))
pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN_1);
- pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
+ if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
+ pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
+ else
+ pwrap_writel(wrp, 0x3, PWRAP_TIMER_EN);
+
pwrap_writel(wrp, wrp->master->int_en_all, PWRAP_INT_EN);
/*
* We add INT1 interrupt to handle starvation and request exception
--
2.6.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 3/5] dt-bindings: mediatek: add compatible for MT6873/8192 pwrap
2020-11-18 12:01 ` Hsin-Hsiung Wang
(?)
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
-1 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Hsin-Hsiung Wang
This adds dt-binding documentation of pwrap for Mediatek MT6873/8192
SoCs Platform.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
index ecac2bb..8051c17 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
@@ -22,6 +22,7 @@ Required properties in pwrap device node.
"mediatek,mt6765-pwrap" for MT6765 SoCs
"mediatek,mt6779-pwrap" for MT6779 SoCs
"mediatek,mt6797-pwrap" for MT6797 SoCs
+ "mediatek,mt6873-pwrap" for MT6873/8192 SoCs
"mediatek,mt7622-pwrap" for MT7622 SoCs
"mediatek,mt8135-pwrap" for MT8135 SoCs
"mediatek,mt8173-pwrap" for MT8173 SoCs
--
2.6.4
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 3/5] dt-bindings: mediatek: add compatible for MT6873/8192 pwrap
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, srv_heupstream, linux-kernel, linux-mediatek,
linux-arm-kernel, Hsin-Hsiung Wang
This adds dt-binding documentation of pwrap for Mediatek MT6873/8192
SoCs Platform.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
index ecac2bb..8051c17 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
@@ -22,6 +22,7 @@ Required properties in pwrap device node.
"mediatek,mt6765-pwrap" for MT6765 SoCs
"mediatek,mt6779-pwrap" for MT6779 SoCs
"mediatek,mt6797-pwrap" for MT6797 SoCs
+ "mediatek,mt6873-pwrap" for MT6873/8192 SoCs
"mediatek,mt7622-pwrap" for MT7622 SoCs
"mediatek,mt8135-pwrap" for MT8135 SoCs
"mediatek,mt8173-pwrap" for MT8173 SoCs
--
2.6.4
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 3/5] dt-bindings: mediatek: add compatible for MT6873/8192 pwrap
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, srv_heupstream, linux-kernel, linux-mediatek,
linux-arm-kernel, Hsin-Hsiung Wang
This adds dt-binding documentation of pwrap for Mediatek MT6873/8192
SoCs Platform.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
---
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
index ecac2bb..8051c17 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
@@ -22,6 +22,7 @@ Required properties in pwrap device node.
"mediatek,mt6765-pwrap" for MT6765 SoCs
"mediatek,mt6779-pwrap" for MT6779 SoCs
"mediatek,mt6797-pwrap" for MT6797 SoCs
+ "mediatek,mt6873-pwrap" for MT6873/8192 SoCs
"mediatek,mt7622-pwrap" for MT7622 SoCs
"mediatek,mt8135-pwrap" for MT8135 SoCs
"mediatek,mt8173-pwrap" for MT8173 SoCs
--
2.6.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
2020-11-18 12:01 ` Hsin-Hsiung Wang
(?)
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
-1 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Hsin-Hsiung Wang
MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 5678f46..d1cd050 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -632,6 +632,17 @@ static int mt6797_regs[] = {
[PWRAP_DCM_DBC_PRD] = 0x1D4,
};
+static int mt6873_regs[] = {
+ [PWRAP_INIT_DONE2] = 0x0,
+ [PWRAP_TIMER_EN] = 0x3E0,
+ [PWRAP_INT_EN] = 0x448,
+ [PWRAP_WACS2_CMD] = 0xC80,
+ [PWRAP_SWINF_2_WDATA_31_0] = 0xC84,
+ [PWRAP_SWINF_2_RDATA_31_0] = 0xC94,
+ [PWRAP_WACS2_VLDCLR] = 0xCA4,
+ [PWRAP_WACS2_RDATA] = 0xCA8,
+};
+
static int mt7622_regs[] = {
[PWRAP_MUX_SEL] = 0x0,
[PWRAP_WRAP_EN] = 0x4,
@@ -1050,6 +1061,7 @@ enum pwrap_type {
PWRAP_MT6765,
PWRAP_MT6779,
PWRAP_MT6797,
+ PWRAP_MT6873,
PWRAP_MT7622,
PWRAP_MT8135,
PWRAP_MT8173,
@@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
case PWRAP_MT7622:
pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
break;
+ case PWRAP_MT6873:
case PWRAP_MT8183:
break;
}
@@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
.init_soc_specific = NULL,
};
+static const struct pmic_wrapper_type pwrap_mt6873 = {
+ .regs = mt6873_regs,
+ .type = PWRAP_MT6873,
+ .arb_en_all = 0x777f,
+ .int_en_all = BIT(4) | BIT(5),
+ .int1_en_all = 0,
+ .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+ .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+ .caps = PWRAP_CAP_ARB,
+ .init_reg_clock = pwrap_common_init_reg_clock,
+ .init_soc_specific = NULL,
+};
+
static const struct pmic_wrapper_type pwrap_mt7622 = {
.regs = mt7622_regs,
.type = PWRAP_MT7622,
@@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
.compatible = "mediatek,mt6797-pwrap",
.data = &pwrap_mt6797,
}, {
+ .compatible = "mediatek,mt6873-pwrap",
+ .data = &pwrap_mt6873,
+ }, {
.compatible = "mediatek,mt7622-pwrap",
.data = &pwrap_mt7622,
}, {
--
2.6.4
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, srv_heupstream, linux-kernel, linux-mediatek,
linux-arm-kernel, Hsin-Hsiung Wang
MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 5678f46..d1cd050 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -632,6 +632,17 @@ static int mt6797_regs[] = {
[PWRAP_DCM_DBC_PRD] = 0x1D4,
};
+static int mt6873_regs[] = {
+ [PWRAP_INIT_DONE2] = 0x0,
+ [PWRAP_TIMER_EN] = 0x3E0,
+ [PWRAP_INT_EN] = 0x448,
+ [PWRAP_WACS2_CMD] = 0xC80,
+ [PWRAP_SWINF_2_WDATA_31_0] = 0xC84,
+ [PWRAP_SWINF_2_RDATA_31_0] = 0xC94,
+ [PWRAP_WACS2_VLDCLR] = 0xCA4,
+ [PWRAP_WACS2_RDATA] = 0xCA8,
+};
+
static int mt7622_regs[] = {
[PWRAP_MUX_SEL] = 0x0,
[PWRAP_WRAP_EN] = 0x4,
@@ -1050,6 +1061,7 @@ enum pwrap_type {
PWRAP_MT6765,
PWRAP_MT6779,
PWRAP_MT6797,
+ PWRAP_MT6873,
PWRAP_MT7622,
PWRAP_MT8135,
PWRAP_MT8173,
@@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
case PWRAP_MT7622:
pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
break;
+ case PWRAP_MT6873:
case PWRAP_MT8183:
break;
}
@@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
.init_soc_specific = NULL,
};
+static const struct pmic_wrapper_type pwrap_mt6873 = {
+ .regs = mt6873_regs,
+ .type = PWRAP_MT6873,
+ .arb_en_all = 0x777f,
+ .int_en_all = BIT(4) | BIT(5),
+ .int1_en_all = 0,
+ .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+ .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+ .caps = PWRAP_CAP_ARB,
+ .init_reg_clock = pwrap_common_init_reg_clock,
+ .init_soc_specific = NULL,
+};
+
static const struct pmic_wrapper_type pwrap_mt7622 = {
.regs = mt7622_regs,
.type = PWRAP_MT7622,
@@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
.compatible = "mediatek,mt6797-pwrap",
.data = &pwrap_mt6797,
}, {
+ .compatible = "mediatek,mt6873-pwrap",
+ .data = &pwrap_mt6873,
+ }, {
.compatible = "mediatek,mt7622-pwrap",
.data = &pwrap_mt7622,
}, {
--
2.6.4
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, srv_heupstream, linux-kernel, linux-mediatek,
linux-arm-kernel, Hsin-Hsiung Wang
MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
power management. This patch adds pwrap master driver to
access PMIC_MT6359.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 5678f46..d1cd050 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -632,6 +632,17 @@ static int mt6797_regs[] = {
[PWRAP_DCM_DBC_PRD] = 0x1D4,
};
+static int mt6873_regs[] = {
+ [PWRAP_INIT_DONE2] = 0x0,
+ [PWRAP_TIMER_EN] = 0x3E0,
+ [PWRAP_INT_EN] = 0x448,
+ [PWRAP_WACS2_CMD] = 0xC80,
+ [PWRAP_SWINF_2_WDATA_31_0] = 0xC84,
+ [PWRAP_SWINF_2_RDATA_31_0] = 0xC94,
+ [PWRAP_WACS2_VLDCLR] = 0xCA4,
+ [PWRAP_WACS2_RDATA] = 0xCA8,
+};
+
static int mt7622_regs[] = {
[PWRAP_MUX_SEL] = 0x0,
[PWRAP_WRAP_EN] = 0x4,
@@ -1050,6 +1061,7 @@ enum pwrap_type {
PWRAP_MT6765,
PWRAP_MT6779,
PWRAP_MT6797,
+ PWRAP_MT6873,
PWRAP_MT7622,
PWRAP_MT8135,
PWRAP_MT8173,
@@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
case PWRAP_MT7622:
pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
break;
+ case PWRAP_MT6873:
case PWRAP_MT8183:
break;
}
@@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
.init_soc_specific = NULL,
};
+static const struct pmic_wrapper_type pwrap_mt6873 = {
+ .regs = mt6873_regs,
+ .type = PWRAP_MT6873,
+ .arb_en_all = 0x777f,
+ .int_en_all = BIT(4) | BIT(5),
+ .int1_en_all = 0,
+ .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+ .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+ .caps = PWRAP_CAP_ARB,
+ .init_reg_clock = pwrap_common_init_reg_clock,
+ .init_soc_specific = NULL,
+};
+
static const struct pmic_wrapper_type pwrap_mt7622 = {
.regs = mt7622_regs,
.type = PWRAP_MT7622,
@@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
.compatible = "mediatek,mt6797-pwrap",
.data = &pwrap_mt6797,
}, {
+ .compatible = "mediatek,mt6873-pwrap",
+ .data = &pwrap_mt6873,
+ }, {
.compatible = "mediatek,mt7622-pwrap",
.data = &pwrap_mt7622,
}, {
--
2.6.4
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 5/5] arm64: dts: mt8192: add pwrap node
2020-11-18 12:01 ` Hsin-Hsiung Wang
(?)
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
-1 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, linux-kernel, linux-arm-kernel, linux-mediatek,
srv_heupstream, Hsin-Hsiung Wang
Add pwrap node to SOC MT8192.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 69d45c7..9a40d19 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -272,6 +272,18 @@
clock-names = "clk13m";
};
+ pwrap: pwrap@10026000 {
+ compatible = "mediatek,mt6873-pwrap";
+ reg = <0 0x10026000 0 0x1000>;
+ reg-names = "pwrap";
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&infracfg CLK_INFRA_PMIC_AP>,
+ <&infracfg CLK_INFRA_PMIC_TMR>;
+ clock-names = "spi", "wrap";
+ assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
+ };
+
scp_adsp: syscon@10720000 {
compatible = "mediatek,mt8192-scp_adsp", "syscon";
reg = <0 0x10720000 0 0x1000>;
--
2.6.4
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 5/5] arm64: dts: mt8192: add pwrap node
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, srv_heupstream, linux-kernel, linux-mediatek,
linux-arm-kernel, Hsin-Hsiung Wang
Add pwrap node to SOC MT8192.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 69d45c7..9a40d19 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -272,6 +272,18 @@
clock-names = "clk13m";
};
+ pwrap: pwrap@10026000 {
+ compatible = "mediatek,mt6873-pwrap";
+ reg = <0 0x10026000 0 0x1000>;
+ reg-names = "pwrap";
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&infracfg CLK_INFRA_PMIC_AP>,
+ <&infracfg CLK_INFRA_PMIC_TMR>;
+ clock-names = "spi", "wrap";
+ assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
+ };
+
scp_adsp: syscon@10720000 {
compatible = "mediatek,mt8192-scp_adsp", "syscon";
reg = <0 0x10720000 0 0x1000>;
--
2.6.4
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 34+ messages in thread
* [PATCH v4 5/5] arm64: dts: mt8192: add pwrap node
@ 2020-11-18 12:01 ` Hsin-Hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-Hsiung Wang @ 2020-11-18 12:01 UTC (permalink / raw)
To: Rob Herring, Matthias Brugger, fshao, Argus Lin
Cc: devicetree, srv_heupstream, linux-kernel, linux-mediatek,
linux-arm-kernel, Hsin-Hsiung Wang
Add pwrap node to SOC MT8192.
Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8192.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 69d45c7..9a40d19 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -272,6 +272,18 @@
clock-names = "clk13m";
};
+ pwrap: pwrap@10026000 {
+ compatible = "mediatek,mt6873-pwrap";
+ reg = <0 0x10026000 0 0x1000>;
+ reg-names = "pwrap";
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&infracfg CLK_INFRA_PMIC_AP>,
+ <&infracfg CLK_INFRA_PMIC_TMR>;
+ clock-names = "spi", "wrap";
+ assigned-clocks = <&topckgen CLK_TOP_PWRAP_ULPOSC_SEL>;
+ assigned-clock-parents = <&topckgen CLK_TOP_OSC_D10>;
+ };
+
scp_adsp: syscon@10720000 {
compatible = "mediatek,mt8192-scp_adsp", "syscon";
reg = <0 0x10720000 0 0x1000>;
--
2.6.4
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 34+ messages in thread
* Re: [PATCH v4 1/5] soc: mediatek: pwrap: use BIT() macro
2020-11-18 12:01 ` Hsin-Hsiung Wang
(?)
@ 2020-12-21 2:24 ` Nicolas Boichat
-1 siblings, 0 replies; 34+ messages in thread
From: Nicolas Boichat @ 2020-12-21 2:24 UTC (permalink / raw)
To: Hsin-Hsiung Wang
Cc: Rob Herring, Matthias Brugger, Fei Shao, Argus Lin,
Devicetree List, lkml, linux-arm Mailing List,
moderated list:ARM/Mediatek SoC support, srv_heupstream
On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
<hsin-hsiung.wang@mediatek.com> wrote:
>
> Use a better BIT() marco for the bit definition.
> No functional changes, cleanup only.
>
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 5d34e8b..c897205 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -27,8 +27,8 @@
> #define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
> #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
> #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
> -#define PWRAP_STATE_SYNC_IDLE0 (1 << 20)
> -#define PWRAP_STATE_INIT_DONE0 (1 << 21)
> +#define PWRAP_STATE_SYNC_IDLE0 BIT(20)
> +#define PWRAP_STATE_INIT_DONE0 BIT(21)
>
> /* macro for WACS FSM */
> #define PWRAP_WACS_FSM_IDLE 0x00
> --
> 2.6.4
>
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 1/5] soc: mediatek: pwrap: use BIT() macro
@ 2020-12-21 2:24 ` Nicolas Boichat
0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Boichat @ 2020-12-21 2:24 UTC (permalink / raw)
To: Hsin-Hsiung Wang
Cc: Devicetree List, srv_heupstream, Argus Lin, Fei Shao, lkml,
Rob Herring, moderated list:ARM/Mediatek SoC support,
Matthias Brugger, linux-arm Mailing List
On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
<hsin-hsiung.wang@mediatek.com> wrote:
>
> Use a better BIT() marco for the bit definition.
> No functional changes, cleanup only.
>
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 5d34e8b..c897205 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -27,8 +27,8 @@
> #define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
> #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
> #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
> -#define PWRAP_STATE_SYNC_IDLE0 (1 << 20)
> -#define PWRAP_STATE_INIT_DONE0 (1 << 21)
> +#define PWRAP_STATE_SYNC_IDLE0 BIT(20)
> +#define PWRAP_STATE_INIT_DONE0 BIT(21)
>
> /* macro for WACS FSM */
> #define PWRAP_WACS_FSM_IDLE 0x00
> --
> 2.6.4
>
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 1/5] soc: mediatek: pwrap: use BIT() macro
@ 2020-12-21 2:24 ` Nicolas Boichat
0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Boichat @ 2020-12-21 2:24 UTC (permalink / raw)
To: Hsin-Hsiung Wang
Cc: Devicetree List, srv_heupstream, Argus Lin, Fei Shao, lkml,
Rob Herring, moderated list:ARM/Mediatek SoC support,
Matthias Brugger, linux-arm Mailing List
On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
<hsin-hsiung.wang@mediatek.com> wrote:
>
> Use a better BIT() marco for the bit definition.
> No functional changes, cleanup only.
>
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 5d34e8b..c897205 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -27,8 +27,8 @@
> #define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
> #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
> #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
> -#define PWRAP_STATE_SYNC_IDLE0 (1 << 20)
> -#define PWRAP_STATE_INIT_DONE0 (1 << 21)
> +#define PWRAP_STATE_SYNC_IDLE0 BIT(20)
> +#define PWRAP_STATE_INIT_DONE0 BIT(21)
>
> /* macro for WACS FSM */
> #define PWRAP_WACS_FSM_IDLE 0x00
> --
> 2.6.4
>
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 2/5] soc: mediatek: pwrap: add arbiter capability
2020-11-18 12:01 ` Hsin-Hsiung Wang
(?)
@ 2020-12-21 2:33 ` Nicolas Boichat
-1 siblings, 0 replies; 34+ messages in thread
From: Nicolas Boichat @ 2020-12-21 2:33 UTC (permalink / raw)
To: Hsin-Hsiung Wang
Cc: Rob Herring, Matthias Brugger, Fei Shao, Argus Lin,
Devicetree List, srv_heupstream, lkml,
moderated list:ARM/Mediatek SoC support, linux-arm Mailing List
On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
<hsin-hsiung.wang@mediatek.com> wrote:
>
> Add arbiter capability for pwrap driver.
> The arbiter capability uses new design to judge the priority and latency
> for multi-channel.
> This patch is preparing for adding mt6873/8192 pwrap support.
>
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 57 ++++++++++++++++++++++++++++++------
> 1 file changed, 48 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index c897205..5678f46 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -25,10 +25,12 @@
>
> /* macro for wrapper status */
> #define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
> +#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x00000007)
> #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
> #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
> #define PWRAP_STATE_SYNC_IDLE0 BIT(20)
> #define PWRAP_STATE_INIT_DONE0 BIT(21)
> +#define PWRAP_STATE_INIT_DONE1 BIT(15)
>
> /* macro for WACS FSM */
> #define PWRAP_WACS_FSM_IDLE 0x00
> @@ -74,6 +76,7 @@
> #define PWRAP_CAP_DCM BIT(2)
> #define PWRAP_CAP_INT1_EN BIT(3)
> #define PWRAP_CAP_WDT_SRC1 BIT(4)
> +#define PWRAP_CAP_ARB BIT(5)
>
> /* defines for slave device wrapper registers */
> enum dew_regs {
> @@ -340,6 +343,8 @@ enum pwrap_regs {
> PWRAP_DCM_DBC_PRD,
> PWRAP_EINT_STA0_ADR,
> PWRAP_EINT_STA1_ADR,
> + PWRAP_SWINF_2_WDATA_31_0,
> + PWRAP_SWINF_2_RDATA_31_0,
>
> /* MT2701 only regs */
> PWRAP_ADC_CMD_ADDR,
> @@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
>
> static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
> {
> - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + u32 val;
> +
> + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
>
> return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
> }
>
> static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
> {
> - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + u32 val;
> +
> + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
This code is now copied twice. Do you think it'd be better to create a
new function?
static u32 pwrap_get_fsm_state(struct pmic_wrapper *wrp) {
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
return PWRAP_GET_WACS_ARB_FSM(val);
else
return PWRAP_GET_WACS_FSM(val);
}
>
> return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
> }
> @@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
> static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> {
> int ret;
> + u32 val;
>
> ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
> if (ret) {
> @@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> return ret;
> }
>
> - pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + val = adr;
> + else
> + val = (adr >> 1) << 16;
> + pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
>
> ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
> if (ret)
> return ret;
>
> - *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
> + else
> + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + *rdata = PWRAP_GET_WACS_RDATA(val);
>
> pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
>
> @@ -1228,8 +1250,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
> return ret;
> }
>
> - pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
> - PWRAP_WACS2_CMD);
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
> + pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
> + pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
> + } else {
> + pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
> + PWRAP_WACS2_CMD);
> + }
>
> return 0;
> }
> @@ -2022,6 +2049,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
> static int pwrap_probe(struct platform_device *pdev)
> {
> int ret, irq;
> + u32 mask_done;
> struct pmic_wrapper *wrp;
> struct device_node *np = pdev->dev.of_node;
> const struct of_device_id *of_slave_id = NULL;
> @@ -2116,14 +2144,21 @@ static int pwrap_probe(struct platform_device *pdev)
> }
> }
>
> - if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + mask_done = PWRAP_STATE_INIT_DONE1;
> + else
> + mask_done = PWRAP_STATE_INIT_DONE0;
> +
> + if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
> dev_dbg(wrp->dev, "initialization isn't finished\n");
> ret = -ENODEV;
> goto err_out2;
> }
>
> /* Initialize watchdog, may not be done by the bootloader */
> - pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> +
To expand on Matthias' question on v3
(https://patchwork.kernel.org/project/linux-mediatek/patch/1600686235-27979-3-git-send-email-hsin-hsiung.wang@mediatek.com/):
is there any PWRAP implementation where a design with an arbiter is
still able to control the watchdog?
If not, at the very least, it'd be good to expand the comment above
(e.g. "designs with arbiter support cannot change the watchdog
timer").
> /*
> * Since STAUPD was not used on mt8173 platform,
> * so STAUPD of WDT_SRC which should be turned off
> @@ -2132,7 +2167,11 @@ static int pwrap_probe(struct platform_device *pdev)
> if (HAS_CAP(wrp->master->caps, PWRAP_CAP_WDT_SRC1))
> pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN_1);
>
> - pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
Please invert this if test:
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
... 0x3 ...
else
... 0x1 ...
> + pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> + else
> + pwrap_writel(wrp, 0x3, PWRAP_TIMER_EN);
> +
> pwrap_writel(wrp, wrp->master->int_en_all, PWRAP_INT_EN);
> /*
> * We add INT1 interrupt to handle starvation and request exception
> --
> 2.6.4
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 2/5] soc: mediatek: pwrap: add arbiter capability
@ 2020-12-21 2:33 ` Nicolas Boichat
0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Boichat @ 2020-12-21 2:33 UTC (permalink / raw)
To: Hsin-Hsiung Wang
Cc: Devicetree List, Argus Lin, srv_heupstream, Fei Shao, lkml,
Rob Herring, moderated list:ARM/Mediatek SoC support,
Matthias Brugger, linux-arm Mailing List
On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
<hsin-hsiung.wang@mediatek.com> wrote:
>
> Add arbiter capability for pwrap driver.
> The arbiter capability uses new design to judge the priority and latency
> for multi-channel.
> This patch is preparing for adding mt6873/8192 pwrap support.
>
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 57 ++++++++++++++++++++++++++++++------
> 1 file changed, 48 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index c897205..5678f46 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -25,10 +25,12 @@
>
> /* macro for wrapper status */
> #define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
> +#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x00000007)
> #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
> #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
> #define PWRAP_STATE_SYNC_IDLE0 BIT(20)
> #define PWRAP_STATE_INIT_DONE0 BIT(21)
> +#define PWRAP_STATE_INIT_DONE1 BIT(15)
>
> /* macro for WACS FSM */
> #define PWRAP_WACS_FSM_IDLE 0x00
> @@ -74,6 +76,7 @@
> #define PWRAP_CAP_DCM BIT(2)
> #define PWRAP_CAP_INT1_EN BIT(3)
> #define PWRAP_CAP_WDT_SRC1 BIT(4)
> +#define PWRAP_CAP_ARB BIT(5)
>
> /* defines for slave device wrapper registers */
> enum dew_regs {
> @@ -340,6 +343,8 @@ enum pwrap_regs {
> PWRAP_DCM_DBC_PRD,
> PWRAP_EINT_STA0_ADR,
> PWRAP_EINT_STA1_ADR,
> + PWRAP_SWINF_2_WDATA_31_0,
> + PWRAP_SWINF_2_RDATA_31_0,
>
> /* MT2701 only regs */
> PWRAP_ADC_CMD_ADDR,
> @@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
>
> static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
> {
> - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + u32 val;
> +
> + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
>
> return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
> }
>
> static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
> {
> - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + u32 val;
> +
> + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
This code is now copied twice. Do you think it'd be better to create a
new function?
static u32 pwrap_get_fsm_state(struct pmic_wrapper *wrp) {
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
return PWRAP_GET_WACS_ARB_FSM(val);
else
return PWRAP_GET_WACS_FSM(val);
}
>
> return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
> }
> @@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
> static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> {
> int ret;
> + u32 val;
>
> ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
> if (ret) {
> @@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> return ret;
> }
>
> - pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + val = adr;
> + else
> + val = (adr >> 1) << 16;
> + pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
>
> ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
> if (ret)
> return ret;
>
> - *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
> + else
> + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + *rdata = PWRAP_GET_WACS_RDATA(val);
>
> pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
>
> @@ -1228,8 +1250,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
> return ret;
> }
>
> - pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
> - PWRAP_WACS2_CMD);
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
> + pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
> + pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
> + } else {
> + pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
> + PWRAP_WACS2_CMD);
> + }
>
> return 0;
> }
> @@ -2022,6 +2049,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
> static int pwrap_probe(struct platform_device *pdev)
> {
> int ret, irq;
> + u32 mask_done;
> struct pmic_wrapper *wrp;
> struct device_node *np = pdev->dev.of_node;
> const struct of_device_id *of_slave_id = NULL;
> @@ -2116,14 +2144,21 @@ static int pwrap_probe(struct platform_device *pdev)
> }
> }
>
> - if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + mask_done = PWRAP_STATE_INIT_DONE1;
> + else
> + mask_done = PWRAP_STATE_INIT_DONE0;
> +
> + if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
> dev_dbg(wrp->dev, "initialization isn't finished\n");
> ret = -ENODEV;
> goto err_out2;
> }
>
> /* Initialize watchdog, may not be done by the bootloader */
> - pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> +
To expand on Matthias' question on v3
(https://patchwork.kernel.org/project/linux-mediatek/patch/1600686235-27979-3-git-send-email-hsin-hsiung.wang@mediatek.com/):
is there any PWRAP implementation where a design with an arbiter is
still able to control the watchdog?
If not, at the very least, it'd be good to expand the comment above
(e.g. "designs with arbiter support cannot change the watchdog
timer").
> /*
> * Since STAUPD was not used on mt8173 platform,
> * so STAUPD of WDT_SRC which should be turned off
> @@ -2132,7 +2167,11 @@ static int pwrap_probe(struct platform_device *pdev)
> if (HAS_CAP(wrp->master->caps, PWRAP_CAP_WDT_SRC1))
> pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN_1);
>
> - pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
Please invert this if test:
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
... 0x3 ...
else
... 0x1 ...
> + pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> + else
> + pwrap_writel(wrp, 0x3, PWRAP_TIMER_EN);
> +
> pwrap_writel(wrp, wrp->master->int_en_all, PWRAP_INT_EN);
> /*
> * We add INT1 interrupt to handle starvation and request exception
> --
> 2.6.4
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 2/5] soc: mediatek: pwrap: add arbiter capability
@ 2020-12-21 2:33 ` Nicolas Boichat
0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Boichat @ 2020-12-21 2:33 UTC (permalink / raw)
To: Hsin-Hsiung Wang
Cc: Devicetree List, Argus Lin, srv_heupstream, Fei Shao, lkml,
Rob Herring, moderated list:ARM/Mediatek SoC support,
Matthias Brugger, linux-arm Mailing List
On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
<hsin-hsiung.wang@mediatek.com> wrote:
>
> Add arbiter capability for pwrap driver.
> The arbiter capability uses new design to judge the priority and latency
> for multi-channel.
> This patch is preparing for adding mt6873/8192 pwrap support.
>
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 57 ++++++++++++++++++++++++++++++------
> 1 file changed, 48 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index c897205..5678f46 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -25,10 +25,12 @@
>
> /* macro for wrapper status */
> #define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
> +#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x00000007)
> #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
> #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
> #define PWRAP_STATE_SYNC_IDLE0 BIT(20)
> #define PWRAP_STATE_INIT_DONE0 BIT(21)
> +#define PWRAP_STATE_INIT_DONE1 BIT(15)
>
> /* macro for WACS FSM */
> #define PWRAP_WACS_FSM_IDLE 0x00
> @@ -74,6 +76,7 @@
> #define PWRAP_CAP_DCM BIT(2)
> #define PWRAP_CAP_INT1_EN BIT(3)
> #define PWRAP_CAP_WDT_SRC1 BIT(4)
> +#define PWRAP_CAP_ARB BIT(5)
>
> /* defines for slave device wrapper registers */
> enum dew_regs {
> @@ -340,6 +343,8 @@ enum pwrap_regs {
> PWRAP_DCM_DBC_PRD,
> PWRAP_EINT_STA0_ADR,
> PWRAP_EINT_STA1_ADR,
> + PWRAP_SWINF_2_WDATA_31_0,
> + PWRAP_SWINF_2_RDATA_31_0,
>
> /* MT2701 only regs */
> PWRAP_ADC_CMD_ADDR,
> @@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
>
> static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
> {
> - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + u32 val;
> +
> + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
>
> return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
> }
>
> static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
> {
> - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + u32 val;
> +
> + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
This code is now copied twice. Do you think it'd be better to create a
new function?
static u32 pwrap_get_fsm_state(struct pmic_wrapper *wrp) {
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
return PWRAP_GET_WACS_ARB_FSM(val);
else
return PWRAP_GET_WACS_FSM(val);
}
>
> return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
> }
> @@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
> static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> {
> int ret;
> + u32 val;
>
> ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
> if (ret) {
> @@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> return ret;
> }
>
> - pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + val = adr;
> + else
> + val = (adr >> 1) << 16;
> + pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
>
> ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
> if (ret)
> return ret;
>
> - *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
> + else
> + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> + *rdata = PWRAP_GET_WACS_RDATA(val);
>
> pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
>
> @@ -1228,8 +1250,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
> return ret;
> }
>
> - pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
> - PWRAP_WACS2_CMD);
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
> + pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
> + pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
> + } else {
> + pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
> + PWRAP_WACS2_CMD);
> + }
>
> return 0;
> }
> @@ -2022,6 +2049,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
> static int pwrap_probe(struct platform_device *pdev)
> {
> int ret, irq;
> + u32 mask_done;
> struct pmic_wrapper *wrp;
> struct device_node *np = pdev->dev.of_node;
> const struct of_device_id *of_slave_id = NULL;
> @@ -2116,14 +2144,21 @@ static int pwrap_probe(struct platform_device *pdev)
> }
> }
>
> - if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + mask_done = PWRAP_STATE_INIT_DONE1;
> + else
> + mask_done = PWRAP_STATE_INIT_DONE0;
> +
> + if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
> dev_dbg(wrp->dev, "initialization isn't finished\n");
> ret = -ENODEV;
> goto err_out2;
> }
>
> /* Initialize watchdog, may not be done by the bootloader */
> - pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> + pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> +
To expand on Matthias' question on v3
(https://patchwork.kernel.org/project/linux-mediatek/patch/1600686235-27979-3-git-send-email-hsin-hsiung.wang@mediatek.com/):
is there any PWRAP implementation where a design with an arbiter is
still able to control the watchdog?
If not, at the very least, it'd be good to expand the comment above
(e.g. "designs with arbiter support cannot change the watchdog
timer").
> /*
> * Since STAUPD was not used on mt8173 platform,
> * so STAUPD of WDT_SRC which should be turned off
> @@ -2132,7 +2167,11 @@ static int pwrap_probe(struct platform_device *pdev)
> if (HAS_CAP(wrp->master->caps, PWRAP_CAP_WDT_SRC1))
> pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN_1);
>
> - pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
Please invert this if test:
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
... 0x3 ...
else
... 0x1 ...
> + pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> + else
> + pwrap_writel(wrp, 0x3, PWRAP_TIMER_EN);
> +
> pwrap_writel(wrp, wrp->master->int_en_all, PWRAP_INT_EN);
> /*
> * We add INT1 interrupt to handle starvation and request exception
> --
> 2.6.4
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
2020-11-18 12:01 ` Hsin-Hsiung Wang
(?)
@ 2020-12-21 2:42 ` Nicolas Boichat
-1 siblings, 0 replies; 34+ messages in thread
From: Nicolas Boichat @ 2020-12-21 2:42 UTC (permalink / raw)
To: Hsin-Hsiung Wang
Cc: Rob Herring, Matthias Brugger, Fei Shao, Argus Lin,
Devicetree List, srv_heupstream, lkml,
moderated list:ARM/Mediatek SoC support, linux-arm Mailing List
On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
<hsin-hsiung.wang@mediatek.com> wrote:
>
> MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
> power management. This patch adds pwrap master driver to
> access PMIC_MT6359.
>
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 5678f46..d1cd050 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -632,6 +632,17 @@ static int mt6797_regs[] = {
> [PWRAP_DCM_DBC_PRD] = 0x1D4,
> };
>
> +static int mt6873_regs[] = {
> + [PWRAP_INIT_DONE2] = 0x0,
I don't have the datasheet for the PWRAP interface, is this register
at offset 0x0 real?
If so, I'm concerned that mt6873_regs only defines very few registers
offsets, so the init code will do a _lot_ writes at register address
0x0 (e.g. for all the undefined values in this array: PWRAP_WACS0_EN,
PWRAP_WACS1_EN, PWRAP_WACS2_EN, etc, etc.)
> + [PWRAP_TIMER_EN] = 0x3E0,
> + [PWRAP_INT_EN] = 0x448,
> + [PWRAP_WACS2_CMD] = 0xC80,
> + [PWRAP_SWINF_2_WDATA_31_0] = 0xC84,
> + [PWRAP_SWINF_2_RDATA_31_0] = 0xC94,
> + [PWRAP_WACS2_VLDCLR] = 0xCA4,
> + [PWRAP_WACS2_RDATA] = 0xCA8,
> +};
> +
> static int mt7622_regs[] = {
> [PWRAP_MUX_SEL] = 0x0,
> [PWRAP_WRAP_EN] = 0x4,
> @@ -1050,6 +1061,7 @@ enum pwrap_type {
> PWRAP_MT6765,
> PWRAP_MT6779,
> PWRAP_MT6797,
> + PWRAP_MT6873,
> PWRAP_MT7622,
> PWRAP_MT8135,
> PWRAP_MT8173,
> @@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
> case PWRAP_MT7622:
> pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
> break;
> + case PWRAP_MT6873:
> case PWRAP_MT8183:
> break;
> }
> @@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
> .init_soc_specific = NULL,
> };
>
> +static const struct pmic_wrapper_type pwrap_mt6873 = {
> + .regs = mt6873_regs,
> + .type = PWRAP_MT6873,
> + .arb_en_all = 0x777f,
> + .int_en_all = BIT(4) | BIT(5),
> + .int1_en_all = 0,
> + .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> + .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> + .caps = PWRAP_CAP_ARB,
> + .init_reg_clock = pwrap_common_init_reg_clock,
> + .init_soc_specific = NULL,
> +};
> +
> static const struct pmic_wrapper_type pwrap_mt7622 = {
> .regs = mt7622_regs,
> .type = PWRAP_MT7622,
> @@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
> .compatible = "mediatek,mt6797-pwrap",
> .data = &pwrap_mt6797,
> }, {
> + .compatible = "mediatek,mt6873-pwrap",
> + .data = &pwrap_mt6873,
> + }, {
> .compatible = "mediatek,mt7622-pwrap",
> .data = &pwrap_mt7622,
> }, {
> --
> 2.6.4
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
@ 2020-12-21 2:42 ` Nicolas Boichat
0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Boichat @ 2020-12-21 2:42 UTC (permalink / raw)
To: Hsin-Hsiung Wang
Cc: Devicetree List, Argus Lin, srv_heupstream, Fei Shao, lkml,
Rob Herring, moderated list:ARM/Mediatek SoC support,
Matthias Brugger, linux-arm Mailing List
On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
<hsin-hsiung.wang@mediatek.com> wrote:
>
> MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
> power management. This patch adds pwrap master driver to
> access PMIC_MT6359.
>
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 5678f46..d1cd050 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -632,6 +632,17 @@ static int mt6797_regs[] = {
> [PWRAP_DCM_DBC_PRD] = 0x1D4,
> };
>
> +static int mt6873_regs[] = {
> + [PWRAP_INIT_DONE2] = 0x0,
I don't have the datasheet for the PWRAP interface, is this register
at offset 0x0 real?
If so, I'm concerned that mt6873_regs only defines very few registers
offsets, so the init code will do a _lot_ writes at register address
0x0 (e.g. for all the undefined values in this array: PWRAP_WACS0_EN,
PWRAP_WACS1_EN, PWRAP_WACS2_EN, etc, etc.)
> + [PWRAP_TIMER_EN] = 0x3E0,
> + [PWRAP_INT_EN] = 0x448,
> + [PWRAP_WACS2_CMD] = 0xC80,
> + [PWRAP_SWINF_2_WDATA_31_0] = 0xC84,
> + [PWRAP_SWINF_2_RDATA_31_0] = 0xC94,
> + [PWRAP_WACS2_VLDCLR] = 0xCA4,
> + [PWRAP_WACS2_RDATA] = 0xCA8,
> +};
> +
> static int mt7622_regs[] = {
> [PWRAP_MUX_SEL] = 0x0,
> [PWRAP_WRAP_EN] = 0x4,
> @@ -1050,6 +1061,7 @@ enum pwrap_type {
> PWRAP_MT6765,
> PWRAP_MT6779,
> PWRAP_MT6797,
> + PWRAP_MT6873,
> PWRAP_MT7622,
> PWRAP_MT8135,
> PWRAP_MT8173,
> @@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
> case PWRAP_MT7622:
> pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
> break;
> + case PWRAP_MT6873:
> case PWRAP_MT8183:
> break;
> }
> @@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
> .init_soc_specific = NULL,
> };
>
> +static const struct pmic_wrapper_type pwrap_mt6873 = {
> + .regs = mt6873_regs,
> + .type = PWRAP_MT6873,
> + .arb_en_all = 0x777f,
> + .int_en_all = BIT(4) | BIT(5),
> + .int1_en_all = 0,
> + .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> + .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> + .caps = PWRAP_CAP_ARB,
> + .init_reg_clock = pwrap_common_init_reg_clock,
> + .init_soc_specific = NULL,
> +};
> +
> static const struct pmic_wrapper_type pwrap_mt7622 = {
> .regs = mt7622_regs,
> .type = PWRAP_MT7622,
> @@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
> .compatible = "mediatek,mt6797-pwrap",
> .data = &pwrap_mt6797,
> }, {
> + .compatible = "mediatek,mt6873-pwrap",
> + .data = &pwrap_mt6873,
> + }, {
> .compatible = "mediatek,mt7622-pwrap",
> .data = &pwrap_mt7622,
> }, {
> --
> 2.6.4
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
@ 2020-12-21 2:42 ` Nicolas Boichat
0 siblings, 0 replies; 34+ messages in thread
From: Nicolas Boichat @ 2020-12-21 2:42 UTC (permalink / raw)
To: Hsin-Hsiung Wang
Cc: Devicetree List, Argus Lin, srv_heupstream, Fei Shao, lkml,
Rob Herring, moderated list:ARM/Mediatek SoC support,
Matthias Brugger, linux-arm Mailing List
On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
<hsin-hsiung.wang@mediatek.com> wrote:
>
> MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
> power management. This patch adds pwrap master driver to
> access PMIC_MT6359.
>
> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> ---
> drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> index 5678f46..d1cd050 100644
> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> @@ -632,6 +632,17 @@ static int mt6797_regs[] = {
> [PWRAP_DCM_DBC_PRD] = 0x1D4,
> };
>
> +static int mt6873_regs[] = {
> + [PWRAP_INIT_DONE2] = 0x0,
I don't have the datasheet for the PWRAP interface, is this register
at offset 0x0 real?
If so, I'm concerned that mt6873_regs only defines very few registers
offsets, so the init code will do a _lot_ writes at register address
0x0 (e.g. for all the undefined values in this array: PWRAP_WACS0_EN,
PWRAP_WACS1_EN, PWRAP_WACS2_EN, etc, etc.)
> + [PWRAP_TIMER_EN] = 0x3E0,
> + [PWRAP_INT_EN] = 0x448,
> + [PWRAP_WACS2_CMD] = 0xC80,
> + [PWRAP_SWINF_2_WDATA_31_0] = 0xC84,
> + [PWRAP_SWINF_2_RDATA_31_0] = 0xC94,
> + [PWRAP_WACS2_VLDCLR] = 0xCA4,
> + [PWRAP_WACS2_RDATA] = 0xCA8,
> +};
> +
> static int mt7622_regs[] = {
> [PWRAP_MUX_SEL] = 0x0,
> [PWRAP_WRAP_EN] = 0x4,
> @@ -1050,6 +1061,7 @@ enum pwrap_type {
> PWRAP_MT6765,
> PWRAP_MT6779,
> PWRAP_MT6797,
> + PWRAP_MT6873,
> PWRAP_MT7622,
> PWRAP_MT8135,
> PWRAP_MT8173,
> @@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
> case PWRAP_MT7622:
> pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
> break;
> + case PWRAP_MT6873:
> case PWRAP_MT8183:
> break;
> }
> @@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
> .init_soc_specific = NULL,
> };
>
> +static const struct pmic_wrapper_type pwrap_mt6873 = {
> + .regs = mt6873_regs,
> + .type = PWRAP_MT6873,
> + .arb_en_all = 0x777f,
> + .int_en_all = BIT(4) | BIT(5),
> + .int1_en_all = 0,
> + .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> + .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> + .caps = PWRAP_CAP_ARB,
> + .init_reg_clock = pwrap_common_init_reg_clock,
> + .init_soc_specific = NULL,
> +};
> +
> static const struct pmic_wrapper_type pwrap_mt7622 = {
> .regs = mt7622_regs,
> .type = PWRAP_MT7622,
> @@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
> .compatible = "mediatek,mt6797-pwrap",
> .data = &pwrap_mt6797,
> }, {
> + .compatible = "mediatek,mt6873-pwrap",
> + .data = &pwrap_mt6873,
> + }, {
> .compatible = "mediatek,mt7622-pwrap",
> .data = &pwrap_mt7622,
> }, {
> --
> 2.6.4
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 2/5] soc: mediatek: pwrap: add arbiter capability
2020-12-21 2:33 ` Nicolas Boichat
(?)
(?)
@ 2021-01-31 13:15 ` Matthias Brugger
-1 siblings, 0 replies; 34+ messages in thread
From: Matthias Brugger @ 2021-01-31 13:15 UTC (permalink / raw)
To: Nicolas Boichat, Hsin-Hsiung Wang
Cc: Rob Herring, Fei Shao, Argus Lin, Devicetree List,
srv_heupstream, lkml, moderated list:ARM/Mediatek SoC support,
linux-arm Mailing List
On 21/12/2020 03:33, Nicolas Boichat wrote:
> On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
> <hsin-hsiung.wang@mediatek.com> wrote:
>>
>> Add arbiter capability for pwrap driver.
>> The arbiter capability uses new design to judge the priority and latency
>> for multi-channel.
>> This patch is preparing for adding mt6873/8192 pwrap support.
>>
>> Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
>> ---
>> drivers/soc/mediatek/mtk-pmic-wrap.c | 57 ++++++++++++++++++++++++++++++------
>> 1 file changed, 48 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
>> index c897205..5678f46 100644
>> --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
>> +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
>> @@ -25,10 +25,12 @@
>>
>> /* macro for wrapper status */
>> #define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
>> +#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x00000007)
>> #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
>> #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
>> #define PWRAP_STATE_SYNC_IDLE0 BIT(20)
>> #define PWRAP_STATE_INIT_DONE0 BIT(21)
>> +#define PWRAP_STATE_INIT_DONE1 BIT(15)
>>
>> /* macro for WACS FSM */
>> #define PWRAP_WACS_FSM_IDLE 0x00
>> @@ -74,6 +76,7 @@
>> #define PWRAP_CAP_DCM BIT(2)
>> #define PWRAP_CAP_INT1_EN BIT(3)
>> #define PWRAP_CAP_WDT_SRC1 BIT(4)
>> +#define PWRAP_CAP_ARB BIT(5)
>>
>> /* defines for slave device wrapper registers */
>> enum dew_regs {
>> @@ -340,6 +343,8 @@ enum pwrap_regs {
>> PWRAP_DCM_DBC_PRD,
>> PWRAP_EINT_STA0_ADR,
>> PWRAP_EINT_STA1_ADR,
>> + PWRAP_SWINF_2_WDATA_31_0,
>> + PWRAP_SWINF_2_RDATA_31_0,
>>
>> /* MT2701 only regs */
>> PWRAP_ADC_CMD_ADDR,
>> @@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
>>
>> static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
>> {
>> - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
>> + u32 val;
>> +
>> + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
>> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
>> + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
>>
>> return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
>> }
>>
>> static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
>> {
>> - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
>> + u32 val;
>> +
>> + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
>> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
>> + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
>
> This code is now copied twice. Do you think it'd be better to create a
> new function?
>
> static u32 pwrap_get_fsm_state(struct pmic_wrapper *wrp) {
> if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> return PWRAP_GET_WACS_ARB_FSM(val);
> else
> return PWRAP_GET_WACS_FSM(val);
> }
>
>>
>> return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
>> }
>> @@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
>> static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
>> {
>> int ret;
>> + u32 val;
>>
>> ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
>> if (ret) {
>> @@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
>> return ret;
>> }
>>
>> - pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
>> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
>> + val = adr;
>> + else
>> + val = (adr >> 1) << 16;
>> + pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
>>
>> ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
>> if (ret)
>> return ret;
>>
>> - *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
>> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
>> + val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
>> + else
>> + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
>> + *rdata = PWRAP_GET_WACS_RDATA(val);
>>
>> pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
>>
>> @@ -1228,8 +1250,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
>> return ret;
>> }
>>
>> - pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
>> - PWRAP_WACS2_CMD);
>> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
>> + pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
>> + pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
>> + } else {
>> + pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
>> + PWRAP_WACS2_CMD);
>> + }
>>
>> return 0;
>> }
>> @@ -2022,6 +2049,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
>> static int pwrap_probe(struct platform_device *pdev)
>> {
>> int ret, irq;
>> + u32 mask_done;
>> struct pmic_wrapper *wrp;
>> struct device_node *np = pdev->dev.of_node;
>> const struct of_device_id *of_slave_id = NULL;
>> @@ -2116,14 +2144,21 @@ static int pwrap_probe(struct platform_device *pdev)
>> }
>> }
>>
>> - if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
>> + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
>> + mask_done = PWRAP_STATE_INIT_DONE1;
>> + else
>> + mask_done = PWRAP_STATE_INIT_DONE0;
>> +
>> + if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
>> dev_dbg(wrp->dev, "initialization isn't finished\n");
>> ret = -ENODEV;
>> goto err_out2;
>> }
>>
>> /* Initialize watchdog, may not be done by the bootloader */
>> - pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
>> + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
>> + pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
>> +
>
> To expand on Matthias' question on v3
> (https://patchwork.kernel.org/project/linux-mediatek/patch/1600686235-27979-3-git-send-email-hsin-hsiung.wang@mediatek.com/):
> is there any PWRAP implementation where a design with an arbiter is
> still able to control the watchdog?
>
> If not, at the very least, it'd be good to expand the comment above
> (e.g. "designs with arbiter support cannot change the watchdog
> timer").
>
>> /*
>> * Since STAUPD was not used on mt8173 platform,
>> * so STAUPD of WDT_SRC which should be turned off
>> @@ -2132,7 +2167,11 @@ static int pwrap_probe(struct platform_device *pdev)
>> if (HAS_CAP(wrp->master->caps, PWRAP_CAP_WDT_SRC1))
>> pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN_1);
>>
>> - pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
>> + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
>
> Please invert this if test:
>
> if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> ... 0x3 ...
> else
> ... 0x1 ...
>
>> + pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
>> + else
>> + pwrap_writel(wrp, 0x3, PWRAP_TIMER_EN);
>> +
Thanks for the review Nicolas, I think with these two comments addressed the
patch is ready for mainline. Given of course that 4/5 isn't a hack with all the
registers being not defined.
Regards,
Matthias
>> pwrap_writel(wrp, wrp->master->int_en_all, PWRAP_INT_EN);
>> /*
>> * We add INT1 interrupt to handle starvation and request exception
>> --
>> 2.6.4
>> _______________________________________________
>> Linux-mediatek mailing list
>> Linux-mediatek@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 2/5] soc: mediatek: pwrap: add arbiter capability
2020-12-21 2:33 ` Nicolas Boichat
(?)
@ 2021-02-04 13:04 ` Hsin-hsiung Wang
-1 siblings, 0 replies; 34+ messages in thread
From: Hsin-hsiung Wang @ 2021-02-04 13:04 UTC (permalink / raw)
To: Nicolas Boichat
Cc: Rob Herring, Matthias Brugger, Fei Shao, Argus Lin,
Devicetree List, srv_heupstream, lkml,
moderated list:ARM/Mediatek SoC support, linux-arm Mailing List
Hi,
On Mon, 2020-12-21 at 10:33 +0800, Nicolas Boichat wrote:
> On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
> <hsin-hsiung.wang@mediatek.com> wrote:
> >
> > Add arbiter capability for pwrap driver.
> > The arbiter capability uses new design to judge the priority and latency
> > for multi-channel.
> > This patch is preparing for adding mt6873/8192 pwrap support.
> >
> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> > ---
> > drivers/soc/mediatek/mtk-pmic-wrap.c | 57 ++++++++++++++++++++++++++++++------
> > 1 file changed, 48 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > index c897205..5678f46 100644
> > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > @@ -25,10 +25,12 @@
> >
> > /* macro for wrapper status */
> > #define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
> > +#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x00000007)
> > #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
> > #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
> > #define PWRAP_STATE_SYNC_IDLE0 BIT(20)
> > #define PWRAP_STATE_INIT_DONE0 BIT(21)
> > +#define PWRAP_STATE_INIT_DONE1 BIT(15)
> >
> > /* macro for WACS FSM */
> > #define PWRAP_WACS_FSM_IDLE 0x00
> > @@ -74,6 +76,7 @@
> > #define PWRAP_CAP_DCM BIT(2)
> > #define PWRAP_CAP_INT1_EN BIT(3)
> > #define PWRAP_CAP_WDT_SRC1 BIT(4)
> > +#define PWRAP_CAP_ARB BIT(5)
> >
> > /* defines for slave device wrapper registers */
> > enum dew_regs {
> > @@ -340,6 +343,8 @@ enum pwrap_regs {
> > PWRAP_DCM_DBC_PRD,
> > PWRAP_EINT_STA0_ADR,
> > PWRAP_EINT_STA1_ADR,
> > + PWRAP_SWINF_2_WDATA_31_0,
> > + PWRAP_SWINF_2_RDATA_31_0,
> >
> > /* MT2701 only regs */
> > PWRAP_ADC_CMD_ADDR,
> > @@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
> >
> > static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
> > {
> > - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + u32 val;
> > +
> > + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
> >
> > return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
> > }
> >
> > static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
> > {
> > - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + u32 val;
> > +
> > + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
>
> This code is now copied twice. Do you think it'd be better to create a
> new function?
>
> static u32 pwrap_get_fsm_state(struct pmic_wrapper *wrp) {
> if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> return PWRAP_GET_WACS_ARB_FSM(val);
> else
> return PWRAP_GET_WACS_FSM(val);
> }
>
Thanks for the review. I will update it in the next patch.
> >
> > return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
> > }
> > @@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
> > static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> > {
> > int ret;
> > + u32 val;
> >
> > ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
> > if (ret) {
> > @@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> > return ret;
> > }
> >
> > - pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + val = adr;
> > + else
> > + val = (adr >> 1) << 16;
> > + pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
> >
> > ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
> > if (ret)
> > return ret;
> >
> > - *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
> > + else
> > + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + *rdata = PWRAP_GET_WACS_RDATA(val);
> >
> > pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
> >
> > @@ -1228,8 +1250,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
> > return ret;
> > }
> >
> > - pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
> > - PWRAP_WACS2_CMD);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
> > + pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
> > + pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
> > + } else {
> > + pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
> > + PWRAP_WACS2_CMD);
> > + }
> >
> > return 0;
> > }
> > @@ -2022,6 +2049,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
> > static int pwrap_probe(struct platform_device *pdev)
> > {
> > int ret, irq;
> > + u32 mask_done;
> > struct pmic_wrapper *wrp;
> > struct device_node *np = pdev->dev.of_node;
> > const struct of_device_id *of_slave_id = NULL;
> > @@ -2116,14 +2144,21 @@ static int pwrap_probe(struct platform_device *pdev)
> > }
> > }
> >
> > - if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + mask_done = PWRAP_STATE_INIT_DONE1;
> > + else
> > + mask_done = PWRAP_STATE_INIT_DONE0;
> > +
> > + if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
> > dev_dbg(wrp->dev, "initialization isn't finished\n");
> > ret = -ENODEV;
> > goto err_out2;
> > }
> >
> > /* Initialize watchdog, may not be done by the bootloader */
> > - pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> > + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> > +
>
> To expand on Matthias' question on v3
> (https://patchwork.kernel.org/project/linux-mediatek/patch/1600686235-27979-3-git-send-email-hsin-hsiung.wang@mediatek.com/):
> is there any PWRAP implementation where a design with an arbiter is
> still able to control the watchdog?
>
> If not, at the very least, it'd be good to expand the comment above
> (e.g. "designs with arbiter support cannot change the watchdog
> timer").
>
No, there is no other wrap design with an arbiter to control the
watchdog.
Thanks for the comment, I will update the comment in next patch.
> > /*
> > * Since STAUPD was not used on mt8173 platform,
> > * so STAUPD of WDT_SRC which should be turned off
> > @@ -2132,7 +2167,11 @@ static int pwrap_probe(struct platform_device *pdev)
> > if (HAS_CAP(wrp->master->caps, PWRAP_CAP_WDT_SRC1))
> > pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN_1);
> >
> > - pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> > + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
>
> Please invert this if test:
>
> if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> ... 0x3 ...
> else
> ... 0x1 ...
>
Thanks for the review. I will update it in the next patch.
> > + pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> > + else
> > + pwrap_writel(wrp, 0x3, PWRAP_TIMER_EN);
> > +
> > pwrap_writel(wrp, wrp->master->int_en_all, PWRAP_INT_EN);
> > /*
> > * We add INT1 interrupt to handle starvation and request exception
> > --
> > 2.6.4
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 2/5] soc: mediatek: pwrap: add arbiter capability
@ 2021-02-04 13:04 ` Hsin-hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-hsiung Wang @ 2021-02-04 13:04 UTC (permalink / raw)
To: Nicolas Boichat
Cc: Devicetree List, Argus Lin, srv_heupstream, Fei Shao, lkml,
Rob Herring, moderated list:ARM/Mediatek SoC support,
Matthias Brugger, linux-arm Mailing List
Hi,
On Mon, 2020-12-21 at 10:33 +0800, Nicolas Boichat wrote:
> On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
> <hsin-hsiung.wang@mediatek.com> wrote:
> >
> > Add arbiter capability for pwrap driver.
> > The arbiter capability uses new design to judge the priority and latency
> > for multi-channel.
> > This patch is preparing for adding mt6873/8192 pwrap support.
> >
> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> > ---
> > drivers/soc/mediatek/mtk-pmic-wrap.c | 57 ++++++++++++++++++++++++++++++------
> > 1 file changed, 48 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > index c897205..5678f46 100644
> > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > @@ -25,10 +25,12 @@
> >
> > /* macro for wrapper status */
> > #define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
> > +#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x00000007)
> > #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
> > #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
> > #define PWRAP_STATE_SYNC_IDLE0 BIT(20)
> > #define PWRAP_STATE_INIT_DONE0 BIT(21)
> > +#define PWRAP_STATE_INIT_DONE1 BIT(15)
> >
> > /* macro for WACS FSM */
> > #define PWRAP_WACS_FSM_IDLE 0x00
> > @@ -74,6 +76,7 @@
> > #define PWRAP_CAP_DCM BIT(2)
> > #define PWRAP_CAP_INT1_EN BIT(3)
> > #define PWRAP_CAP_WDT_SRC1 BIT(4)
> > +#define PWRAP_CAP_ARB BIT(5)
> >
> > /* defines for slave device wrapper registers */
> > enum dew_regs {
> > @@ -340,6 +343,8 @@ enum pwrap_regs {
> > PWRAP_DCM_DBC_PRD,
> > PWRAP_EINT_STA0_ADR,
> > PWRAP_EINT_STA1_ADR,
> > + PWRAP_SWINF_2_WDATA_31_0,
> > + PWRAP_SWINF_2_RDATA_31_0,
> >
> > /* MT2701 only regs */
> > PWRAP_ADC_CMD_ADDR,
> > @@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
> >
> > static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
> > {
> > - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + u32 val;
> > +
> > + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
> >
> > return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
> > }
> >
> > static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
> > {
> > - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + u32 val;
> > +
> > + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
>
> This code is now copied twice. Do you think it'd be better to create a
> new function?
>
> static u32 pwrap_get_fsm_state(struct pmic_wrapper *wrp) {
> if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> return PWRAP_GET_WACS_ARB_FSM(val);
> else
> return PWRAP_GET_WACS_FSM(val);
> }
>
Thanks for the review. I will update it in the next patch.
> >
> > return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
> > }
> > @@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
> > static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> > {
> > int ret;
> > + u32 val;
> >
> > ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
> > if (ret) {
> > @@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> > return ret;
> > }
> >
> > - pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + val = adr;
> > + else
> > + val = (adr >> 1) << 16;
> > + pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
> >
> > ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
> > if (ret)
> > return ret;
> >
> > - *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
> > + else
> > + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + *rdata = PWRAP_GET_WACS_RDATA(val);
> >
> > pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
> >
> > @@ -1228,8 +1250,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
> > return ret;
> > }
> >
> > - pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
> > - PWRAP_WACS2_CMD);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
> > + pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
> > + pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
> > + } else {
> > + pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
> > + PWRAP_WACS2_CMD);
> > + }
> >
> > return 0;
> > }
> > @@ -2022,6 +2049,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
> > static int pwrap_probe(struct platform_device *pdev)
> > {
> > int ret, irq;
> > + u32 mask_done;
> > struct pmic_wrapper *wrp;
> > struct device_node *np = pdev->dev.of_node;
> > const struct of_device_id *of_slave_id = NULL;
> > @@ -2116,14 +2144,21 @@ static int pwrap_probe(struct platform_device *pdev)
> > }
> > }
> >
> > - if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + mask_done = PWRAP_STATE_INIT_DONE1;
> > + else
> > + mask_done = PWRAP_STATE_INIT_DONE0;
> > +
> > + if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
> > dev_dbg(wrp->dev, "initialization isn't finished\n");
> > ret = -ENODEV;
> > goto err_out2;
> > }
> >
> > /* Initialize watchdog, may not be done by the bootloader */
> > - pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> > + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> > +
>
> To expand on Matthias' question on v3
> (https://patchwork.kernel.org/project/linux-mediatek/patch/1600686235-27979-3-git-send-email-hsin-hsiung.wang@mediatek.com/):
> is there any PWRAP implementation where a design with an arbiter is
> still able to control the watchdog?
>
> If not, at the very least, it'd be good to expand the comment above
> (e.g. "designs with arbiter support cannot change the watchdog
> timer").
>
No, there is no other wrap design with an arbiter to control the
watchdog.
Thanks for the comment, I will update the comment in next patch.
> > /*
> > * Since STAUPD was not used on mt8173 platform,
> > * so STAUPD of WDT_SRC which should be turned off
> > @@ -2132,7 +2167,11 @@ static int pwrap_probe(struct platform_device *pdev)
> > if (HAS_CAP(wrp->master->caps, PWRAP_CAP_WDT_SRC1))
> > pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN_1);
> >
> > - pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> > + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
>
> Please invert this if test:
>
> if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> ... 0x3 ...
> else
> ... 0x1 ...
>
Thanks for the review. I will update it in the next patch.
> > + pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> > + else
> > + pwrap_writel(wrp, 0x3, PWRAP_TIMER_EN);
> > +
> > pwrap_writel(wrp, wrp->master->int_en_all, PWRAP_INT_EN);
> > /*
> > * We add INT1 interrupt to handle starvation and request exception
> > --
> > 2.6.4
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 2/5] soc: mediatek: pwrap: add arbiter capability
@ 2021-02-04 13:04 ` Hsin-hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-hsiung Wang @ 2021-02-04 13:04 UTC (permalink / raw)
To: Nicolas Boichat
Cc: Devicetree List, Argus Lin, srv_heupstream, Fei Shao, lkml,
Rob Herring, moderated list:ARM/Mediatek SoC support,
Matthias Brugger, linux-arm Mailing List
Hi,
On Mon, 2020-12-21 at 10:33 +0800, Nicolas Boichat wrote:
> On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
> <hsin-hsiung.wang@mediatek.com> wrote:
> >
> > Add arbiter capability for pwrap driver.
> > The arbiter capability uses new design to judge the priority and latency
> > for multi-channel.
> > This patch is preparing for adding mt6873/8192 pwrap support.
> >
> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> > ---
> > drivers/soc/mediatek/mtk-pmic-wrap.c | 57 ++++++++++++++++++++++++++++++------
> > 1 file changed, 48 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > index c897205..5678f46 100644
> > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > @@ -25,10 +25,12 @@
> >
> > /* macro for wrapper status */
> > #define PWRAP_GET_WACS_RDATA(x) (((x) >> 0) & 0x0000ffff)
> > +#define PWRAP_GET_WACS_ARB_FSM(x) (((x) >> 1) & 0x00000007)
> > #define PWRAP_GET_WACS_FSM(x) (((x) >> 16) & 0x00000007)
> > #define PWRAP_GET_WACS_REQ(x) (((x) >> 19) & 0x00000001)
> > #define PWRAP_STATE_SYNC_IDLE0 BIT(20)
> > #define PWRAP_STATE_INIT_DONE0 BIT(21)
> > +#define PWRAP_STATE_INIT_DONE1 BIT(15)
> >
> > /* macro for WACS FSM */
> > #define PWRAP_WACS_FSM_IDLE 0x00
> > @@ -74,6 +76,7 @@
> > #define PWRAP_CAP_DCM BIT(2)
> > #define PWRAP_CAP_INT1_EN BIT(3)
> > #define PWRAP_CAP_WDT_SRC1 BIT(4)
> > +#define PWRAP_CAP_ARB BIT(5)
> >
> > /* defines for slave device wrapper registers */
> > enum dew_regs {
> > @@ -340,6 +343,8 @@ enum pwrap_regs {
> > PWRAP_DCM_DBC_PRD,
> > PWRAP_EINT_STA0_ADR,
> > PWRAP_EINT_STA1_ADR,
> > + PWRAP_SWINF_2_WDATA_31_0,
> > + PWRAP_SWINF_2_RDATA_31_0,
> >
> > /* MT2701 only regs */
> > PWRAP_ADC_CMD_ADDR,
> > @@ -1108,14 +1113,22 @@ static void pwrap_writel(struct pmic_wrapper *wrp, u32 val, enum pwrap_regs reg)
> >
> > static bool pwrap_is_fsm_idle(struct pmic_wrapper *wrp)
> > {
> > - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + u32 val;
> > +
> > + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_IDLE;
> >
> > return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_IDLE;
> > }
> >
> > static bool pwrap_is_fsm_vldclr(struct pmic_wrapper *wrp)
> > {
> > - u32 val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + u32 val;
> > +
> > + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + return PWRAP_GET_WACS_ARB_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
>
> This code is now copied twice. Do you think it'd be better to create a
> new function?
>
> static u32 pwrap_get_fsm_state(struct pmic_wrapper *wrp) {
> if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> return PWRAP_GET_WACS_ARB_FSM(val);
> else
> return PWRAP_GET_WACS_FSM(val);
> }
>
Thanks for the review. I will update it in the next patch.
> >
> > return PWRAP_GET_WACS_FSM(val) == PWRAP_WACS_FSM_WFVLDCLR;
> > }
> > @@ -1165,6 +1178,7 @@ static int pwrap_wait_for_state(struct pmic_wrapper *wrp,
> > static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> > {
> > int ret;
> > + u32 val;
> >
> > ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_idle);
> > if (ret) {
> > @@ -1172,13 +1186,21 @@ static int pwrap_read16(struct pmic_wrapper *wrp, u32 adr, u32 *rdata)
> > return ret;
> > }
> >
> > - pwrap_writel(wrp, (adr >> 1) << 16, PWRAP_WACS2_CMD);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + val = adr;
> > + else
> > + val = (adr >> 1) << 16;
> > + pwrap_writel(wrp, val, PWRAP_WACS2_CMD);
> >
> > ret = pwrap_wait_for_state(wrp, pwrap_is_fsm_vldclr);
> > if (ret)
> > return ret;
> >
> > - *rdata = PWRAP_GET_WACS_RDATA(pwrap_readl(wrp, PWRAP_WACS2_RDATA));
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + val = pwrap_readl(wrp, PWRAP_SWINF_2_RDATA_31_0);
> > + else
> > + val = pwrap_readl(wrp, PWRAP_WACS2_RDATA);
> > + *rdata = PWRAP_GET_WACS_RDATA(val);
> >
> > pwrap_writel(wrp, 1, PWRAP_WACS2_VLDCLR);
> >
> > @@ -1228,8 +1250,13 @@ static int pwrap_write16(struct pmic_wrapper *wrp, u32 adr, u32 wdata)
> > return ret;
> > }
> >
> > - pwrap_writel(wrp, (1 << 31) | ((adr >> 1) << 16) | wdata,
> > - PWRAP_WACS2_CMD);
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
> > + pwrap_writel(wrp, wdata, PWRAP_SWINF_2_WDATA_31_0);
> > + pwrap_writel(wrp, BIT(29) | adr, PWRAP_WACS2_CMD);
> > + } else {
> > + pwrap_writel(wrp, BIT(31) | ((adr >> 1) << 16) | wdata,
> > + PWRAP_WACS2_CMD);
> > + }
> >
> > return 0;
> > }
> > @@ -2022,6 +2049,7 @@ MODULE_DEVICE_TABLE(of, of_pwrap_match_tbl);
> > static int pwrap_probe(struct platform_device *pdev)
> > {
> > int ret, irq;
> > + u32 mask_done;
> > struct pmic_wrapper *wrp;
> > struct device_node *np = pdev->dev.of_node;
> > const struct of_device_id *of_slave_id = NULL;
> > @@ -2116,14 +2144,21 @@ static int pwrap_probe(struct platform_device *pdev)
> > }
> > }
> >
> > - if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & PWRAP_STATE_INIT_DONE0)) {
> > + if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + mask_done = PWRAP_STATE_INIT_DONE1;
> > + else
> > + mask_done = PWRAP_STATE_INIT_DONE0;
> > +
> > + if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
> > dev_dbg(wrp->dev, "initialization isn't finished\n");
> > ret = -ENODEV;
> > goto err_out2;
> > }
> >
> > /* Initialize watchdog, may not be done by the bootloader */
> > - pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> > + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> > + pwrap_writel(wrp, 0xf, PWRAP_WDT_UNIT);
> > +
>
> To expand on Matthias' question on v3
> (https://patchwork.kernel.org/project/linux-mediatek/patch/1600686235-27979-3-git-send-email-hsin-hsiung.wang@mediatek.com/):
> is there any PWRAP implementation where a design with an arbiter is
> still able to control the watchdog?
>
> If not, at the very least, it'd be good to expand the comment above
> (e.g. "designs with arbiter support cannot change the watchdog
> timer").
>
No, there is no other wrap design with an arbiter to control the
watchdog.
Thanks for the comment, I will update the comment in next patch.
> > /*
> > * Since STAUPD was not used on mt8173 platform,
> > * so STAUPD of WDT_SRC which should be turned off
> > @@ -2132,7 +2167,11 @@ static int pwrap_probe(struct platform_device *pdev)
> > if (HAS_CAP(wrp->master->caps, PWRAP_CAP_WDT_SRC1))
> > pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN_1);
> >
> > - pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> > + if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
>
> Please invert this if test:
>
> if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
> ... 0x3 ...
> else
> ... 0x1 ...
>
Thanks for the review. I will update it in the next patch.
> > + pwrap_writel(wrp, 0x1, PWRAP_TIMER_EN);
> > + else
> > + pwrap_writel(wrp, 0x3, PWRAP_TIMER_EN);
> > +
> > pwrap_writel(wrp, wrp->master->int_en_all, PWRAP_INT_EN);
> > /*
> > * We add INT1 interrupt to handle starvation and request exception
> > --
> > 2.6.4
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
2020-12-21 2:42 ` Nicolas Boichat
(?)
@ 2021-02-04 13:05 ` Hsin-hsiung Wang
-1 siblings, 0 replies; 34+ messages in thread
From: Hsin-hsiung Wang @ 2021-02-04 13:05 UTC (permalink / raw)
To: Nicolas Boichat
Cc: Rob Herring, Matthias Brugger, Fei Shao, Argus Lin,
Devicetree List, srv_heupstream, lkml,
moderated list:ARM/Mediatek SoC support, linux-arm Mailing List
Hi,
On Mon, 2020-12-21 at 10:42 +0800, Nicolas Boichat wrote:
> On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
> <hsin-hsiung.wang@mediatek.com> wrote:
> >
> > MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
> > power management. This patch adds pwrap master driver to
> > access PMIC_MT6359.
> >
> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> > ---
> > drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +++++++++++++++++++++++++++++
> > 1 file changed, 29 insertions(+)
> >
> > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > index 5678f46..d1cd050 100644
> > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > @@ -632,6 +632,17 @@ static int mt6797_regs[] = {
> > [PWRAP_DCM_DBC_PRD] = 0x1D4,
> > };
> >
> > +static int mt6873_regs[] = {
> > + [PWRAP_INIT_DONE2] = 0x0,
>
> I don't have the datasheet for the PWRAP interface, is this register
> at offset 0x0 real?
>
> If so, I'm concerned that mt6873_regs only defines very few registers
> offsets, so the init code will do a _lot_ writes at register address
> 0x0 (e.g. for all the undefined values in this array: PWRAP_WACS0_EN,
> PWRAP_WACS1_EN, PWRAP_WACS2_EN, etc, etc.)
>
The register for the init_done is 0x0.
However, the pwrap driver of mt6873 only checks this register in the
beginning and wouldn't check it again.
In other words, the register is the first register we check, so I think
there is no problem for it.
> > + [PWRAP_TIMER_EN] = 0x3E0,
> > + [PWRAP_INT_EN] = 0x448,
> > + [PWRAP_WACS2_CMD] = 0xC80,
> > + [PWRAP_SWINF_2_WDATA_31_0] = 0xC84,
> > + [PWRAP_SWINF_2_RDATA_31_0] = 0xC94,
> > + [PWRAP_WACS2_VLDCLR] = 0xCA4,
> > + [PWRAP_WACS2_RDATA] = 0xCA8,
> > +};
> > +
> > static int mt7622_regs[] = {
> > [PWRAP_MUX_SEL] = 0x0,
> > [PWRAP_WRAP_EN] = 0x4,
> > @@ -1050,6 +1061,7 @@ enum pwrap_type {
> > PWRAP_MT6765,
> > PWRAP_MT6779,
> > PWRAP_MT6797,
> > + PWRAP_MT6873,
> > PWRAP_MT7622,
> > PWRAP_MT8135,
> > PWRAP_MT8173,
> > @@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
> > case PWRAP_MT7622:
> > pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
> > break;
> > + case PWRAP_MT6873:
> > case PWRAP_MT8183:
> > break;
> > }
> > @@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
> > .init_soc_specific = NULL,
> > };
> >
> > +static const struct pmic_wrapper_type pwrap_mt6873 = {
> > + .regs = mt6873_regs,
> > + .type = PWRAP_MT6873,
> > + .arb_en_all = 0x777f,
> > + .int_en_all = BIT(4) | BIT(5),
> > + .int1_en_all = 0,
> > + .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> > + .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> > + .caps = PWRAP_CAP_ARB,
> > + .init_reg_clock = pwrap_common_init_reg_clock,
> > + .init_soc_specific = NULL,
> > +};
> > +
> > static const struct pmic_wrapper_type pwrap_mt7622 = {
> > .regs = mt7622_regs,
> > .type = PWRAP_MT7622,
> > @@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
> > .compatible = "mediatek,mt6797-pwrap",
> > .data = &pwrap_mt6797,
> > }, {
> > + .compatible = "mediatek,mt6873-pwrap",
> > + .data = &pwrap_mt6873,
> > + }, {
> > .compatible = "mediatek,mt7622-pwrap",
> > .data = &pwrap_mt7622,
> > }, {
> > --
> > 2.6.4
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
@ 2021-02-04 13:05 ` Hsin-hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-hsiung Wang @ 2021-02-04 13:05 UTC (permalink / raw)
To: Nicolas Boichat
Cc: Devicetree List, Argus Lin, srv_heupstream, Fei Shao, lkml,
Rob Herring, moderated list:ARM/Mediatek SoC support,
Matthias Brugger, linux-arm Mailing List
Hi,
On Mon, 2020-12-21 at 10:42 +0800, Nicolas Boichat wrote:
> On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
> <hsin-hsiung.wang@mediatek.com> wrote:
> >
> > MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
> > power management. This patch adds pwrap master driver to
> > access PMIC_MT6359.
> >
> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> > ---
> > drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +++++++++++++++++++++++++++++
> > 1 file changed, 29 insertions(+)
> >
> > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > index 5678f46..d1cd050 100644
> > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > @@ -632,6 +632,17 @@ static int mt6797_regs[] = {
> > [PWRAP_DCM_DBC_PRD] = 0x1D4,
> > };
> >
> > +static int mt6873_regs[] = {
> > + [PWRAP_INIT_DONE2] = 0x0,
>
> I don't have the datasheet for the PWRAP interface, is this register
> at offset 0x0 real?
>
> If so, I'm concerned that mt6873_regs only defines very few registers
> offsets, so the init code will do a _lot_ writes at register address
> 0x0 (e.g. for all the undefined values in this array: PWRAP_WACS0_EN,
> PWRAP_WACS1_EN, PWRAP_WACS2_EN, etc, etc.)
>
The register for the init_done is 0x0.
However, the pwrap driver of mt6873 only checks this register in the
beginning and wouldn't check it again.
In other words, the register is the first register we check, so I think
there is no problem for it.
> > + [PWRAP_TIMER_EN] = 0x3E0,
> > + [PWRAP_INT_EN] = 0x448,
> > + [PWRAP_WACS2_CMD] = 0xC80,
> > + [PWRAP_SWINF_2_WDATA_31_0] = 0xC84,
> > + [PWRAP_SWINF_2_RDATA_31_0] = 0xC94,
> > + [PWRAP_WACS2_VLDCLR] = 0xCA4,
> > + [PWRAP_WACS2_RDATA] = 0xCA8,
> > +};
> > +
> > static int mt7622_regs[] = {
> > [PWRAP_MUX_SEL] = 0x0,
> > [PWRAP_WRAP_EN] = 0x4,
> > @@ -1050,6 +1061,7 @@ enum pwrap_type {
> > PWRAP_MT6765,
> > PWRAP_MT6779,
> > PWRAP_MT6797,
> > + PWRAP_MT6873,
> > PWRAP_MT7622,
> > PWRAP_MT8135,
> > PWRAP_MT8173,
> > @@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
> > case PWRAP_MT7622:
> > pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
> > break;
> > + case PWRAP_MT6873:
> > case PWRAP_MT8183:
> > break;
> > }
> > @@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
> > .init_soc_specific = NULL,
> > };
> >
> > +static const struct pmic_wrapper_type pwrap_mt6873 = {
> > + .regs = mt6873_regs,
> > + .type = PWRAP_MT6873,
> > + .arb_en_all = 0x777f,
> > + .int_en_all = BIT(4) | BIT(5),
> > + .int1_en_all = 0,
> > + .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> > + .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> > + .caps = PWRAP_CAP_ARB,
> > + .init_reg_clock = pwrap_common_init_reg_clock,
> > + .init_soc_specific = NULL,
> > +};
> > +
> > static const struct pmic_wrapper_type pwrap_mt7622 = {
> > .regs = mt7622_regs,
> > .type = PWRAP_MT7622,
> > @@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
> > .compatible = "mediatek,mt6797-pwrap",
> > .data = &pwrap_mt6797,
> > }, {
> > + .compatible = "mediatek,mt6873-pwrap",
> > + .data = &pwrap_mt6873,
> > + }, {
> > .compatible = "mediatek,mt7622-pwrap",
> > .data = &pwrap_mt7622,
> > }, {
> > --
> > 2.6.4
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 34+ messages in thread
* Re: [PATCH v4 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs
@ 2021-02-04 13:05 ` Hsin-hsiung Wang
0 siblings, 0 replies; 34+ messages in thread
From: Hsin-hsiung Wang @ 2021-02-04 13:05 UTC (permalink / raw)
To: Nicolas Boichat
Cc: Devicetree List, Argus Lin, srv_heupstream, Fei Shao, lkml,
Rob Herring, moderated list:ARM/Mediatek SoC support,
Matthias Brugger, linux-arm Mailing List
Hi,
On Mon, 2020-12-21 at 10:42 +0800, Nicolas Boichat wrote:
> On Wed, Nov 18, 2020 at 8:08 PM Hsin-Hsiung Wang
> <hsin-hsiung.wang@mediatek.com> wrote:
> >
> > MT6873/8192 are highly integrated SoCs and use PMIC_MT6359 for
> > power management. This patch adds pwrap master driver to
> > access PMIC_MT6359.
> >
> > Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com>
> > ---
> > drivers/soc/mediatek/mtk-pmic-wrap.c | 29 +++++++++++++++++++++++++++++
> > 1 file changed, 29 insertions(+)
> >
> > diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > index 5678f46..d1cd050 100644
> > --- a/drivers/soc/mediatek/mtk-pmic-wrap.c
> > +++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
> > @@ -632,6 +632,17 @@ static int mt6797_regs[] = {
> > [PWRAP_DCM_DBC_PRD] = 0x1D4,
> > };
> >
> > +static int mt6873_regs[] = {
> > + [PWRAP_INIT_DONE2] = 0x0,
>
> I don't have the datasheet for the PWRAP interface, is this register
> at offset 0x0 real?
>
> If so, I'm concerned that mt6873_regs only defines very few registers
> offsets, so the init code will do a _lot_ writes at register address
> 0x0 (e.g. for all the undefined values in this array: PWRAP_WACS0_EN,
> PWRAP_WACS1_EN, PWRAP_WACS2_EN, etc, etc.)
>
The register for the init_done is 0x0.
However, the pwrap driver of mt6873 only checks this register in the
beginning and wouldn't check it again.
In other words, the register is the first register we check, so I think
there is no problem for it.
> > + [PWRAP_TIMER_EN] = 0x3E0,
> > + [PWRAP_INT_EN] = 0x448,
> > + [PWRAP_WACS2_CMD] = 0xC80,
> > + [PWRAP_SWINF_2_WDATA_31_0] = 0xC84,
> > + [PWRAP_SWINF_2_RDATA_31_0] = 0xC94,
> > + [PWRAP_WACS2_VLDCLR] = 0xCA4,
> > + [PWRAP_WACS2_RDATA] = 0xCA8,
> > +};
> > +
> > static int mt7622_regs[] = {
> > [PWRAP_MUX_SEL] = 0x0,
> > [PWRAP_WRAP_EN] = 0x4,
> > @@ -1050,6 +1061,7 @@ enum pwrap_type {
> > PWRAP_MT6765,
> > PWRAP_MT6779,
> > PWRAP_MT6797,
> > + PWRAP_MT6873,
> > PWRAP_MT7622,
> > PWRAP_MT8135,
> > PWRAP_MT8173,
> > @@ -1512,6 +1524,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
> > case PWRAP_MT7622:
> > pwrap_writel(wrp, 0, PWRAP_CIPHER_EN);
> > break;
> > + case PWRAP_MT6873:
> > case PWRAP_MT8183:
> > break;
> > }
> > @@ -1948,6 +1961,19 @@ static const struct pmic_wrapper_type pwrap_mt6797 = {
> > .init_soc_specific = NULL,
> > };
> >
> > +static const struct pmic_wrapper_type pwrap_mt6873 = {
> > + .regs = mt6873_regs,
> > + .type = PWRAP_MT6873,
> > + .arb_en_all = 0x777f,
> > + .int_en_all = BIT(4) | BIT(5),
> > + .int1_en_all = 0,
> > + .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
> > + .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
> > + .caps = PWRAP_CAP_ARB,
> > + .init_reg_clock = pwrap_common_init_reg_clock,
> > + .init_soc_specific = NULL,
> > +};
> > +
> > static const struct pmic_wrapper_type pwrap_mt7622 = {
> > .regs = mt7622_regs,
> > .type = PWRAP_MT7622,
> > @@ -2026,6 +2052,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
> > .compatible = "mediatek,mt6797-pwrap",
> > .data = &pwrap_mt6797,
> > }, {
> > + .compatible = "mediatek,mt6873-pwrap",
> > + .data = &pwrap_mt6873,
> > + }, {
> > .compatible = "mediatek,mt7622-pwrap",
> > .data = &pwrap_mt7622,
> > }, {
> > --
> > 2.6.4
> > _______________________________________________
> > Linux-mediatek mailing list
> > Linux-mediatek@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-mediatek
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 34+ messages in thread
end of thread, other threads:[~2021-02-04 13:06 UTC | newest]
Thread overview: 34+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-18 12:01 [PATCH v4 0/5] Add PMIC wrapper support for Mediatek MT6873/8192 SoC IC Hsin-Hsiung Wang
2020-11-18 12:01 ` Hsin-Hsiung Wang
2020-11-18 12:01 ` Hsin-Hsiung Wang
2020-11-18 12:01 ` [PATCH v4 1/5] soc: mediatek: pwrap: use BIT() macro Hsin-Hsiung Wang
2020-11-18 12:01 ` Hsin-Hsiung Wang
2020-11-18 12:01 ` Hsin-Hsiung Wang
2020-12-21 2:24 ` Nicolas Boichat
2020-12-21 2:24 ` Nicolas Boichat
2020-12-21 2:24 ` Nicolas Boichat
2020-11-18 12:01 ` [PATCH v4 2/5] soc: mediatek: pwrap: add arbiter capability Hsin-Hsiung Wang
2020-11-18 12:01 ` Hsin-Hsiung Wang
2020-11-18 12:01 ` Hsin-Hsiung Wang
2020-12-21 2:33 ` Nicolas Boichat
2020-12-21 2:33 ` Nicolas Boichat
2020-12-21 2:33 ` Nicolas Boichat
2021-01-31 13:15 ` Matthias Brugger
2021-02-04 13:04 ` Hsin-hsiung Wang
2021-02-04 13:04 ` Hsin-hsiung Wang
2021-02-04 13:04 ` Hsin-hsiung Wang
2020-11-18 12:01 ` [PATCH v4 3/5] dt-bindings: mediatek: add compatible for MT6873/8192 pwrap Hsin-Hsiung Wang
2020-11-18 12:01 ` Hsin-Hsiung Wang
2020-11-18 12:01 ` Hsin-Hsiung Wang
2020-11-18 12:01 ` [PATCH v4 4/5] soc: mediatek: pwrap: add pwrap driver for MT6873/8192 SoCs Hsin-Hsiung Wang
2020-11-18 12:01 ` Hsin-Hsiung Wang
2020-11-18 12:01 ` Hsin-Hsiung Wang
2020-12-21 2:42 ` Nicolas Boichat
2020-12-21 2:42 ` Nicolas Boichat
2020-12-21 2:42 ` Nicolas Boichat
2021-02-04 13:05 ` Hsin-hsiung Wang
2021-02-04 13:05 ` Hsin-hsiung Wang
2021-02-04 13:05 ` Hsin-hsiung Wang
2020-11-18 12:01 ` [PATCH v4 5/5] arm64: dts: mt8192: add pwrap node Hsin-Hsiung Wang
2020-11-18 12:01 ` Hsin-Hsiung Wang
2020-11-18 12:01 ` Hsin-Hsiung Wang
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