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From: "tip-bot2 for Andy Lutomirski" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Andy Lutomirski <luto@kernel.org>, Borislav Petkov <bp@suse.de>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: x86/misc] selftests/x86/fsgsbase: Fix GS == 1, 2, and 3 tests
Date: Tue, 24 Nov 2020 13:02:08 -0000	[thread overview]
Message-ID: <160622292883.11115.1532167880287226599.tip-bot2@tip-bot2> (raw)
In-Reply-To: <7567fd44a1d60a9424f25b19a998f12149993b0d.1604346596.git.luto@kernel.org>

The following commit has been merged into the x86/misc branch of tip:

Commit-ID:     716572b0003ef67a4889bd7d85baf5099c5a0248
Gitweb:        https://git.kernel.org/tip/716572b0003ef67a4889bd7d85baf5099c5a0248
Author:        Andy Lutomirski <luto@kernel.org>
AuthorDate:    Mon, 02 Nov 2020 11:51:10 -08:00
Committer:     Borislav Petkov <bp@suse.de>
CommitterDate: Tue, 24 Nov 2020 13:46:16 +01:00

selftests/x86/fsgsbase: Fix GS == 1, 2, and 3 tests

Setting GS to 1, 2, or 3 causes a nonsensical part of the IRET microcode
to change GS back to zero on a return from kernel mode to user mode. The
result is that these tests fail randomly depending on when interrupts
happen. Detect when this happens and let the test pass.

Signed-off-by: Andy Lutomirski <luto@kernel.org>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/7567fd44a1d60a9424f25b19a998f12149993b0d.1604346596.git.luto@kernel.org
---
 tools/testing/selftests/x86/fsgsbase.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/tools/testing/selftests/x86/fsgsbase.c b/tools/testing/selftests/x86/fsgsbase.c
index 7161cfc..8c780cc 100644
--- a/tools/testing/selftests/x86/fsgsbase.c
+++ b/tools/testing/selftests/x86/fsgsbase.c
@@ -392,8 +392,8 @@ static void set_gs_and_switch_to(unsigned long local,
 		local = read_base(GS);
 
 		/*
-		 * Signal delivery seems to mess up weird selectors.  Put it
-		 * back.
+		 * Signal delivery is quite likely to change a selector
+		 * of 1, 2, or 3 back to 0 due to IRET being defective.
 		 */
 		asm volatile ("mov %0, %%gs" : : "rm" (force_sel));
 	} else {
@@ -411,6 +411,14 @@ static void set_gs_and_switch_to(unsigned long local,
 	if (base == local && sel_pre_sched == sel_post_sched) {
 		printf("[OK]\tGS/BASE remained 0x%hx/0x%lx\n",
 		       sel_pre_sched, local);
+	} else if (base == local && sel_pre_sched >= 1 && sel_pre_sched <= 3 &&
+		   sel_post_sched == 0) {
+		/*
+		 * IRET is misdesigned and will squash selectors 1, 2, or 3
+		 * to zero.  Don't fail the test just because this happened.
+		 */
+		printf("[OK]\tGS/BASE changed from 0x%hx/0x%lx to 0x%hx/0x%lx because IRET is defective\n",
+		       sel_pre_sched, local, sel_post_sched, base);
 	} else {
 		nerrs++;
 		printf("[FAIL]\tGS/BASE changed from 0x%hx/0x%lx to 0x%hx/0x%lx\n",

  reply	other threads:[~2020-11-24 13:02 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-02 19:51 [PATCH 0/2] selftests/x86: Minor fixes Andy Lutomirski
2020-11-02 19:51 ` [PATCH 1/2] selftests/x86/fsgsbase: Fix GS == 1, 2, and 3 tests Andy Lutomirski
2020-11-24 13:02   ` tip-bot2 for Andy Lutomirski [this message]
2020-11-02 19:51 ` [PATCH 2/2] selftests/x86: Add missing .note.GNU-stack sections Andy Lutomirski
2020-11-24 13:02   ` [tip: x86/misc] " tip-bot2 for Andy Lutomirski

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