From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-20.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 916ACC19425 for ; Wed, 9 Dec 2020 18:48:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6B3E623C91 for ; Wed, 9 Dec 2020 18:48:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733223AbgLISpW (ORCPT ); Wed, 9 Dec 2020 13:45:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47704 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730088AbgLISpV (ORCPT ); Wed, 9 Dec 2020 13:45:21 -0500 Received: from galois.linutronix.de (Galois.linutronix.de [IPv6:2a0a:51c0:0:12e:550::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2FA98C0613D6; Wed, 9 Dec 2020 10:44:41 -0800 (PST) Date: Wed, 09 Dec 2020 18:44:39 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1607539479; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=qVh1lxee6E4EFRklLOaLoHEQT5kK2uqVuLnzC0Lc9l4=; b=LgDRMZn6FE2vhIkzuYifXA9vDvS/s3fXS5EzWEsa3EuZQALl/LxJn2/+MQ67R533SVfVPY uOyvK/vQj2+LdkOckMOokhMJeNpk3rJs1+f2Cipvc7TMSzW9k7MI7BL/r9Lv9tsNhsEZIR 3m8nAGP1Bmf0K+jxSLpCoQp8OMvVefutYx9BlwW5TCGWosfL6FrBvs9JLH7PAj05hdIhWJ Uy+WAx4eC0Ry9b+qQFeDqrE/x2zxmFEOT4I0PxdPsD++IJtWlE4IAn8DEv45DHeNUFh/eA i4bQXFUUxJ+KZhvpuicOO3jMr4ASa/nw2/fo60wWngcLK1J+eSgfk/12g6Nz9g== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1607539479; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=qVh1lxee6E4EFRklLOaLoHEQT5kK2uqVuLnzC0Lc9l4=; b=tevoWUVLz1lGmFxZ0rffA8nVVaMSGUxQd3H90ozWH+rOHxZTNf7re39iO89W8U0gWcC7Qq yOvd3YytfVapIhBw== From: "tip-bot2 for Gustavo A. R. Silva" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: perf/core] perf/x86: Fix fall-through warnings for Clang Cc: "Gustavo A. R. Silva" , "Peter Zijlstra (Intel)" , x86@kernel.org, linux-kernel@vger.kernel.org MIME-Version: 1.0 Message-ID: <160753947929.3364.12837434700943657500.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following commit has been merged into the perf/core branch of tip: Commit-ID: b6459575451769b0550621865d1ddb65afdb55a1 Gitweb: https://git.kernel.org/tip/b6459575451769b0550621865d1ddb65afdb55a1 Author: Gustavo A. R. Silva AuthorDate: Fri, 20 Nov 2020 12:31:36 -06:00 Committer: Peter Zijlstra CommitterDate: Wed, 09 Dec 2020 17:08:59 +01:00 perf/x86: Fix fall-through warnings for Clang In preparation to enable -Wimplicit-fallthrough for Clang, fix a warning by explicitly adding a fallthrough pseudo-keyword as a replacement for a /* fall through */ comment, instead of letting the code fall through to the next case. Notice that Clang doesn't recognize /* fall through */ comments as implicit fall-through markings. Signed-off-by: Gustavo A. R. Silva Signed-off-by: Peter Zijlstra (Intel) Link: https://github.com/KSPP/linux/issues/115 --- arch/x86/events/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index a88c94d..550c5e7 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -1174,7 +1174,7 @@ static inline void x86_assign_hw_event(struct perf_event *event, case INTEL_PMC_IDX_METRIC_BASE ... INTEL_PMC_IDX_METRIC_END: /* All the metric events are mapped onto the fixed counter 3. */ idx = INTEL_PMC_IDX_FIXED_SLOTS; - /* fall through */ + fallthrough; case INTEL_PMC_IDX_FIXED ... INTEL_PMC_IDX_FIXED_BTS-1: hwc->config_base = MSR_ARCH_PERFMON_FIXED_CTR_CTRL; hwc->event_base = MSR_ARCH_PERFMON_FIXED_CTR0 +