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From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,
	<broonie@kernel.org>, <robh+dt@kernel.org>, <lukas@wunner.de>
Cc: <skomatineni@nvidia.com>, <bbrezillon@kernel.org>,
	<p.yadav@ti.com>, <tudor.ambarus@microchip.com>,
	<linux-spi@vger.kernel.org>, <linux-tegra@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: [PATCH v4 1/9] dt-bindings: clock: tegra: Add clock ID TEGRA210_CLK_QSPI_PM
Date: Thu, 17 Dec 2020 12:28:39 -0800	[thread overview]
Message-ID: <1608236927-28701-2-git-send-email-skomatineni@nvidia.com> (raw)
In-Reply-To: <1608236927-28701-1-git-send-email-skomatineni@nvidia.com>

Tegra210 QSPI clock output has divider DIV2_SEL which will be enabled
when using DDR interface mode.

This patch adds clock ID for this to dt-binding.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 include/dt-bindings/clock/tegra210-car.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h
index ab8b8a7..9cfcc3b 100644
--- a/include/dt-bindings/clock/tegra210-car.h
+++ b/include/dt-bindings/clock/tegra210-car.h
@@ -307,7 +307,7 @@
 #define TEGRA210_CLK_AUDIO4 275
 #define TEGRA210_CLK_SPDIF 276
 /* 277 */
-/* 278 */
+#define TEGRA210_CLK_QSPI_PM 278
 /* 279 */
 /* 280 */
 #define TEGRA210_CLK_SOR0_LVDS 281 /* deprecated */
-- 
2.7.4


  reply	other threads:[~2020-12-17 20:30 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-17 20:28 [PATCH v4 0/9] Add Tegra Quad SPI driver Sowjanya Komatineni
2020-12-17 20:28 ` Sowjanya Komatineni [this message]
2020-12-17 20:28 ` [PATCH v4 2/9] dt-bindings: spi: Add Tegra Quad SPI device tree binding Sowjanya Komatineni
2020-12-22  0:20   ` Rob Herring
2020-12-17 20:28 ` [PATCH v4 3/9] MAINTAINERS: Add Tegra Quad SPI driver section Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 4/9] spi: tegra210-quad: Add support for Tegra210 QSPI controller Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 5/9] spi: spi-mem: Mark dummy transfers by setting dummy_data bit Sowjanya Komatineni
2020-12-18  9:21   ` Pratyush Yadav
2020-12-18  9:57     ` Boris Brezillon
2020-12-18 18:09       ` Sowjanya Komatineni
2020-12-18 19:19         ` Pratyush Yadav
2020-12-18 20:41           ` Mark Brown
2020-12-18 20:44             ` Mark Brown
2020-12-18 22:01               ` Sowjanya Komatineni
2020-12-21 16:50                 ` Mark Brown
2020-12-17 20:28 ` [PATCH v4 6/9] spi: tegra210-quad: Add support for hardware dummy cycles transfer Sowjanya Komatineni
2020-12-18 10:20   ` Boris Brezillon
2020-12-17 20:28 ` [PATCH v4 7/9] arm64: tegra: Enable QSPI on Jetson Nano Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 8/9] arm64: tegra: Add QSPI nodes on Tegra194 Sowjanya Komatineni
2020-12-17 20:28 ` [PATCH v4 9/9] arm64: tegra: Enable QSPI on Jetson Xavier NX Sowjanya Komatineni

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