From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDBD0C433DB for ; Wed, 27 Jan 2021 12:18:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 78CDB20786 for ; Wed, 27 Jan 2021 12:18:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235956AbhA0MR5 (ORCPT ); Wed, 27 Jan 2021 07:17:57 -0500 Received: from mx0a-0016f401.pphosted.com ([67.231.148.174]:53616 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S237056AbhA0LrN (ORCPT ); Wed, 27 Jan 2021 06:47:13 -0500 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 10RBdeKV000630; Wed, 27 Jan 2021 03:44:25 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=iDGO9e6WjFQdtKXBQtrCl6dwPG3F4+zdg7fmYSpDeKc=; b=akJXaA7Bf+MstsWeUJG7ixhCwr5ODuy75C8dK7Dn1SMsLlkJCkxYG/liOthyqKxGTebG xcxH6pOz5obIm12MRpTV6Mn5QMjq5AB3TzrHIJxVzVJWqyhv7fnmThEIOOZWErtLFhtz l4yTBqjQN23qtYb5vOnDYo0ofC5OpdYDII4/ir9wHdX+BcnLz5/p+zOzht9GG9jDfPBx O+a+CXJVIO2re9Tc6DYyLJJStSyXOlJ0RWRfDazh2fs9Q47ohdO2HpbpI4+pG7XsTDGn QcttLIpAMRTOU9oqCMxgnbsXNsTj8YAT1sH9vChf4X9hTBjjLHrfKeywUskmsyhV1H0w 9w== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 368j1ube8e-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 27 Jan 2021 03:44:25 -0800 Received: from SC-EXCH04.marvell.com (10.93.176.84) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 27 Jan 2021 03:44:24 -0800 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 27 Jan 2021 03:44:24 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 27 Jan 2021 03:44:23 -0800 Received: from stefan-pc.marvell.com (stefan-pc.marvell.com [10.5.25.21]) by maili.marvell.com (Postfix) with ESMTP id 269D03F703F; Wed, 27 Jan 2021 03:44:20 -0800 (PST) From: To: CC: , , , , , , , , , , , Subject: [PATCH v4 net-next 11/19] net: mvpp2: add spinlock for FW FCA configuration path Date: Wed, 27 Jan 2021 13:43:27 +0200 Message-ID: <1611747815-1934-12-git-send-email-stefanc@marvell.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1611747815-1934-1-git-send-email-stefanc@marvell.com> References: <1611747815-1934-1-git-send-email-stefanc@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.343,18.0.737 definitions=2021-01-27_05:2021-01-27,2021-01-27 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Stefan Chulski Spinlock added to MSS shared memory configuration space. Signed-off-by: Stefan Chulski --- drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 5 +++++ drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 3 +++ 2 files changed, 8 insertions(+) diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h index 9d8993f..f34e260 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2.h +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2.h @@ -1021,6 +1021,11 @@ struct mvpp2 { /* CM3 SRAM pool */ struct gen_pool *sram_pool; + + bool custom_dma_mask; + + /* Spinlocks for CM3 shared memory configuration */ + spinlock_t mss_spinlock; }; struct mvpp2_pcpu_stats { diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index a4933c4..64534f0 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -7163,6 +7163,9 @@ static int mvpp2_probe(struct platform_device *pdev) priv->hw_version = MVPP23; } + /* Init mss lock */ + spin_lock_init(&priv->mss_spinlock); + /* Initialize network controller */ err = mvpp2_init(pdev, priv); if (err < 0) { -- 1.9.1