From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23EF6C433DB for ; Sun, 31 Jan 2021 11:05:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D900D64E26 for ; Sun, 31 Jan 2021 11:05:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230258AbhAaLDK (ORCPT ); Sun, 31 Jan 2021 06:03:10 -0500 Received: from mx0b-0016f401.pphosted.com ([67.231.156.173]:43512 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230080AbhAaJ4V (ORCPT ); Sun, 31 Jan 2021 04:56:21 -0500 Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 10V9o25p015872; Sun, 31 Jan 2021 01:52:14 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0220; bh=NCKf5ZgnSrIWPXx0HhVLtblWXDlmyMzkkzVWLJrrAyg=; b=DiqX7/r2YCcdt/aJdSxIIibNb9izsHWoK2gkhw+CPgPkJcgiurLee9Dp9SWP1D7BjweR F1RVG+qUfyKkTAJ3ey7YUrjPjps/lQPASCLWgU8yPOZLsB2fYdkU4ORfFTrYNt2JEEBE TBsJ+oLqKJdNKTYJHjg9RB7aknSdC5lpvdADHUQaup3tyiiUCJ4WfExPOfnr4rV1SRzA B3+z5Xh86RUP6wS4n9R/e+4PZndcUpAzFGWfUfdpx/xPIEBZaUUQjTEFJu9nCghwmSgZ nLhYGPHCMPcVQ+/N09BDzlaIxfxdnx5PpiJM0CkX6C4xz9Nu2xWilM6zMgDot6ZQR6eQ kw== Received: from dc5-exch01.marvell.com ([199.233.59.181]) by mx0b-0016f401.pphosted.com with ESMTP id 36d7uq1bmt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Sun, 31 Jan 2021 01:52:14 -0800 Received: from SC-EXCH03.marvell.com (10.93.176.83) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 31 Jan 2021 01:52:12 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 31 Jan 2021 01:52:12 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sun, 31 Jan 2021 01:52:12 -0800 Received: from stefan-pc.marvell.com (stefan-pc.marvell.com [10.5.25.21]) by maili.marvell.com (Postfix) with ESMTP id 23B603F703F; Sun, 31 Jan 2021 01:52:08 -0800 (PST) From: To: CC: , , , , , , , , , , , Subject: [PATCH v6 net-next 17/18] net: mvpp2: limit minimum ring size to 1024 descriptors Date: Sun, 31 Jan 2021 11:51:03 +0200 Message-ID: <1612086664-23972-18-git-send-email-stefanc@marvell.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1612086664-23972-1-git-send-email-stefanc@marvell.com> References: <1612086664-23972-1-git-send-email-stefanc@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.369,18.0.737 definitions=2021-01-31_03:2021-01-29,2021-01-31 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Stefan Chulski To support Flow Control ring size should be at least 1024 descriptors. Signed-off-by: Stefan Chulski --- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c index 7632810..98849b0 100644 --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c @@ -4543,6 +4543,8 @@ static int mvpp2_check_ringparam_valid(struct net_device *dev, if (ring->rx_pending > MVPP2_MAX_RXD_MAX) new_rx_pending = MVPP2_MAX_RXD_MAX; + else if (ring->rx_pending < MSS_THRESHOLD_START) + new_rx_pending = MSS_THRESHOLD_START; else if (!IS_ALIGNED(ring->rx_pending, 16)) new_rx_pending = ALIGN(ring->rx_pending, 16); -- 1.9.1