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[58.6.239.121]) by smtp.gmail.com with ESMTPSA id a23sm15414654pfk.80.2021.02.28.16.47.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 28 Feb 2021 16:47:17 -0800 (PST) Date: Mon, 01 Mar 2021 10:47:12 +1000 From: Nicholas Piggin Subject: Re: [PATCH v3 28/32] powerpc/64s: interrupt implement exit logic in C To: Christophe Leroy , linuxppc-dev@lists.ozlabs.org References: <20200225173541.1549955-1-npiggin@gmail.com> <20200225173541.1549955-29-npiggin@gmail.com> In-Reply-To: MIME-Version: 1.0 Message-Id: <1614559348.1mt70y0fhi.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Michal Suchanek Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Christophe Leroy's message of February 27, 2021 8:07 pm: >=20 >=20 > Le 25/02/2020 =C3=A0 18:35, Nicholas Piggin a =C3=A9crit=C2=A0: >> Implement the bulk of interrupt return logic in C. The asm return code >> must handle a few cases: restoring full GPRs, and emulating stack store. >>=20 >> The stack store emulation is significantly simplfied, rather than creati= ng >> a new return frame and switching to that before performing the store, it >> uses the PACA to keep a scratch register around to perform thestore. >>=20 >> The asm return code is moved into 64e for now. The new logic has made >> allowance for 64e, but I don't have a full environment that works well >> to test it, and even booting in emulated qemu is not great for stress >> testing. 64e shouldn't be too far off working with this, given a bit >> more testing and auditing of the logic. >>=20 >> This is slightly faster on a POWER9 (page fault speed increases about >> 1.1%), probably due to reduced mtmsrd. >=20 >=20 > This series, and especially this patch has added a awfull number of BUG_O= N() traps. >=20 > We have an issue open at https://github.com/linuxppc/issues/issues/88 sin= ce 2017 for reducing the=20 > number of BUG_ON()s >=20 > And the kernel Documentation is explicit on the willingness to deprecate = BUG_ON(), see=20 > https://www.kernel.org/doc/html/latest/process/deprecated.html?highlight= =3Dbug_on : >=20 > BUG() and BUG_ON() > Use WARN() and WARN_ON() instead, and handle the =E2=80=9Cimpossible=E2= =80=9D error condition as gracefully as=20 > possible. While the BUG()-family of APIs were originally designed to act = as an =E2=80=9Cimpossible=20 > situation=E2=80=9D assert and to kill a kernel thread =E2=80=9Csafely=E2= =80=9D, they turn out to just be too risky. (e.g.=20 > =E2=80=9CIn what order do locks need to be released? Have various states = been restored?=E2=80=9D) Very commonly,=20 > using BUG() will destabilize a system or entirely break it, which makes i= t impossible to debug or=20 > even get viable crash reports. Linus has very strong feelings about this. >=20 > So ... can we do something cleaner with all the BUG_ON()s recently added = ? Yeah you're right. Some of it is probably overkill due to paranoia when=20 developing the series. Now we have a bit more confidence we could probably look at cutting down=20 on these. I do get a bit concerned about detecting a problem in some code like=20 this and attempting to just continue, it usually means the system is=20 going to crash pretty badly anyway (and the WARN_ON trap interrupt is probably going to finish you off anyway). So I think removing the more obvious checks entirely (maybe with a PPC DEBUG config option) is the right way to go. Thanks, Nick