* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for vfio/pci: Add support for opregion v2.0+
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
(?)
@ 2020-12-02 10:04 ` Patchwork
-1 siblings, 0 replies; 48+ messages in thread
From: Patchwork @ 2020-12-02 10:04 UTC (permalink / raw)
To: Fred Gao; +Cc: intel-gfx
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+
URL : https://patchwork.freedesktop.org/series/84494/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
94d751a62299 vfio/pci: Add support for opregion v2.0+
-:41: CHECK:LINE_SPACING: Please don't use multiple blank lines
#41: FILE: drivers/vfio/pci/vfio_pci_igd.c:34:
+
+
-:74: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#74: FILE: drivers/vfio/pci/vfio_pci_igd.c:115:
+ pci_WARN(vdev->pdev, offset != size,
+ "Extended VBT does not follow opregion !\n"
total: 0 errors, 0 warnings, 2 checks, 62 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for vfio/pci: Add support for opregion v2.0+
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
(?)
(?)
@ 2020-12-02 10:35 ` Patchwork
-1 siblings, 0 replies; 48+ messages in thread
From: Patchwork @ 2020-12-02 10:35 UTC (permalink / raw)
To: Fred Gao; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 7425 bytes --]
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+
URL : https://patchwork.freedesktop.org/series/84494/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9418 -> Patchwork_19036
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/index.html
New tests
---------
New tests have been introduced between CI_DRM_9418 and Patchwork_19036:
### New CI tests (1) ###
* boot:
- Statuses : 1 fail(s) 40 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_19036 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_module_load@reload:
- fi-apl-guc: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-apl-guc/igt@i915_module_load@reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-apl-guc/igt@i915_module_load@reload.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- fi-icl-u2: [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-icl-u2/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
- fi-tgl-y: [PASS][5] -> [DMESG-WARN][6] ([i915#1982])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-tgl-y/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-tgl-y/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
* igt@prime_self_import@basic-with_two_bos:
- fi-tgl-y: [PASS][7] -> [DMESG-WARN][8] ([i915#402]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html
#### Possible fixes ####
* igt@core_hotunplug@unbind-rebind:
- fi-tgl-u2: [DMESG-WARN][9] ([i915#1982]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-tgl-u2/igt@core_hotunplug@unbind-rebind.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-tgl-u2/igt@core_hotunplug@unbind-rebind.html
- fi-icl-y: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-icl-y/igt@core_hotunplug@unbind-rebind.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-icl-y/igt@core_hotunplug@unbind-rebind.html
* igt@debugfs_test@read_all_entries:
- fi-tgl-y: [DMESG-WARN][13] ([i915#402]) -> [PASS][14] +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-tgl-y/igt@debugfs_test@read_all_entries.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-tgl-y/igt@debugfs_test@read_all_entries.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- {fi-ehl-1}: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-ehl-1/igt@i915_pm_rpm@basic-pci-d3-state.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-ehl-1/igt@i915_pm_rpm@basic-pci-d3-state.html
- fi-tgl-y: [DMESG-WARN][17] ([i915#1982] / [i915#2411]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-tgl-y/igt@i915_pm_rpm@basic-pci-d3-state.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-tgl-y/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-soraka: [DMESG-FAIL][19] ([i915#2291] / [i915#541]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
- fi-bsw-kefka: [DMESG-FAIL][21] ([i915#2675] / [i915#541]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-bsw-kefka/igt@i915_selftest@live@gt_heartbeat.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-bsw-kefka/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_lrc:
- fi-bsw-n3050: [DMESG-FAIL][23] ([i915#2675]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-bsw-n3050/igt@i915_selftest@live@gt_lrc.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-bsw-n3050/igt@i915_selftest@live@gt_lrc.html
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [DMESG-WARN][25] ([i915#1982] / [i915#262]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-byt-j1900: [DMESG-WARN][27] ([i915#1982]) -> [PASS][28] +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
- fi-icl-u2: [DMESG-WARN][29] ([i915#1982]) -> [PASS][30] +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
[i915#2675]: https://gitlab.freedesktop.org/drm/intel/issues/2675
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
Participating hosts (45 -> 41)
------------------------------
Missing (4): fi-ilk-m540 fi-bsw-cyan fi-bdw-samus fi-hsw-4200u
Build changes
-------------
* Linux: CI_DRM_9418 -> Patchwork_19036
CI-20190529: 20190529
CI_DRM_9418: 5ef90940f82646746fbc78f3af9cdfa503355ab0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5878: e96c0d8e6952d892bcbbcdf004999880a4dfb42e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19036: 94d751a622994b32440e72381f9dc79dff5f0cdc @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
94d751a62299 vfio/pci: Add support for opregion v2.0+
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/index.html
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for vfio/pci: Add support for opregion v2.0+
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
` (2 preceding siblings ...)
(?)
@ 2020-12-02 12:06 ` Patchwork
-1 siblings, 0 replies; 48+ messages in thread
From: Patchwork @ 2020-12-02 12:06 UTC (permalink / raw)
To: Fred Gao; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 19853 bytes --]
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+
URL : https://patchwork.freedesktop.org/series/84494/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9418_full -> Patchwork_19036_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
New tests
---------
New tests have been introduced between CI_DRM_9418_full and Patchwork_19036_full:
### New CI tests (1) ###
* boot:
- Statuses : 200 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_19036_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_whisper@basic-queues-forked:
- shard-glk: [PASS][1] -> [DMESG-WARN][2] ([i915#118] / [i915#95])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-glk5/igt@gem_exec_whisper@basic-queues-forked.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-glk1/igt@gem_exec_whisper@basic-queues-forked.html
* igt@i915_pm_rpm@dpms-non-lpsp:
- shard-glk: [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-glk2/igt@i915_pm_rpm@dpms-non-lpsp.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-glk5/igt@i915_pm_rpm@dpms-non-lpsp.html
* igt@kms_cursor_crc@pipe-c-cursor-128x128-offscreen:
- shard-skl: [PASS][5] -> [FAIL][6] ([i915#54]) +2 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl5/igt@kms_cursor_crc@pipe-c-cursor-128x128-offscreen.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl1/igt@kms_cursor_crc@pipe-c-cursor-128x128-offscreen.html
* igt@kms_draw_crc@draw-method-xrgb8888-blt-untiled:
- shard-hsw: [PASS][7] -> [DMESG-WARN][8] ([i915#1982])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-hsw6/igt@kms_draw_crc@draw-method-xrgb8888-blt-untiled.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-hsw1/igt@kms_draw_crc@draw-method-xrgb8888-blt-untiled.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-skl: [PASS][9] -> [FAIL][10] ([i915#79]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl5/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render:
- shard-tglb: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-tglb2/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-tglb6/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render.html
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109441]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-iclb4/igt@kms_psr@psr2_cursor_render.html
* igt@kms_psr@suspend:
- shard-skl: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) +3 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl5/igt@kms_psr@suspend.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl8/igt@kms_psr@suspend.html
* igt@perf@polling-parameterized:
- shard-iclb: [PASS][17] -> [FAIL][18] ([i915#1542])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-iclb5/igt@perf@polling-parameterized.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-iclb8/igt@perf@polling-parameterized.html
- shard-skl: [PASS][19] -> [FAIL][20] ([i915#1542])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl8/igt@perf@polling-parameterized.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl9/igt@perf@polling-parameterized.html
#### Possible fixes ####
* igt@api_intel_bb@render-ccs:
- shard-glk: [INCOMPLETE][21] ([i915#2405] / [i915#2499]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-glk4/igt@api_intel_bb@render-ccs.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-glk9/igt@api_intel_bb@render-ccs.html
- shard-tglb: [INCOMPLETE][23] ([i915#2588]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-tglb2/igt@api_intel_bb@render-ccs.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-tglb8/igt@api_intel_bb@render-ccs.html
* igt@gem_exec_flush@basic-wb-rw-default:
- shard-hsw: [INCOMPLETE][25] ([i915#2055]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-hsw2/igt@gem_exec_flush@basic-wb-rw-default.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-hsw6/igt@gem_exec_flush@basic-wb-rw-default.html
* igt@gem_exec_gttfill@engines@rcs0:
- shard-glk: [DMESG-WARN][27] ([i915#118] / [i915#95]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-glk9/igt@gem_exec_gttfill@engines@rcs0.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-glk3/igt@gem_exec_gttfill@engines@rcs0.html
* igt@gem_exec_whisper@basic-fds-all:
- shard-iclb: [INCOMPLETE][29] -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-iclb4/igt@gem_exec_whisper@basic-fds-all.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-iclb5/igt@gem_exec_whisper@basic-fds-all.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [FAIL][31] ([i915#454]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-iclb6/igt@i915_pm_dc@dc6-psr.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-iclb2/igt@i915_pm_dc@dc6-psr.html
* {igt@kms_async_flips@alternate-sync-async-flip}:
- shard-skl: [FAIL][33] ([i915#2521]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl5/igt@kms_async_flips@alternate-sync-async-flip.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl8/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_cursor_crc@pipe-b-cursor-64x21-sliding:
- shard-skl: [FAIL][35] ([i915#54]) -> [PASS][36] +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl5/igt@kms_cursor_crc@pipe-b-cursor-64x21-sliding.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-64x21-sliding.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic:
- shard-skl: [FAIL][37] ([i915#2346]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-toggle:
- shard-hsw: [FAIL][39] -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-hsw6/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-hsw2/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
* igt@kms_cursor_legacy@short-flip-before-cursor-toggle:
- shard-apl: [DMESG-WARN][41] ([i915#1982]) -> [PASS][42] +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-apl6/igt@kms_cursor_legacy@short-flip-before-cursor-toggle.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-apl4/igt@kms_cursor_legacy@short-flip-before-cursor-toggle.html
* igt@kms_flip@absolute-wf_vblank-interruptible@a-edp1:
- shard-skl: [DMESG-WARN][43] ([i915#1982]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl5/igt@kms_flip@absolute-wf_vblank-interruptible@a-edp1.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl1/igt@kms_flip@absolute-wf_vblank-interruptible@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
- shard-tglb: [FAIL][45] ([i915#2598]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-tglb8/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-tglb6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-skl: [FAIL][47] ([i915#79]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl2/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl5/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-edp1:
- shard-skl: [INCOMPLETE][49] ([i915#198]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl9/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl2/igt@kms_flip@flip-vs-suspend-interruptible@a-edp1.html
* igt@kms_flip@plain-flip-fb-recreate@b-edp1:
- shard-skl: [FAIL][51] ([i915#2122]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl2/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl5/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-gtt:
- shard-tglb: [DMESG-WARN][53] ([i915#1982]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-tglb5/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-gtt.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-tglb1/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-gtt.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [FAIL][55] ([i915#1188]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl6/igt@kms_hdr@bpc-switch-dpms.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl4/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][57] ([fdo#108145] / [i915#265]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr@psr2_cursor_plane_move:
- shard-iclb: [SKIP][59] ([fdo#109441]) -> [PASS][60] +1 similar issue
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-iclb6/igt@kms_psr@psr2_cursor_plane_move.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html
* igt@perf_pmu@module-unload:
- shard-skl: [DMESG-WARN][61] ([i915#1982] / [i915#262]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl6/igt@perf_pmu@module-unload.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl9/igt@perf_pmu@module-unload.html
* igt@sysfs_preempt_timeout@timeout@bcs0:
- shard-skl: [FAIL][63] ([i915#2060]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl2/igt@sysfs_preempt_timeout@timeout@bcs0.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl10/igt@sysfs_preempt_timeout@timeout@bcs0.html
#### Warnings ####
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-iclb: [SKIP][65] ([i915#588]) -> [SKIP][66] ([i915#658])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-iclb4/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][67] ([i915#1804] / [i915#2684]) -> [WARN][68] ([i915#2684])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-iclb6/igt@i915_pm_rc6_residency@rc6-fence.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-iclb2/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][69] ([i915#2681] / [i915#2684]) -> [FAIL][70] ([i915#2680])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-iclb8/igt@i915_pm_rc6_residency@rc6-idle.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-iclb1/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
- shard-apl: [FAIL][71] ([fdo#108145] / [i915#265]) -> [DMESG-FAIL][72] ([fdo#108145] / [i915#1982])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-apl3/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-apl7/igt@kms_plane_alpha_blend@pipe-b-alpha-basic.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][73], [FAIL][74]) ([i915#1436] / [i915#2295] / [i915#2426] / [i915#2505] / [i915#2722] / [i915#483]) -> ([FAIL][75], [FAIL][76], [FAIL][77]) ([i915#1436] / [i915#2295] / [i915#2426] / [i915#2505] / [i915#2722] / [i915#483] / [i915#92])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-kbl6/igt@runner@aborted.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-kbl1/igt@runner@aborted.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-kbl7/igt@runner@aborted.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-kbl6/igt@runner@aborted.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-kbl1/igt@runner@aborted.html
- shard-iclb: ([FAIL][78], [FAIL][79]) ([i915#2295] / [i915#2722]) -> ([FAIL][80], [FAIL][81]) ([i915#2295] / [i915#2722] / [i915#483])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-iclb4/igt@runner@aborted.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-iclb2/igt@runner@aborted.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-iclb7/igt@runner@aborted.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-iclb3/igt@runner@aborted.html
- shard-glk: ([FAIL][82], [FAIL][83], [FAIL][84]) ([i915#2295] / [i915#2426] / [i915#2722] / [i915#483] / [k.org#202321]) -> ([FAIL][85], [FAIL][86], [FAIL][87]) ([i915#2295] / [i915#2426] / [i915#2722] / [k.org#202321])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-glk5/igt@runner@aborted.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-glk2/igt@runner@aborted.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-glk7/igt@runner@aborted.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-glk1/igt@runner@aborted.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-glk4/igt@runner@aborted.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-glk8/igt@runner@aborted.html
- shard-skl: ([FAIL][88], [FAIL][89], [FAIL][90]) ([i915#1436] / [i915#2029] / [i915#2295] / [i915#2426] / [i915#2722]) -> [FAIL][91] ([i915#2295] / [i915#2722] / [i915#483])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl6/igt@runner@aborted.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl10/igt@runner@aborted.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9418/shard-skl3/igt@runner@aborted.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/shard-skl9/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#1804]: https://gitlab.freedesktop.org/drm/intel/issues/1804
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
[i915#2055]: https://gitlab.freedesktop.org/drm/intel/issues/2055
[i915#2060]: https://gitlab.freedesktop.org/drm/intel/issues/2060
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2295]: https://gitlab.freedesktop.org/drm/intel/issues/2295
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2405]: https://gitlab.freedesktop.org/drm/intel/issues/2405
[i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
[i915#2499]: https://gitlab.freedesktop.org/drm/intel/issues/2499
[i915#2505]: https://gitlab.freedesktop.org/drm/intel/issues/2505
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#2588]: https://gitlab.freedesktop.org/drm/intel/issues/2588
[i915#2598]: https://gitlab.freedesktop.org/drm/intel/issues/2598
[i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#2680]: https://gitlab.freedesktop.org/drm/intel/issues/2680
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2684]: https://gitlab.freedesktop.org/drm/intel/issues/2684
[i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#483]: https://gitlab.freedesktop.org/drm/intel/issues/483
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#588]: https://gitlab.freedesktop.org/drm/intel/issues/588
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
[k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_9418 -> Patchwork_19036
CI-20190529: 20190529
CI_DRM_9418: 5ef90940f82646746fbc78f3af9cdfa503355ab0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5878: e96c0d8e6952d892bcbbcdf004999880a4dfb42e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19036: 94d751a622994b32440e72381f9dc79dff5f0cdc @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19036/index.html
[-- Attachment #1.2: Type: text/html, Size: 24648 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH v1] vfio/pci: Add support for opregion v2.0+
@ 2020-12-02 17:12 ` Fred Gao
0 siblings, 0 replies; 48+ messages in thread
From: Fred Gao @ 2020-12-02 17:12 UTC (permalink / raw)
To: kvm, intel-gfx; +Cc: Fred Gao, Zhenyu Wang, Swee Yee Fonn
When VBT data exceeds 6KB size and cannot be within mailbox #4 starting
from opregion v2.0+, Extended VBT region, next to opregion, is used to
hold the VBT data, so the total size will be opregion size plus
extended VBT region size.
For opregion 2.1+: since rvda is relative offset from opregion base,
rvda as extended VBT start offset should be same as opregion size.
For opregion 2.0: the only difference between opregion 2.0 and 2.1 is
rvda addressing mode besides the version. since rvda is physical host
VBT address and cannot be directly used in guest, it is faked into
opregion 2.1's relative offset.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
Signed-off-by: Fred Gao <fred.gao@intel.com>
---
drivers/vfio/pci/vfio_pci_igd.c | 44 +++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
index 53d97f459252..78919a289914 100644
--- a/drivers/vfio/pci/vfio_pci_igd.c
+++ b/drivers/vfio/pci/vfio_pci_igd.c
@@ -21,6 +21,17 @@
#define OPREGION_SIZE (8 * 1024)
#define OPREGION_PCI_ADDR 0xfc
+/*
+ * opregion 2.0: rvda is the physical VBT address.
+ *
+ * opregion 2.1+: rvda is unsigned, relative offset from
+ * opregion base, and should never point within opregion.
+ */
+#define OPREGION_RDVA 0x3ba
+#define OPREGION_RDVS 0x3c2
+#define OPREGION_VERSION 22
+
+
static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
size_t count, loff_t *ppos, bool iswrite)
{
@@ -58,6 +69,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
u32 addr, size;
void *base;
int ret;
+ u16 version;
ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
if (ret)
@@ -83,6 +95,38 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
size *= 1024; /* In KB */
+ /* Support opregion v2.0+ */
+ version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
+ if (version >= 0x0200) {
+ u64 rvda;
+ u32 rvds;
+
+ rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RDVA));
+ rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RDVS));
+ if (rvda && rvds) {
+ u32 offset;
+
+ if (version == 0x0200)
+ offset = (rvda - (u64)addr);
+ else
+ offset = rvda;
+
+ pci_WARN(vdev->pdev, offset != size,
+ "Extended VBT does not follow opregion !\n"
+ "opregion version 0x%x:offset 0x%x\n", version, offset);
+
+ if (version == 0x0200) {
+ /* opregion version v2.0 faked to v2.1 */
+ *(__le16 *)(base + OPREGION_VERSION) =
+ cpu_to_le16(0x0201);
+ /* rvda faked to relative offset */
+ (*(__le64 *)(base + OPREGION_RDVA)) =
+ cpu_to_le64((rvda - (u64)addr));
+ }
+ size = offset + rvds;
+ }
+ }
+
if (size != OPREGION_SIZE) {
memunmap(base);
base = memremap(addr, size, MEMREMAP_WB);
--
2.24.1.1.gb6d4d82bd5
^ permalink raw reply related [flat|nested] 48+ messages in thread
* [Intel-gfx] [PATCH v1] vfio/pci: Add support for opregion v2.0+
@ 2020-12-02 17:12 ` Fred Gao
0 siblings, 0 replies; 48+ messages in thread
From: Fred Gao @ 2020-12-02 17:12 UTC (permalink / raw)
To: kvm, intel-gfx; +Cc: Fred Gao, Swee Yee Fonn
When VBT data exceeds 6KB size and cannot be within mailbox #4 starting
from opregion v2.0+, Extended VBT region, next to opregion, is used to
hold the VBT data, so the total size will be opregion size plus
extended VBT region size.
For opregion 2.1+: since rvda is relative offset from opregion base,
rvda as extended VBT start offset should be same as opregion size.
For opregion 2.0: the only difference between opregion 2.0 and 2.1 is
rvda addressing mode besides the version. since rvda is physical host
VBT address and cannot be directly used in guest, it is faked into
opregion 2.1's relative offset.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
Signed-off-by: Fred Gao <fred.gao@intel.com>
---
drivers/vfio/pci/vfio_pci_igd.c | 44 +++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
index 53d97f459252..78919a289914 100644
--- a/drivers/vfio/pci/vfio_pci_igd.c
+++ b/drivers/vfio/pci/vfio_pci_igd.c
@@ -21,6 +21,17 @@
#define OPREGION_SIZE (8 * 1024)
#define OPREGION_PCI_ADDR 0xfc
+/*
+ * opregion 2.0: rvda is the physical VBT address.
+ *
+ * opregion 2.1+: rvda is unsigned, relative offset from
+ * opregion base, and should never point within opregion.
+ */
+#define OPREGION_RDVA 0x3ba
+#define OPREGION_RDVS 0x3c2
+#define OPREGION_VERSION 22
+
+
static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
size_t count, loff_t *ppos, bool iswrite)
{
@@ -58,6 +69,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
u32 addr, size;
void *base;
int ret;
+ u16 version;
ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
if (ret)
@@ -83,6 +95,38 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
size *= 1024; /* In KB */
+ /* Support opregion v2.0+ */
+ version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
+ if (version >= 0x0200) {
+ u64 rvda;
+ u32 rvds;
+
+ rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RDVA));
+ rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RDVS));
+ if (rvda && rvds) {
+ u32 offset;
+
+ if (version == 0x0200)
+ offset = (rvda - (u64)addr);
+ else
+ offset = rvda;
+
+ pci_WARN(vdev->pdev, offset != size,
+ "Extended VBT does not follow opregion !\n"
+ "opregion version 0x%x:offset 0x%x\n", version, offset);
+
+ if (version == 0x0200) {
+ /* opregion version v2.0 faked to v2.1 */
+ *(__le16 *)(base + OPREGION_VERSION) =
+ cpu_to_le16(0x0201);
+ /* rvda faked to relative offset */
+ (*(__le64 *)(base + OPREGION_RDVA)) =
+ cpu_to_le64((rvda - (u64)addr));
+ }
+ size = offset + rvds;
+ }
+ }
+
if (size != OPREGION_SIZE) {
memunmap(base);
base = memremap(addr, size, MEMREMAP_WB);
--
2.24.1.1.gb6d4d82bd5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread
* Re: [PATCH v1] vfio/pci: Add support for opregion v2.0+
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
@ 2020-12-02 18:57 ` Alex Williamson
-1 siblings, 0 replies; 48+ messages in thread
From: Alex Williamson @ 2020-12-02 18:57 UTC (permalink / raw)
To: Fred Gao; +Cc: kvm, intel-gfx, Zhenyu Wang, Swee Yee Fonn
On Thu, 3 Dec 2020 01:12:49 +0800
Fred Gao <fred.gao@intel.com> wrote:
> When VBT data exceeds 6KB size and cannot be within mailbox #4 starting
> from opregion v2.0+, Extended VBT region, next to opregion, is used to
> hold the VBT data, so the total size will be opregion size plus
> extended VBT region size.
>
> For opregion 2.1+: since rvda is relative offset from opregion base,
> rvda as extended VBT start offset should be same as opregion size.
>
> For opregion 2.0: the only difference between opregion 2.0 and 2.1 is
> rvda addressing mode besides the version. since rvda is physical host
> VBT address and cannot be directly used in guest, it is faked into
> opregion 2.1's relative offset.
>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> Signed-off-by: Fred Gao <fred.gao@intel.com>
> ---
> drivers/vfio/pci/vfio_pci_igd.c | 44 +++++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
> index 53d97f459252..78919a289914 100644
> --- a/drivers/vfio/pci/vfio_pci_igd.c
> +++ b/drivers/vfio/pci/vfio_pci_igd.c
> @@ -21,6 +21,17 @@
> #define OPREGION_SIZE (8 * 1024)
> #define OPREGION_PCI_ADDR 0xfc
>
> +/*
> + * opregion 2.0: rvda is the physical VBT address.
What's rvda? What's VBT?
> + *
> + * opregion 2.1+: rvda is unsigned, relative offset from
> + * opregion base, and should never point within opregion.
> + */
> +#define OPREGION_RDVA 0x3ba
> +#define OPREGION_RDVS 0x3c2
> +#define OPREGION_VERSION 22
Why is this specified as decimal and the others in hex? This makes it
seem like the actual version rather than the offset of a version
register.
> +
> +
> static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
> size_t count, loff_t *ppos, bool iswrite)
> {
> @@ -58,6 +69,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> u32 addr, size;
> void *base;
> int ret;
> + u16 version;
>
> ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
> if (ret)
> @@ -83,6 +95,38 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
>
> size *= 1024; /* In KB */
>
> + /* Support opregion v2.0+ */
> + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> + if (version >= 0x0200) {
> + u64 rvda;
> + u32 rvds;
> +
> + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RDVA));
> + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RDVS));
> + if (rvda && rvds) {
> + u32 offset;
> +
> + if (version == 0x0200)
> + offset = (rvda - (u64)addr);
Unnecessary outer ()
> + else
> + offset = rvda;
> +
> + pci_WARN(vdev->pdev, offset != size,
> + "Extended VBT does not follow opregion !\n"
> + "opregion version 0x%x:offset 0x%x\n", version, offset);
> +
> + if (version == 0x0200) {
> + /* opregion version v2.0 faked to v2.1 */
> + *(__le16 *)(base + OPREGION_VERSION) =
> + cpu_to_le16(0x0201);
> + /* rvda faked to relative offset */
> + (*(__le64 *)(base + OPREGION_RDVA)) =
> + cpu_to_le64((rvda - (u64)addr));
We're writing to the OpRegion and affecting all future use of it, seems
dangerous.
> + }
> + size = offset + rvds;
We warn about VBT (whatever that is) not immediately following the
OpRegion, but then we go ahead and size the thing that we expose to
userspace to allow read access to everything between the OpRegion and
VBT??
> + }
> + }
> +
> if (size != OPREGION_SIZE) {
> memunmap(base);
> base = memremap(addr, size, MEMREMAP_WB);
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] [PATCH v1] vfio/pci: Add support for opregion v2.0+
@ 2020-12-02 18:57 ` Alex Williamson
0 siblings, 0 replies; 48+ messages in thread
From: Alex Williamson @ 2020-12-02 18:57 UTC (permalink / raw)
To: Fred Gao; +Cc: Swee Yee Fonn, intel-gfx, kvm
On Thu, 3 Dec 2020 01:12:49 +0800
Fred Gao <fred.gao@intel.com> wrote:
> When VBT data exceeds 6KB size and cannot be within mailbox #4 starting
> from opregion v2.0+, Extended VBT region, next to opregion, is used to
> hold the VBT data, so the total size will be opregion size plus
> extended VBT region size.
>
> For opregion 2.1+: since rvda is relative offset from opregion base,
> rvda as extended VBT start offset should be same as opregion size.
>
> For opregion 2.0: the only difference between opregion 2.0 and 2.1 is
> rvda addressing mode besides the version. since rvda is physical host
> VBT address and cannot be directly used in guest, it is faked into
> opregion 2.1's relative offset.
>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> Signed-off-by: Fred Gao <fred.gao@intel.com>
> ---
> drivers/vfio/pci/vfio_pci_igd.c | 44 +++++++++++++++++++++++++++++++++
> 1 file changed, 44 insertions(+)
>
> diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
> index 53d97f459252..78919a289914 100644
> --- a/drivers/vfio/pci/vfio_pci_igd.c
> +++ b/drivers/vfio/pci/vfio_pci_igd.c
> @@ -21,6 +21,17 @@
> #define OPREGION_SIZE (8 * 1024)
> #define OPREGION_PCI_ADDR 0xfc
>
> +/*
> + * opregion 2.0: rvda is the physical VBT address.
What's rvda? What's VBT?
> + *
> + * opregion 2.1+: rvda is unsigned, relative offset from
> + * opregion base, and should never point within opregion.
> + */
> +#define OPREGION_RDVA 0x3ba
> +#define OPREGION_RDVS 0x3c2
> +#define OPREGION_VERSION 22
Why is this specified as decimal and the others in hex? This makes it
seem like the actual version rather than the offset of a version
register.
> +
> +
> static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
> size_t count, loff_t *ppos, bool iswrite)
> {
> @@ -58,6 +69,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> u32 addr, size;
> void *base;
> int ret;
> + u16 version;
>
> ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
> if (ret)
> @@ -83,6 +95,38 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
>
> size *= 1024; /* In KB */
>
> + /* Support opregion v2.0+ */
> + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> + if (version >= 0x0200) {
> + u64 rvda;
> + u32 rvds;
> +
> + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RDVA));
> + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RDVS));
> + if (rvda && rvds) {
> + u32 offset;
> +
> + if (version == 0x0200)
> + offset = (rvda - (u64)addr);
Unnecessary outer ()
> + else
> + offset = rvda;
> +
> + pci_WARN(vdev->pdev, offset != size,
> + "Extended VBT does not follow opregion !\n"
> + "opregion version 0x%x:offset 0x%x\n", version, offset);
> +
> + if (version == 0x0200) {
> + /* opregion version v2.0 faked to v2.1 */
> + *(__le16 *)(base + OPREGION_VERSION) =
> + cpu_to_le16(0x0201);
> + /* rvda faked to relative offset */
> + (*(__le64 *)(base + OPREGION_RDVA)) =
> + cpu_to_le64((rvda - (u64)addr));
We're writing to the OpRegion and affecting all future use of it, seems
dangerous.
> + }
> + size = offset + rvds;
We warn about VBT (whatever that is) not immediately following the
OpRegion, but then we go ahead and size the thing that we expose to
userspace to allow read access to everything between the OpRegion and
VBT??
> + }
> + }
> +
> if (size != OPREGION_SIZE) {
> memunmap(base);
> base = memremap(addr, size, MEMREMAP_WB);
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH v1] vfio/pci: Add support for opregion v2.0+
2020-12-02 18:57 ` [Intel-gfx] " Alex Williamson
@ 2020-12-03 9:21 ` Gao, Fred
-1 siblings, 0 replies; 48+ messages in thread
From: Gao, Fred @ 2020-12-03 9:21 UTC (permalink / raw)
To: Alex Williamson; +Cc: kvm, intel-gfx, Zhenyu Wang, Fonn, Swee Yee
Thanks Alex for the timely review.
> -----Original Message-----
> From: Alex Williamson <alex.williamson@redhat.com>
> Sent: Thursday, December 3, 2020 2:57 AM
> To: Gao, Fred <fred.gao@intel.com>
> Cc: kvm@vger.kernel.org; intel-gfx@lists.freedesktop.org; Zhenyu Wang
> <zhenyuw@linux.intel.com>; Fonn, Swee Yee <swee.yee.fonn@intel.com>
> Subject: Re: [PATCH v1] vfio/pci: Add support for opregion v2.0+
>
> On Thu, 3 Dec 2020 01:12:49 +0800
> Fred Gao <fred.gao@intel.com> wrote:
>
> > When VBT data exceeds 6KB size and cannot be within mailbox #4
> > starting from opregion v2.0+, Extended VBT region, next to opregion,
> > is used to hold the VBT data, so the total size will be opregion size
> > plus extended VBT region size.
> >
> > For opregion 2.1+: since rvda is relative offset from opregion base,
> > rvda as extended VBT start offset should be same as opregion size.
> >
> > For opregion 2.0: the only difference between opregion 2.0 and 2.1 is
> > rvda addressing mode besides the version. since rvda is physical host
> > VBT address and cannot be directly used in guest, it is faked into
> > opregion 2.1's relative offset.
> >
> > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> > Signed-off-by: Fred Gao <fred.gao@intel.com>
> > ---
> > drivers/vfio/pci/vfio_pci_igd.c | 44
> > +++++++++++++++++++++++++++++++++
> > 1 file changed, 44 insertions(+)
> >
> > diff --git a/drivers/vfio/pci/vfio_pci_igd.c
> > b/drivers/vfio/pci/vfio_pci_igd.c index 53d97f459252..78919a289914
> > 100644
> > --- a/drivers/vfio/pci/vfio_pci_igd.c
> > +++ b/drivers/vfio/pci/vfio_pci_igd.c
> > @@ -21,6 +21,17 @@
> > #define OPREGION_SIZE (8 * 1024)
> > #define OPREGION_PCI_ADDR 0xfc
> >
> > +/*
> > + * opregion 2.0: rvda is the physical VBT address.
>
> What's rvda? What's VBT?
Rvda is a struct member in opregion mailbox 3 ,
same definition in i915's struct opregion_asle.
I,e Physical address of raw VBT data (v2.0) or
Relative address from opregion (v2.1).
VBT: video bios table ,
the data is stored in opregion mailbox 4 before opregion v2.0.
After opregion v2.0+ , VBT data is larger than mailbox 4,
so Extended VBT region, next to opregion is used to hold the data.
> > + *
> > + * opregion 2.1+: rvda is unsigned, relative offset from
> > + * opregion base, and should never point within opregion.
> > + */
> > +#define OPREGION_RDVA 0x3ba
> > +#define OPREGION_RDVS 0x3c2
> > +#define OPREGION_VERSION 22
>
> Why is this specified as decimal and the others in hex? This makes it seem
> like the actual version rather than the offset of a version register.
Yes, it is an offset, will redefine the opregion version offset in hex.
> > +
> > +
> > static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user
> *buf,
> > size_t count, loff_t *ppos, bool iswrite) { @@ -
> 58,6 +69,7
> > @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> > u32 addr, size;
> > void *base;
> > int ret;
> > + u16 version;
> >
> > ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR,
> &addr);
> > if (ret)
> > @@ -83,6 +95,38 @@ static int vfio_pci_igd_opregion_init(struct
> > vfio_pci_device *vdev)
> >
> > size *= 1024; /* In KB */
> >
> > + /* Support opregion v2.0+ */
> > + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> > + if (version >= 0x0200) {
> > + u64 rvda;
> > + u32 rvds;
> > +
> > + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RDVA));
> > + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RDVS));
> > + if (rvda && rvds) {
> > + u32 offset;
> > +
> > + if (version == 0x0200)
> > + offset = (rvda - (u64)addr);
>
> Unnecessary outer ()
Thx, will remove in new patch.
> > + else
> > + offset = rvda;
> > +
> > + pci_WARN(vdev->pdev, offset != size,
> > + "Extended VBT does not follow opregion !\n"
> > + "opregion version 0x%x:offset 0x%x\n",
> version, offset);
> > +
> > + if (version == 0x0200) {
> > + /* opregion version v2.0 faked to v2.1 */
> > + *(__le16 *)(base + OPREGION_VERSION) =
> > + cpu_to_le16(0x0201);
> > + /* rvda faked to relative offset */
> > + (*(__le64 *)(base + OPREGION_RDVA)) =
> > + cpu_to_le64((rvda - (u64)addr));
>
> We're writing to the OpRegion and affecting all future use of it, seems
> dangerous.
from the opregion v2.0+ specification
since there is only RVDA difference between opregion v2.0 and v2.1 besides the version
It is the simplest solution and should not impact the future use.
> > + }
> > + size = offset + rvds;
>
>
> We warn about VBT (whatever that is) not immediately following the
> OpRegion, but then we go ahead and size the thing that we expose to
> userspace to allow read access to everything between the OpRegion and
> VBT??
From the specification , there should no hole between opregion and VBT.
But I am not sure if some vendor BIOS will make the hole.
Can we return the error if this abnormal thing happens ?
> > + }
> > + }
> > +
> > if (size != OPREGION_SIZE) {
> > memunmap(base);
> > base = memremap(addr, size, MEMREMAP_WB);
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] [PATCH v1] vfio/pci: Add support for opregion v2.0+
@ 2020-12-03 9:21 ` Gao, Fred
0 siblings, 0 replies; 48+ messages in thread
From: Gao, Fred @ 2020-12-03 9:21 UTC (permalink / raw)
To: Alex Williamson; +Cc: Fonn, Swee Yee, intel-gfx, kvm
Thanks Alex for the timely review.
> -----Original Message-----
> From: Alex Williamson <alex.williamson@redhat.com>
> Sent: Thursday, December 3, 2020 2:57 AM
> To: Gao, Fred <fred.gao@intel.com>
> Cc: kvm@vger.kernel.org; intel-gfx@lists.freedesktop.org; Zhenyu Wang
> <zhenyuw@linux.intel.com>; Fonn, Swee Yee <swee.yee.fonn@intel.com>
> Subject: Re: [PATCH v1] vfio/pci: Add support for opregion v2.0+
>
> On Thu, 3 Dec 2020 01:12:49 +0800
> Fred Gao <fred.gao@intel.com> wrote:
>
> > When VBT data exceeds 6KB size and cannot be within mailbox #4
> > starting from opregion v2.0+, Extended VBT region, next to opregion,
> > is used to hold the VBT data, so the total size will be opregion size
> > plus extended VBT region size.
> >
> > For opregion 2.1+: since rvda is relative offset from opregion base,
> > rvda as extended VBT start offset should be same as opregion size.
> >
> > For opregion 2.0: the only difference between opregion 2.0 and 2.1 is
> > rvda addressing mode besides the version. since rvda is physical host
> > VBT address and cannot be directly used in guest, it is faked into
> > opregion 2.1's relative offset.
> >
> > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> > Signed-off-by: Fred Gao <fred.gao@intel.com>
> > ---
> > drivers/vfio/pci/vfio_pci_igd.c | 44
> > +++++++++++++++++++++++++++++++++
> > 1 file changed, 44 insertions(+)
> >
> > diff --git a/drivers/vfio/pci/vfio_pci_igd.c
> > b/drivers/vfio/pci/vfio_pci_igd.c index 53d97f459252..78919a289914
> > 100644
> > --- a/drivers/vfio/pci/vfio_pci_igd.c
> > +++ b/drivers/vfio/pci/vfio_pci_igd.c
> > @@ -21,6 +21,17 @@
> > #define OPREGION_SIZE (8 * 1024)
> > #define OPREGION_PCI_ADDR 0xfc
> >
> > +/*
> > + * opregion 2.0: rvda is the physical VBT address.
>
> What's rvda? What's VBT?
Rvda is a struct member in opregion mailbox 3 ,
same definition in i915's struct opregion_asle.
I,e Physical address of raw VBT data (v2.0) or
Relative address from opregion (v2.1).
VBT: video bios table ,
the data is stored in opregion mailbox 4 before opregion v2.0.
After opregion v2.0+ , VBT data is larger than mailbox 4,
so Extended VBT region, next to opregion is used to hold the data.
> > + *
> > + * opregion 2.1+: rvda is unsigned, relative offset from
> > + * opregion base, and should never point within opregion.
> > + */
> > +#define OPREGION_RDVA 0x3ba
> > +#define OPREGION_RDVS 0x3c2
> > +#define OPREGION_VERSION 22
>
> Why is this specified as decimal and the others in hex? This makes it seem
> like the actual version rather than the offset of a version register.
Yes, it is an offset, will redefine the opregion version offset in hex.
> > +
> > +
> > static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user
> *buf,
> > size_t count, loff_t *ppos, bool iswrite) { @@ -
> 58,6 +69,7
> > @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> > u32 addr, size;
> > void *base;
> > int ret;
> > + u16 version;
> >
> > ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR,
> &addr);
> > if (ret)
> > @@ -83,6 +95,38 @@ static int vfio_pci_igd_opregion_init(struct
> > vfio_pci_device *vdev)
> >
> > size *= 1024; /* In KB */
> >
> > + /* Support opregion v2.0+ */
> > + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> > + if (version >= 0x0200) {
> > + u64 rvda;
> > + u32 rvds;
> > +
> > + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RDVA));
> > + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RDVS));
> > + if (rvda && rvds) {
> > + u32 offset;
> > +
> > + if (version == 0x0200)
> > + offset = (rvda - (u64)addr);
>
> Unnecessary outer ()
Thx, will remove in new patch.
> > + else
> > + offset = rvda;
> > +
> > + pci_WARN(vdev->pdev, offset != size,
> > + "Extended VBT does not follow opregion !\n"
> > + "opregion version 0x%x:offset 0x%x\n",
> version, offset);
> > +
> > + if (version == 0x0200) {
> > + /* opregion version v2.0 faked to v2.1 */
> > + *(__le16 *)(base + OPREGION_VERSION) =
> > + cpu_to_le16(0x0201);
> > + /* rvda faked to relative offset */
> > + (*(__le64 *)(base + OPREGION_RDVA)) =
> > + cpu_to_le64((rvda - (u64)addr));
>
> We're writing to the OpRegion and affecting all future use of it, seems
> dangerous.
from the opregion v2.0+ specification
since there is only RVDA difference between opregion v2.0 and v2.1 besides the version
It is the simplest solution and should not impact the future use.
> > + }
> > + size = offset + rvds;
>
>
> We warn about VBT (whatever that is) not immediately following the
> OpRegion, but then we go ahead and size the thing that we expose to
> userspace to allow read access to everything between the OpRegion and
> VBT??
From the specification , there should no hole between opregion and VBT.
But I am not sure if some vendor BIOS will make the hole.
Can we return the error if this abnormal thing happens ?
> > + }
> > + }
> > +
> > if (size != OPREGION_SIZE) {
> > memunmap(base);
> > base = memremap(addr, size, MEMREMAP_WB);
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [PATCH v1] vfio/pci: Add support for opregion v2.0+
2020-12-03 9:21 ` [Intel-gfx] " Gao, Fred
@ 2020-12-03 23:38 ` Alex Williamson
-1 siblings, 0 replies; 48+ messages in thread
From: Alex Williamson @ 2020-12-03 23:38 UTC (permalink / raw)
To: Gao, Fred; +Cc: kvm, intel-gfx, Zhenyu Wang, Fonn, Swee Yee
On Thu, 3 Dec 2020 09:21:03 +0000
"Gao, Fred" <fred.gao@intel.com> wrote:
> Thanks Alex for the timely review.
>
> > -----Original Message-----
> > From: Alex Williamson <alex.williamson@redhat.com>
> > Sent: Thursday, December 3, 2020 2:57 AM
> > To: Gao, Fred <fred.gao@intel.com>
> > Cc: kvm@vger.kernel.org; intel-gfx@lists.freedesktop.org; Zhenyu Wang
> > <zhenyuw@linux.intel.com>; Fonn, Swee Yee <swee.yee.fonn@intel.com>
> > Subject: Re: [PATCH v1] vfio/pci: Add support for opregion v2.0+
> >
> > On Thu, 3 Dec 2020 01:12:49 +0800
> > Fred Gao <fred.gao@intel.com> wrote:
> >
> > > When VBT data exceeds 6KB size and cannot be within mailbox #4
> > > starting from opregion v2.0+, Extended VBT region, next to opregion,
> > > is used to hold the VBT data, so the total size will be opregion size
> > > plus extended VBT region size.
> > >
> > > For opregion 2.1+: since rvda is relative offset from opregion base,
> > > rvda as extended VBT start offset should be same as opregion size.
> > >
> > > For opregion 2.0: the only difference between opregion 2.0 and 2.1 is
> > > rvda addressing mode besides the version. since rvda is physical host
> > > VBT address and cannot be directly used in guest, it is faked into
> > > opregion 2.1's relative offset.
> > >
> > > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > > Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> > > Signed-off-by: Fred Gao <fred.gao@intel.com>
> > > ---
> > > drivers/vfio/pci/vfio_pci_igd.c | 44
> > > +++++++++++++++++++++++++++++++++
> > > 1 file changed, 44 insertions(+)
> > >
> > > diff --git a/drivers/vfio/pci/vfio_pci_igd.c
> > > b/drivers/vfio/pci/vfio_pci_igd.c index 53d97f459252..78919a289914
> > > 100644
> > > --- a/drivers/vfio/pci/vfio_pci_igd.c
> > > +++ b/drivers/vfio/pci/vfio_pci_igd.c
> > > @@ -21,6 +21,17 @@
> > > #define OPREGION_SIZE (8 * 1024)
> > > #define OPREGION_PCI_ADDR 0xfc
> > >
> > > +/*
> > > + * opregion 2.0: rvda is the physical VBT address.
> >
> > What's rvda? What's VBT?
> Rvda is a struct member in opregion mailbox 3 ,
> same definition in i915's struct opregion_asle.
> I,e Physical address of raw VBT data (v2.0) or
> Relative address from opregion (v2.1).
>
> VBT: video bios table ,
> the data is stored in opregion mailbox 4 before opregion v2.0.
> After opregion v2.0+ , VBT data is larger than mailbox 4,
> so Extended VBT region, next to opregion is used to hold the data.
Are these published anywhere? I can only find revision 1.0 available.
> > > + *
> > > + * opregion 2.1+: rvda is unsigned, relative offset from
> > > + * opregion base, and should never point within opregion.
> > > + */
> > > +#define OPREGION_RDVA 0x3ba
> > > +#define OPREGION_RDVS 0x3c2
> > > +#define OPREGION_VERSION 22
> >
> > Why is this specified as decimal and the others in hex? This makes it seem
> > like the actual version rather than the offset of a version register.
>
> Yes, it is an offset, will redefine the opregion version offset in hex.
> > > +
> > > +
> > > static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user
> > *buf,
> > > size_t count, loff_t *ppos, bool iswrite) { @@ -
> > 58,6 +69,7
> > > @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> > > u32 addr, size;
> > > void *base;
> > > int ret;
> > > + u16 version;
> > >
> > > ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR,
> > &addr);
> > > if (ret)
> > > @@ -83,6 +95,38 @@ static int vfio_pci_igd_opregion_init(struct
> > > vfio_pci_device *vdev)
> > >
> > > size *= 1024; /* In KB */
> > >
> > > + /* Support opregion v2.0+ */
> > > + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> > > + if (version >= 0x0200) {
> > > + u64 rvda;
> > > + u32 rvds;
> > > +
> > > + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RDVA));
> > > + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RDVS));
> > > + if (rvda && rvds) {
> > > + u32 offset;
> > > +
> > > + if (version == 0x0200)
> > > + offset = (rvda - (u64)addr);
> >
> > Unnecessary outer ()
> Thx, will remove in new patch.
> > > + else
> > > + offset = rvda;
> > > +
> > > + pci_WARN(vdev->pdev, offset != size,
> > > + "Extended VBT does not follow opregion !\n"
> > > + "opregion version 0x%x:offset 0x%x\n",
> > version, offset);
> > > +
> > > + if (version == 0x0200) {
> > > + /* opregion version v2.0 faked to v2.1 */
> > > + *(__le16 *)(base + OPREGION_VERSION) =
> > > + cpu_to_le16(0x0201);
> > > + /* rvda faked to relative offset */
> > > + (*(__le64 *)(base + OPREGION_RDVA)) =
> > > + cpu_to_le64((rvda - (u64)addr));
> >
> > We're writing to the OpRegion and affecting all future use of it, seems
> > dangerous.
>
> from the opregion v2.0+ specification
> since there is only RVDA difference between opregion v2.0 and v2.1 besides the version
> It is the simplest solution and should not impact the future use.
*Should* not, but I'm not so confident without a spec to reference.
> > > + }
> > > + size = offset + rvds;
> >
> >
> > We warn about VBT (whatever that is) not immediately following the
> > OpRegion, but then we go ahead and size the thing that we expose to
> > userspace to allow read access to everything between the OpRegion and
> > VBT??
> From the specification , there should no hole between opregion and VBT.
> But I am not sure if some vendor BIOS will make the hole.
> Can we return the error if this abnormal thing happens ?
It seems rather dangerous to allow a user to have read access to an
unknown extent of unknown data... right? Thanks,
Alex
> > > + }
> > > + }
> > > +
> > > if (size != OPREGION_SIZE) {
> > > memunmap(base);
> > > base = memremap(addr, size, MEMREMAP_WB);
>
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] [PATCH v1] vfio/pci: Add support for opregion v2.0+
@ 2020-12-03 23:38 ` Alex Williamson
0 siblings, 0 replies; 48+ messages in thread
From: Alex Williamson @ 2020-12-03 23:38 UTC (permalink / raw)
To: Gao, Fred; +Cc: Fonn, Swee Yee, intel-gfx, kvm
On Thu, 3 Dec 2020 09:21:03 +0000
"Gao, Fred" <fred.gao@intel.com> wrote:
> Thanks Alex for the timely review.
>
> > -----Original Message-----
> > From: Alex Williamson <alex.williamson@redhat.com>
> > Sent: Thursday, December 3, 2020 2:57 AM
> > To: Gao, Fred <fred.gao@intel.com>
> > Cc: kvm@vger.kernel.org; intel-gfx@lists.freedesktop.org; Zhenyu Wang
> > <zhenyuw@linux.intel.com>; Fonn, Swee Yee <swee.yee.fonn@intel.com>
> > Subject: Re: [PATCH v1] vfio/pci: Add support for opregion v2.0+
> >
> > On Thu, 3 Dec 2020 01:12:49 +0800
> > Fred Gao <fred.gao@intel.com> wrote:
> >
> > > When VBT data exceeds 6KB size and cannot be within mailbox #4
> > > starting from opregion v2.0+, Extended VBT region, next to opregion,
> > > is used to hold the VBT data, so the total size will be opregion size
> > > plus extended VBT region size.
> > >
> > > For opregion 2.1+: since rvda is relative offset from opregion base,
> > > rvda as extended VBT start offset should be same as opregion size.
> > >
> > > For opregion 2.0: the only difference between opregion 2.0 and 2.1 is
> > > rvda addressing mode besides the version. since rvda is physical host
> > > VBT address and cannot be directly used in guest, it is faked into
> > > opregion 2.1's relative offset.
> > >
> > > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > > Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> > > Signed-off-by: Fred Gao <fred.gao@intel.com>
> > > ---
> > > drivers/vfio/pci/vfio_pci_igd.c | 44
> > > +++++++++++++++++++++++++++++++++
> > > 1 file changed, 44 insertions(+)
> > >
> > > diff --git a/drivers/vfio/pci/vfio_pci_igd.c
> > > b/drivers/vfio/pci/vfio_pci_igd.c index 53d97f459252..78919a289914
> > > 100644
> > > --- a/drivers/vfio/pci/vfio_pci_igd.c
> > > +++ b/drivers/vfio/pci/vfio_pci_igd.c
> > > @@ -21,6 +21,17 @@
> > > #define OPREGION_SIZE (8 * 1024)
> > > #define OPREGION_PCI_ADDR 0xfc
> > >
> > > +/*
> > > + * opregion 2.0: rvda is the physical VBT address.
> >
> > What's rvda? What's VBT?
> Rvda is a struct member in opregion mailbox 3 ,
> same definition in i915's struct opregion_asle.
> I,e Physical address of raw VBT data (v2.0) or
> Relative address from opregion (v2.1).
>
> VBT: video bios table ,
> the data is stored in opregion mailbox 4 before opregion v2.0.
> After opregion v2.0+ , VBT data is larger than mailbox 4,
> so Extended VBT region, next to opregion is used to hold the data.
Are these published anywhere? I can only find revision 1.0 available.
> > > + *
> > > + * opregion 2.1+: rvda is unsigned, relative offset from
> > > + * opregion base, and should never point within opregion.
> > > + */
> > > +#define OPREGION_RDVA 0x3ba
> > > +#define OPREGION_RDVS 0x3c2
> > > +#define OPREGION_VERSION 22
> >
> > Why is this specified as decimal and the others in hex? This makes it seem
> > like the actual version rather than the offset of a version register.
>
> Yes, it is an offset, will redefine the opregion version offset in hex.
> > > +
> > > +
> > > static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user
> > *buf,
> > > size_t count, loff_t *ppos, bool iswrite) { @@ -
> > 58,6 +69,7
> > > @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> > > u32 addr, size;
> > > void *base;
> > > int ret;
> > > + u16 version;
> > >
> > > ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR,
> > &addr);
> > > if (ret)
> > > @@ -83,6 +95,38 @@ static int vfio_pci_igd_opregion_init(struct
> > > vfio_pci_device *vdev)
> > >
> > > size *= 1024; /* In KB */
> > >
> > > + /* Support opregion v2.0+ */
> > > + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> > > + if (version >= 0x0200) {
> > > + u64 rvda;
> > > + u32 rvds;
> > > +
> > > + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RDVA));
> > > + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RDVS));
> > > + if (rvda && rvds) {
> > > + u32 offset;
> > > +
> > > + if (version == 0x0200)
> > > + offset = (rvda - (u64)addr);
> >
> > Unnecessary outer ()
> Thx, will remove in new patch.
> > > + else
> > > + offset = rvda;
> > > +
> > > + pci_WARN(vdev->pdev, offset != size,
> > > + "Extended VBT does not follow opregion !\n"
> > > + "opregion version 0x%x:offset 0x%x\n",
> > version, offset);
> > > +
> > > + if (version == 0x0200) {
> > > + /* opregion version v2.0 faked to v2.1 */
> > > + *(__le16 *)(base + OPREGION_VERSION) =
> > > + cpu_to_le16(0x0201);
> > > + /* rvda faked to relative offset */
> > > + (*(__le64 *)(base + OPREGION_RDVA)) =
> > > + cpu_to_le64((rvda - (u64)addr));
> >
> > We're writing to the OpRegion and affecting all future use of it, seems
> > dangerous.
>
> from the opregion v2.0+ specification
> since there is only RVDA difference between opregion v2.0 and v2.1 besides the version
> It is the simplest solution and should not impact the future use.
*Should* not, but I'm not so confident without a spec to reference.
> > > + }
> > > + size = offset + rvds;
> >
> >
> > We warn about VBT (whatever that is) not immediately following the
> > OpRegion, but then we go ahead and size the thing that we expose to
> > userspace to allow read access to everything between the OpRegion and
> > VBT??
> From the specification , there should no hole between opregion and VBT.
> But I am not sure if some vendor BIOS will make the hole.
> Can we return the error if this abnormal thing happens ?
It seems rather dangerous to allow a user to have read access to an
unknown extent of unknown data... right? Thanks,
Alex
> > > + }
> > > + }
> > > +
> > > if (size != OPREGION_SIZE) {
> > > memunmap(base);
> > > base = memremap(addr, size, MEMREMAP_WB);
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for vfio/pci: Add support for opregion v2.0+ (rev2)
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
` (4 preceding siblings ...)
(?)
@ 2021-01-18 5:15 ` Patchwork
-1 siblings, 0 replies; 48+ messages in thread
From: Patchwork @ 2021-01-18 5:15 UTC (permalink / raw)
To: Fred Gao; +Cc: intel-gfx
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+ (rev2)
URL : https://patchwork.freedesktop.org/series/84494/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4261de669e0b vfio/pci: Add support for opregion v2.0+
-:74: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#74: FILE: drivers/vfio/pci/vfio_pci_igd.c:122:
+ pci_err(vdev->pdev,
+ "Extended VBT does not follow opregion !\n"
total: 0 errors, 0 warnings, 1 checks, 77 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for vfio/pci: Add support for opregion v2.0+ (rev2)
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
` (5 preceding siblings ...)
(?)
@ 2021-01-18 5:46 ` Patchwork
-1 siblings, 0 replies; 48+ messages in thread
From: Patchwork @ 2021-01-18 5:46 UTC (permalink / raw)
To: Fred Gao; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 8673 bytes --]
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+ (rev2)
URL : https://patchwork.freedesktop.org/series/84494/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9629 -> Patchwork_19386
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_19386 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19386, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19386:
### IGT changes ###
#### Possible regressions ####
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9629/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
Known issues
------------
Here are the changes found in Patchwork_19386 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-gfx:
- fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271]) +17 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-kbl-soraka/igt@amdgpu/amd_basic@cs-gfx.html
* igt@amdgpu/amd_basic@memory-alloc:
- fi-cml-u2: NOTRUN -> [SKIP][4] ([fdo#109315]) +17 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-cml-u2/igt@amdgpu/amd_basic@memory-alloc.html
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-cml-u2: NOTRUN -> [SKIP][5] ([i915#1208]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-cml-u2/igt@gem_exec_fence@basic-busy@bcs0.html
* igt@gem_huc_copy@huc-copy:
- fi-cml-u2: NOTRUN -> [SKIP][6] ([i915#2190])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-cml-u2/igt@gem_huc_copy@huc-copy.html
* igt@gem_render_tiled_blits@basic:
- fi-tgl-y: [PASS][7] -> [DMESG-WARN][8] ([i915#402])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9629/fi-tgl-y/igt@gem_render_tiled_blits@basic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-tgl-y/igt@gem_render_tiled_blits@basic.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-snb-2600: NOTRUN -> [SKIP][9] ([fdo#109271]) +30 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-snb-2600/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_chamelium@hdmi-crc-fast:
- fi-snb-2600: NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827]) +8 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-snb-2600/igt@kms_chamelium@hdmi-crc-fast.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-cml-u2: NOTRUN -> [SKIP][11] ([i915#1004]) +2 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-cml-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_chamelium@vga-edid-read:
- fi-cml-u2: NOTRUN -> [SKIP][12] ([fdo#109309]) +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-cml-u2/igt@kms_chamelium@vga-edid-read.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-cml-u2: NOTRUN -> [SKIP][13] ([fdo#109285])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-cml-u2/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-cml-u2: NOTRUN -> [SKIP][14] ([fdo#109278] / [i915#533])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-cml-u2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@runner@aborted:
- fi-skl-6700k2: NOTRUN -> [FAIL][15] ([i915#1814] / [i915#2873])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-skl-6700k2/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0:
- fi-snb-2600: [DMESG-WARN][16] ([i915#2772]) -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9629/fi-snb-2600/igt@gem_exec_suspend@basic-s0.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-snb-2600/igt@gem_exec_suspend@basic-s0.html
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-y: [DMESG-WARN][18] ([i915#2411] / [i915#402]) -> [PASS][19]
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9629/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html
* igt@gem_flink_basic@bad-flink:
- fi-tgl-y: [DMESG-WARN][20] ([i915#402]) -> [PASS][21]
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9629/fi-tgl-y/igt@gem_flink_basic@bad-flink.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-tgl-y/igt@gem_flink_basic@bad-flink.html
* igt@i915_selftest@live@active:
- fi-bsw-n3050: [DMESG-FAIL][22] ([i915#2675] / [i915#541]) -> [PASS][23]
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9629/fi-bsw-n3050/igt@i915_selftest@live@active.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-bsw-n3050/igt@i915_selftest@live@active.html
* igt@i915_selftest@live@execlists:
- fi-kbl-soraka: [INCOMPLETE][24] ([i915#1037] / [i915#794]) -> [PASS][25]
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9629/fi-kbl-soraka/igt@i915_selftest@live@execlists.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-kbl-soraka/igt@i915_selftest@live@execlists.html
#### Warnings ####
* igt@debugfs_test@read_all_entries:
- fi-tgl-y: [DMESG-WARN][26] ([i915#1982] / [i915#402]) -> [DMESG-WARN][27] ([i915#402])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9629/fi-tgl-y/igt@debugfs_test@read_all_entries.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/fi-tgl-y/igt@debugfs_test@read_all_entries.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1004]: https://gitlab.freedesktop.org/drm/intel/issues/1004
[i915#1037]: https://gitlab.freedesktop.org/drm/intel/issues/1037
[i915#1208]: https://gitlab.freedesktop.org/drm/intel/issues/1208
[i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2675]: https://gitlab.freedesktop.org/drm/intel/issues/2675
[i915#2772]: https://gitlab.freedesktop.org/drm/intel/issues/2772
[i915#2873]: https://gitlab.freedesktop.org/drm/intel/issues/2873
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
[i915#794]: https://gitlab.freedesktop.org/drm/intel/issues/794
Participating hosts (39 -> 38)
------------------------------
Additional (2): fi-cml-u2 fi-skl-6700k2
Missing (3): fi-bsw-cyan fi-bdw-samus fi-hsw-4200u
Build changes
-------------
* Linux: CI_DRM_9629 -> Patchwork_19386
CI-20190529: 20190529
CI_DRM_9629: 4cb18d3b417428a4e3834bf93f5de18b57984570 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5960: ace82fcd5f3623f8dde7c220a825873dc53dfae4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19386: 4261de669e0b400a84408990e6fd08cc77a19e08 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
4261de669e0b vfio/pci: Add support for opregion v2.0+
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19386/index.html
[-- Attachment #1.2: Type: text/html, Size: 10156 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH v2] vfio/pci: Add support for opregion v2.0+
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
@ 2021-01-18 12:38 ` Fred Gao
-1 siblings, 0 replies; 48+ messages in thread
From: Fred Gao @ 2021-01-18 12:38 UTC (permalink / raw)
To: kvm, intel-gfx; +Cc: Fred Gao, Zhenyu Wang, Swee Yee Fonn
Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
However, When VBT data exceeds 6KB size and cannot be within mailbox #4
starting from opregion v2.0+, Extended VBT region, next to opregion, is
used to hold the VBT data, so the total size will be opregion size plus
extended VBT region size.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
Signed-off-by: Fred Gao <fred.gao@intel.com>
---
drivers/vfio/pci/vfio_pci_igd.c | 59 +++++++++++++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
index 53d97f459252..fc470278a492 100644
--- a/drivers/vfio/pci/vfio_pci_igd.c
+++ b/drivers/vfio/pci/vfio_pci_igd.c
@@ -21,6 +21,10 @@
#define OPREGION_SIZE (8 * 1024)
#define OPREGION_PCI_ADDR 0xfc
+#define OPREGION_RVDA 0x3ba
+#define OPREGION_RVDS 0x3c2
+#define OPREGION_VERSION 0x16
+
static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
size_t count, loff_t *ppos, bool iswrite)
{
@@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
u32 addr, size;
void *base;
int ret;
+ u16 version;
ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
if (ret)
@@ -83,6 +88,60 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
size *= 1024; /* In KB */
+ /*
+ * Support opregion v2.0+
+ * When VBT data exceeds 6KB size and cannot be within mailbox #4
+ * Extended VBT region, next to opregion, is used to hold the VBT data.
+ * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
+ * (VBT Data Size) from opregion structure member are used to hold the
+ * address from region base and size of VBT data while RVDA/RVDS
+ * are not defined before opregion 2.0.
+ *
+ * opregion 2.0: rvda is the physical VBT address.
+ *
+ * opregion 2.1+: rvda is unsigned, relative offset from
+ * opregion base, and should never point within opregion.
+ */
+ version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
+ if (version >= 0x0200) {
+ u64 rvda;
+ u32 rvds;
+
+ rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
+ rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
+ if (rvda && rvds) {
+ u32 offset;
+
+ if (version == 0x0200)
+ offset = rvda - (u64)addr;
+ else
+ offset = rvda;
+
+ if (offset != size) {
+ pci_err(vdev->pdev,
+ "Extended VBT does not follow opregion !\n"
+ "opregion version 0x%x:offset 0x%x\n", version, offset);
+ return -EINVAL;
+ }
+
+ /*
+ * the only difference between opregion 2.0 and 2.1 is
+ * rvda addressing mode. since rvda is physical host
+ * VBT address and cannot be directly used in guest,
+ * faked into opregion 2.1's relative offset.
+ */
+ if (version == 0x0200) {
+ *(__le16 *)(base + OPREGION_VERSION) =
+ cpu_to_le16(0x0201);
+ (*(__le64 *)(base + OPREGION_RVDA)) =
+ cpu_to_le64((rvda - (u64)addr));
+ }
+
+ /* region size for opregion v2.0+: opregion and VBT size */
+ size = offset + rvds;
+ }
+ }
+
if (size != OPREGION_SIZE) {
memunmap(base);
base = memremap(addr, size, MEMREMAP_WB);
--
2.24.1.1.gb6d4d82bd5
^ permalink raw reply related [flat|nested] 48+ messages in thread
* [Intel-gfx] [PATCH v2] vfio/pci: Add support for opregion v2.0+
@ 2021-01-18 12:38 ` Fred Gao
0 siblings, 0 replies; 48+ messages in thread
From: Fred Gao @ 2021-01-18 12:38 UTC (permalink / raw)
To: kvm, intel-gfx; +Cc: Fred Gao, Swee Yee Fonn
Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
However, When VBT data exceeds 6KB size and cannot be within mailbox #4
starting from opregion v2.0+, Extended VBT region, next to opregion, is
used to hold the VBT data, so the total size will be opregion size plus
extended VBT region size.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
Signed-off-by: Fred Gao <fred.gao@intel.com>
---
drivers/vfio/pci/vfio_pci_igd.c | 59 +++++++++++++++++++++++++++++++++
1 file changed, 59 insertions(+)
diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
index 53d97f459252..fc470278a492 100644
--- a/drivers/vfio/pci/vfio_pci_igd.c
+++ b/drivers/vfio/pci/vfio_pci_igd.c
@@ -21,6 +21,10 @@
#define OPREGION_SIZE (8 * 1024)
#define OPREGION_PCI_ADDR 0xfc
+#define OPREGION_RVDA 0x3ba
+#define OPREGION_RVDS 0x3c2
+#define OPREGION_VERSION 0x16
+
static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
size_t count, loff_t *ppos, bool iswrite)
{
@@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
u32 addr, size;
void *base;
int ret;
+ u16 version;
ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
if (ret)
@@ -83,6 +88,60 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
size *= 1024; /* In KB */
+ /*
+ * Support opregion v2.0+
+ * When VBT data exceeds 6KB size and cannot be within mailbox #4
+ * Extended VBT region, next to opregion, is used to hold the VBT data.
+ * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
+ * (VBT Data Size) from opregion structure member are used to hold the
+ * address from region base and size of VBT data while RVDA/RVDS
+ * are not defined before opregion 2.0.
+ *
+ * opregion 2.0: rvda is the physical VBT address.
+ *
+ * opregion 2.1+: rvda is unsigned, relative offset from
+ * opregion base, and should never point within opregion.
+ */
+ version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
+ if (version >= 0x0200) {
+ u64 rvda;
+ u32 rvds;
+
+ rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
+ rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
+ if (rvda && rvds) {
+ u32 offset;
+
+ if (version == 0x0200)
+ offset = rvda - (u64)addr;
+ else
+ offset = rvda;
+
+ if (offset != size) {
+ pci_err(vdev->pdev,
+ "Extended VBT does not follow opregion !\n"
+ "opregion version 0x%x:offset 0x%x\n", version, offset);
+ return -EINVAL;
+ }
+
+ /*
+ * the only difference between opregion 2.0 and 2.1 is
+ * rvda addressing mode. since rvda is physical host
+ * VBT address and cannot be directly used in guest,
+ * faked into opregion 2.1's relative offset.
+ */
+ if (version == 0x0200) {
+ *(__le16 *)(base + OPREGION_VERSION) =
+ cpu_to_le16(0x0201);
+ (*(__le64 *)(base + OPREGION_RVDA)) =
+ cpu_to_le64((rvda - (u64)addr));
+ }
+
+ /* region size for opregion v2.0+: opregion and VBT size */
+ size = offset + rvds;
+ }
+ }
+
if (size != OPREGION_SIZE) {
memunmap(base);
base = memremap(addr, size, MEMREMAP_WB);
--
2.24.1.1.gb6d4d82bd5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread
* Re: [PATCH v2] vfio/pci: Add support for opregion v2.0+
2021-01-18 12:38 ` [Intel-gfx] " Fred Gao
@ 2021-01-21 20:33 ` Alex Williamson
-1 siblings, 0 replies; 48+ messages in thread
From: Alex Williamson @ 2021-01-21 20:33 UTC (permalink / raw)
To: Fred Gao; +Cc: kvm, intel-gfx, Zhenyu Wang, Swee Yee Fonn
On Mon, 18 Jan 2021 20:38:34 +0800
Fred Gao <fred.gao@intel.com> wrote:
> Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
> However, When VBT data exceeds 6KB size and cannot be within mailbox #4
> starting from opregion v2.0+, Extended VBT region, next to opregion, is
> used to hold the VBT data, so the total size will be opregion size plus
> extended VBT region size.
>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> Signed-off-by: Fred Gao <fred.gao@intel.com>
> ---
> drivers/vfio/pci/vfio_pci_igd.c | 59 +++++++++++++++++++++++++++++++++
> 1 file changed, 59 insertions(+)
>
> diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
> index 53d97f459252..fc470278a492 100644
> --- a/drivers/vfio/pci/vfio_pci_igd.c
> +++ b/drivers/vfio/pci/vfio_pci_igd.c
> @@ -21,6 +21,10 @@
> #define OPREGION_SIZE (8 * 1024)
> #define OPREGION_PCI_ADDR 0xfc
>
> +#define OPREGION_RVDA 0x3ba
> +#define OPREGION_RVDS 0x3c2
> +#define OPREGION_VERSION 0x16
> +
> static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
> size_t count, loff_t *ppos, bool iswrite)
> {
> @@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> u32 addr, size;
> void *base;
> int ret;
> + u16 version;
>
> ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
> if (ret)
> @@ -83,6 +88,60 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
>
> size *= 1024; /* In KB */
>
> + /*
> + * Support opregion v2.0+
> + * When VBT data exceeds 6KB size and cannot be within mailbox #4
> + * Extended VBT region, next to opregion, is used to hold the VBT data.
> + * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
> + * (VBT Data Size) from opregion structure member are used to hold the
> + * address from region base and size of VBT data while RVDA/RVDS
> + * are not defined before opregion 2.0.
> + *
> + * opregion 2.0: rvda is the physical VBT address.
> + *
> + * opregion 2.1+: rvda is unsigned, relative offset from
> + * opregion base, and should never point within opregion.
> + */
> + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> + if (version >= 0x0200) {
> + u64 rvda;
> + u32 rvds;
> +
> + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
> + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
> + if (rvda && rvds) {
> + u32 offset;
> +
> + if (version == 0x0200)
> + offset = rvda - (u64)addr;
> + else
> + offset = rvda;
> +
> + if (offset != size) {
> + pci_err(vdev->pdev,
> + "Extended VBT does not follow opregion !\n"
> + "opregion version 0x%x:offset 0x%x\n", version, offset);
> + return -EINVAL;
> + }
> +
> + /*
> + * the only difference between opregion 2.0 and 2.1 is
> + * rvda addressing mode. since rvda is physical host
> + * VBT address and cannot be directly used in guest,
> + * faked into opregion 2.1's relative offset.
> + */
> + if (version == 0x0200) {
> + *(__le16 *)(base + OPREGION_VERSION) =
> + cpu_to_le16(0x0201);
> + (*(__le64 *)(base + OPREGION_RVDA)) =
> + cpu_to_le64((rvda - (u64)addr));
> + }
There's a much better description of the fields and logic here, thanks
for that. I also see we've closed the gap to require the extended
region to immediately follow the opregion table. The code
immediately above still makes me nervous as even if this is the only
difference between the specs, code might make some differentiation
based on the spec version, which we're changing in host memory for all
subsequent drivers until the host is rebooted. Could we use a pci_dbg()
in this branch to flag that event in dmesg for debugging? Thanks,
Alex
> +
> + /* region size for opregion v2.0+: opregion and VBT size */
> + size = offset + rvds;
> + }
> + }
> +
> if (size != OPREGION_SIZE) {
> memunmap(base);
> base = memremap(addr, size, MEMREMAP_WB);
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] [PATCH v2] vfio/pci: Add support for opregion v2.0+
@ 2021-01-21 20:33 ` Alex Williamson
0 siblings, 0 replies; 48+ messages in thread
From: Alex Williamson @ 2021-01-21 20:33 UTC (permalink / raw)
To: Fred Gao; +Cc: Swee Yee Fonn, intel-gfx, kvm
On Mon, 18 Jan 2021 20:38:34 +0800
Fred Gao <fred.gao@intel.com> wrote:
> Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
> However, When VBT data exceeds 6KB size and cannot be within mailbox #4
> starting from opregion v2.0+, Extended VBT region, next to opregion, is
> used to hold the VBT data, so the total size will be opregion size plus
> extended VBT region size.
>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> Signed-off-by: Fred Gao <fred.gao@intel.com>
> ---
> drivers/vfio/pci/vfio_pci_igd.c | 59 +++++++++++++++++++++++++++++++++
> 1 file changed, 59 insertions(+)
>
> diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
> index 53d97f459252..fc470278a492 100644
> --- a/drivers/vfio/pci/vfio_pci_igd.c
> +++ b/drivers/vfio/pci/vfio_pci_igd.c
> @@ -21,6 +21,10 @@
> #define OPREGION_SIZE (8 * 1024)
> #define OPREGION_PCI_ADDR 0xfc
>
> +#define OPREGION_RVDA 0x3ba
> +#define OPREGION_RVDS 0x3c2
> +#define OPREGION_VERSION 0x16
> +
> static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
> size_t count, loff_t *ppos, bool iswrite)
> {
> @@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> u32 addr, size;
> void *base;
> int ret;
> + u16 version;
>
> ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
> if (ret)
> @@ -83,6 +88,60 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
>
> size *= 1024; /* In KB */
>
> + /*
> + * Support opregion v2.0+
> + * When VBT data exceeds 6KB size and cannot be within mailbox #4
> + * Extended VBT region, next to opregion, is used to hold the VBT data.
> + * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
> + * (VBT Data Size) from opregion structure member are used to hold the
> + * address from region base and size of VBT data while RVDA/RVDS
> + * are not defined before opregion 2.0.
> + *
> + * opregion 2.0: rvda is the physical VBT address.
> + *
> + * opregion 2.1+: rvda is unsigned, relative offset from
> + * opregion base, and should never point within opregion.
> + */
> + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> + if (version >= 0x0200) {
> + u64 rvda;
> + u32 rvds;
> +
> + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
> + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
> + if (rvda && rvds) {
> + u32 offset;
> +
> + if (version == 0x0200)
> + offset = rvda - (u64)addr;
> + else
> + offset = rvda;
> +
> + if (offset != size) {
> + pci_err(vdev->pdev,
> + "Extended VBT does not follow opregion !\n"
> + "opregion version 0x%x:offset 0x%x\n", version, offset);
> + return -EINVAL;
> + }
> +
> + /*
> + * the only difference between opregion 2.0 and 2.1 is
> + * rvda addressing mode. since rvda is physical host
> + * VBT address and cannot be directly used in guest,
> + * faked into opregion 2.1's relative offset.
> + */
> + if (version == 0x0200) {
> + *(__le16 *)(base + OPREGION_VERSION) =
> + cpu_to_le16(0x0201);
> + (*(__le64 *)(base + OPREGION_RVDA)) =
> + cpu_to_le64((rvda - (u64)addr));
> + }
There's a much better description of the fields and logic here, thanks
for that. I also see we've closed the gap to require the extended
region to immediately follow the opregion table. The code
immediately above still makes me nervous as even if this is the only
difference between the specs, code might make some differentiation
based on the spec version, which we're changing in host memory for all
subsequent drivers until the host is rebooted. Could we use a pci_dbg()
in this branch to flag that event in dmesg for debugging? Thanks,
Alex
> +
> + /* region size for opregion v2.0+: opregion and VBT size */
> + size = offset + rvds;
> + }
> + }
> +
> if (size != OPREGION_SIZE) {
> memunmap(base);
> base = memremap(addr, size, MEMREMAP_WB);
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [PATCH v2] vfio/pci: Add support for opregion v2.0+
2021-01-21 20:33 ` [Intel-gfx] " Alex Williamson
@ 2021-02-02 5:09 ` Zhenyu Wang
-1 siblings, 0 replies; 48+ messages in thread
From: Zhenyu Wang @ 2021-02-02 5:09 UTC (permalink / raw)
To: Alex Williamson; +Cc: Fred Gao, kvm, intel-gfx, Swee Yee Fonn
[-- Attachment #1: Type: text/plain, Size: 4739 bytes --]
On 2021.01.21 13:33:18 -0700, Alex Williamson wrote:
> On Mon, 18 Jan 2021 20:38:34 +0800
> Fred Gao <fred.gao@intel.com> wrote:
>
> > Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
> > However, When VBT data exceeds 6KB size and cannot be within mailbox #4
> > starting from opregion v2.0+, Extended VBT region, next to opregion, is
> > used to hold the VBT data, so the total size will be opregion size plus
> > extended VBT region size.
> >
> > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> > Signed-off-by: Fred Gao <fred.gao@intel.com>
> > ---
> > drivers/vfio/pci/vfio_pci_igd.c | 59 +++++++++++++++++++++++++++++++++
> > 1 file changed, 59 insertions(+)
> >
> > diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
> > index 53d97f459252..fc470278a492 100644
> > --- a/drivers/vfio/pci/vfio_pci_igd.c
> > +++ b/drivers/vfio/pci/vfio_pci_igd.c
> > @@ -21,6 +21,10 @@
> > #define OPREGION_SIZE (8 * 1024)
> > #define OPREGION_PCI_ADDR 0xfc
> >
> > +#define OPREGION_RVDA 0x3ba
> > +#define OPREGION_RVDS 0x3c2
> > +#define OPREGION_VERSION 0x16
> > +
> > static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
> > size_t count, loff_t *ppos, bool iswrite)
> > {
> > @@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> > u32 addr, size;
> > void *base;
> > int ret;
> > + u16 version;
> >
> > ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
> > if (ret)
> > @@ -83,6 +88,60 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> >
> > size *= 1024; /* In KB */
> >
> > + /*
> > + * Support opregion v2.0+
> > + * When VBT data exceeds 6KB size and cannot be within mailbox #4
> > + * Extended VBT region, next to opregion, is used to hold the VBT data.
> > + * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
> > + * (VBT Data Size) from opregion structure member are used to hold the
> > + * address from region base and size of VBT data while RVDA/RVDS
> > + * are not defined before opregion 2.0.
> > + *
> > + * opregion 2.0: rvda is the physical VBT address.
> > + *
> > + * opregion 2.1+: rvda is unsigned, relative offset from
> > + * opregion base, and should never point within opregion.
> > + */
> > + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> > + if (version >= 0x0200) {
> > + u64 rvda;
> > + u32 rvds;
> > +
> > + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
> > + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
> > + if (rvda && rvds) {
> > + u32 offset;
> > +
> > + if (version == 0x0200)
> > + offset = rvda - (u64)addr;
> > + else
> > + offset = rvda;
> > +
> > + if (offset != size) {
> > + pci_err(vdev->pdev,
> > + "Extended VBT does not follow opregion !\n"
> > + "opregion version 0x%x:offset 0x%x\n", version, offset);
> > + return -EINVAL;
> > + }
> > +
> > + /*
> > + * the only difference between opregion 2.0 and 2.1 is
> > + * rvda addressing mode. since rvda is physical host
> > + * VBT address and cannot be directly used in guest,
> > + * faked into opregion 2.1's relative offset.
> > + */
> > + if (version == 0x0200) {
> > + *(__le16 *)(base + OPREGION_VERSION) =
> > + cpu_to_le16(0x0201);
> > + (*(__le64 *)(base + OPREGION_RVDA)) =
> > + cpu_to_le64((rvda - (u64)addr));
> > + }
>
> There's a much better description of the fields and logic here, thanks
> for that. I also see we've closed the gap to require the extended
> region to immediately follow the opregion table. The code
> immediately above still makes me nervous as even if this is the only
> difference between the specs, code might make some differentiation
> based on the spec version, which we're changing in host memory for all
> subsequent drivers until the host is rebooted. Could we use a pci_dbg()
> in this branch to flag that event in dmesg for debugging? Thanks,
>
Alex, that's really valid concern, even we thought it should be no problem,
we asked firmware team again, it looks for opregion 2.0 with VBT >6k case (RVDA != 0)
is not practically available for end user. So I think we may just not support
for that. For opregion 2.1+, just extend the size properly.
Thanks
>
> > +
> > + /* region size for opregion v2.0+: opregion and VBT size */
> > + size = offset + rvds;
> > + }
> > + }
> > +
> > if (size != OPREGION_SIZE) {
> > memunmap(base);
> > base = memremap(addr, size, MEMREMAP_WB);
>
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^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] [PATCH v2] vfio/pci: Add support for opregion v2.0+
@ 2021-02-02 5:09 ` Zhenyu Wang
0 siblings, 0 replies; 48+ messages in thread
From: Zhenyu Wang @ 2021-02-02 5:09 UTC (permalink / raw)
To: Alex Williamson; +Cc: Fred Gao, intel-gfx, Swee Yee Fonn, kvm
[-- Attachment #1.1: Type: text/plain, Size: 4739 bytes --]
On 2021.01.21 13:33:18 -0700, Alex Williamson wrote:
> On Mon, 18 Jan 2021 20:38:34 +0800
> Fred Gao <fred.gao@intel.com> wrote:
>
> > Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
> > However, When VBT data exceeds 6KB size and cannot be within mailbox #4
> > starting from opregion v2.0+, Extended VBT region, next to opregion, is
> > used to hold the VBT data, so the total size will be opregion size plus
> > extended VBT region size.
> >
> > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> > Signed-off-by: Fred Gao <fred.gao@intel.com>
> > ---
> > drivers/vfio/pci/vfio_pci_igd.c | 59 +++++++++++++++++++++++++++++++++
> > 1 file changed, 59 insertions(+)
> >
> > diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
> > index 53d97f459252..fc470278a492 100644
> > --- a/drivers/vfio/pci/vfio_pci_igd.c
> > +++ b/drivers/vfio/pci/vfio_pci_igd.c
> > @@ -21,6 +21,10 @@
> > #define OPREGION_SIZE (8 * 1024)
> > #define OPREGION_PCI_ADDR 0xfc
> >
> > +#define OPREGION_RVDA 0x3ba
> > +#define OPREGION_RVDS 0x3c2
> > +#define OPREGION_VERSION 0x16
> > +
> > static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
> > size_t count, loff_t *ppos, bool iswrite)
> > {
> > @@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> > u32 addr, size;
> > void *base;
> > int ret;
> > + u16 version;
> >
> > ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
> > if (ret)
> > @@ -83,6 +88,60 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> >
> > size *= 1024; /* In KB */
> >
> > + /*
> > + * Support opregion v2.0+
> > + * When VBT data exceeds 6KB size and cannot be within mailbox #4
> > + * Extended VBT region, next to opregion, is used to hold the VBT data.
> > + * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
> > + * (VBT Data Size) from opregion structure member are used to hold the
> > + * address from region base and size of VBT data while RVDA/RVDS
> > + * are not defined before opregion 2.0.
> > + *
> > + * opregion 2.0: rvda is the physical VBT address.
> > + *
> > + * opregion 2.1+: rvda is unsigned, relative offset from
> > + * opregion base, and should never point within opregion.
> > + */
> > + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> > + if (version >= 0x0200) {
> > + u64 rvda;
> > + u32 rvds;
> > +
> > + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
> > + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
> > + if (rvda && rvds) {
> > + u32 offset;
> > +
> > + if (version == 0x0200)
> > + offset = rvda - (u64)addr;
> > + else
> > + offset = rvda;
> > +
> > + if (offset != size) {
> > + pci_err(vdev->pdev,
> > + "Extended VBT does not follow opregion !\n"
> > + "opregion version 0x%x:offset 0x%x\n", version, offset);
> > + return -EINVAL;
> > + }
> > +
> > + /*
> > + * the only difference between opregion 2.0 and 2.1 is
> > + * rvda addressing mode. since rvda is physical host
> > + * VBT address and cannot be directly used in guest,
> > + * faked into opregion 2.1's relative offset.
> > + */
> > + if (version == 0x0200) {
> > + *(__le16 *)(base + OPREGION_VERSION) =
> > + cpu_to_le16(0x0201);
> > + (*(__le64 *)(base + OPREGION_RVDA)) =
> > + cpu_to_le64((rvda - (u64)addr));
> > + }
>
> There's a much better description of the fields and logic here, thanks
> for that. I also see we've closed the gap to require the extended
> region to immediately follow the opregion table. The code
> immediately above still makes me nervous as even if this is the only
> difference between the specs, code might make some differentiation
> based on the spec version, which we're changing in host memory for all
> subsequent drivers until the host is rebooted. Could we use a pci_dbg()
> in this branch to flag that event in dmesg for debugging? Thanks,
>
Alex, that's really valid concern, even we thought it should be no problem,
we asked firmware team again, it looks for opregion 2.0 with VBT >6k case (RVDA != 0)
is not practically available for end user. So I think we may just not support
for that. For opregion 2.1+, just extend the size properly.
Thanks
>
> > +
> > + /* region size for opregion v2.0+: opregion and VBT size */
> > + size = offset + rvds;
> > + }
> > + }
> > +
> > if (size != OPREGION_SIZE) {
> > memunmap(base);
> > base = memremap(addr, size, MEMREMAP_WB);
>
[-- Attachment #1.2: signature.asc --]
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[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for vfio/pci: Add support for opregion v2.0+ (rev3)
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
` (7 preceding siblings ...)
(?)
@ 2021-02-08 9:22 ` Patchwork
-1 siblings, 0 replies; 48+ messages in thread
From: Patchwork @ 2021-02-08 9:22 UTC (permalink / raw)
To: Fred Gao; +Cc: intel-gfx
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+ (rev3)
URL : https://patchwork.freedesktop.org/series/84494/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
cdc32418f054 vfio/pci: Add support for opregion v2.1+
-:72: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#72: FILE: drivers/vfio/pci/vfio_pci_igd.c:117:
+ pci_err(vdev->pdev,
+ "IGD passthrough does not support\n"
-:80: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#80: FILE: drivers/vfio/pci/vfio_pci_igd.c:125:
+ pci_err(vdev->pdev,
+ "Extended VBT does not follow opregion !\n"
total: 0 errors, 0 warnings, 2 checks, 67 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for vfio/pci: Add support for opregion v2.0+ (rev3)
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
` (8 preceding siblings ...)
(?)
@ 2021-02-08 9:52 ` Patchwork
-1 siblings, 0 replies; 48+ messages in thread
From: Patchwork @ 2021-02-08 9:52 UTC (permalink / raw)
To: Fred Gao; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 4017 bytes --]
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+ (rev3)
URL : https://patchwork.freedesktop.org/series/84494/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9745 -> Patchwork_19625
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19625/index.html
Known issues
------------
Here are the changes found in Patchwork_19625 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@semaphore:
- fi-bsw-nick: NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19625/fi-bsw-nick/igt@amdgpu/amd_basic@semaphore.html
- fi-bdw-5557u: NOTRUN -> [SKIP][2] ([fdo#109271]) +22 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19625/fi-bdw-5557u/igt@amdgpu/amd_basic@semaphore.html
* igt@core_hotunplug@unbind-rebind:
- fi-bdw-5557u: NOTRUN -> [WARN][3] ([i915#2283])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19625/fi-bdw-5557u/igt@core_hotunplug@unbind-rebind.html
* igt@gem_mmap_gtt@basic:
- fi-tgl-y: [PASS][4] -> [DMESG-WARN][5] ([i915#402]) +1 similar issue
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9745/fi-tgl-y/igt@gem_mmap_gtt@basic.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19625/fi-tgl-y/igt@gem_mmap_gtt@basic.html
#### Possible fixes ####
* igt@i915_selftest@live@client:
- fi-glk-dsi: [DMESG-FAIL][6] ([i915#3047]) -> [PASS][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9745/fi-glk-dsi/igt@i915_selftest@live@client.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19625/fi-glk-dsi/igt@i915_selftest@live@client.html
* igt@i915_selftest@live@late_gt_pm:
- fi-bsw-nick: [DMESG-FAIL][8] ([i915#2927]) -> [PASS][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9745/fi-bsw-nick/igt@i915_selftest@live@late_gt_pm.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19625/fi-bsw-nick/igt@i915_selftest@live@late_gt_pm.html
* igt@kms_chamelium@hdmi-edid-read:
- fi-kbl-7500u: [FAIL][10] ([i915#2128]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9745/fi-kbl-7500u/igt@kms_chamelium@hdmi-edid-read.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19625/fi-kbl-7500u/igt@kms_chamelium@hdmi-edid-read.html
* igt@vgem_basic@create:
- fi-tgl-y: [DMESG-WARN][12] ([i915#402]) -> [PASS][13] +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9745/fi-tgl-y/igt@vgem_basic@create.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19625/fi-tgl-y/igt@vgem_basic@create.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#2128]: https://gitlab.freedesktop.org/drm/intel/issues/2128
[i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283
[i915#2927]: https://gitlab.freedesktop.org/drm/intel/issues/2927
[i915#3047]: https://gitlab.freedesktop.org/drm/intel/issues/3047
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (44 -> 38)
------------------------------
Missing (6): fi-jsl-1 fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9745 -> Patchwork_19625
CI-20190529: 20190529
CI_DRM_9745: ef43e66b8c7bc46d8be9c1177c23583f535c5f0f @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5997: 2f27f54d9fae945a4b7cffc7d7370abb7a41caf2 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19625: cdc32418f054a07d7c46b3f1dc1d59504f0c952b @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
cdc32418f054 vfio/pci: Add support for opregion v2.1+
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19625/index.html
[-- Attachment #1.2: Type: text/html, Size: 4944 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH v3] vfio/pci: Add support for opregion v2.1+
2021-01-18 12:38 ` [Intel-gfx] " Fred Gao
@ 2021-02-08 17:02 ` Fred Gao
-1 siblings, 0 replies; 48+ messages in thread
From: Fred Gao @ 2021-02-08 17:02 UTC (permalink / raw)
To: kvm, intel-gfx; +Cc: Fred Gao, Zhenyu Wang, Swee Yee Fonn
Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
However, When VBT data exceeds 6KB size and cannot be within mailbox #4
starting from opregion v2.0+, Extended VBT region, next to opregion, is
used to hold the VBT data, so the total size will be opregion size plus
extended VBT region size.
since opregion v2.0 with physical host VBT address should not be
practically available for end user, it is not supported.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
Signed-off-by: Fred Gao <fred.gao@intel.com>
---
drivers/vfio/pci/vfio_pci_igd.c | 49 +++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
index 53d97f459252..d93a855227e7 100644
--- a/drivers/vfio/pci/vfio_pci_igd.c
+++ b/drivers/vfio/pci/vfio_pci_igd.c
@@ -21,6 +21,10 @@
#define OPREGION_SIZE (8 * 1024)
#define OPREGION_PCI_ADDR 0xfc
+#define OPREGION_RVDA 0x3ba
+#define OPREGION_RVDS 0x3c2
+#define OPREGION_VERSION 0x16
+
static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
size_t count, loff_t *ppos, bool iswrite)
{
@@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
u32 addr, size;
void *base;
int ret;
+ u16 version;
ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
if (ret)
@@ -83,6 +88,50 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
size *= 1024; /* In KB */
+ /*
+ * Support opregion v2.1+
+ * When VBT data exceeds 6KB size and cannot be within mailbox #4
+ * Extended VBT region, next to opregion, is used to hold the VBT data.
+ * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
+ * (VBT Data Size) from opregion structure member are used to hold the
+ * address from region base and size of VBT data while RVDA/RVDS
+ * are not defined before opregion 2.0.
+ *
+ * opregion 2.0: rvda is the physical VBT address.
+ *
+ * opregion 2.1+: rvda is unsigned, relative offset from
+ * opregion base, and should never point within opregion.
+ */
+ version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
+ if (version >= 0x0200) {
+ u64 rvda;
+ u32 rvds;
+
+ rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
+ rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
+ if (rvda && rvds) {
+ /* no support for opregion v2.0 with physical VBT address */
+ if (version == 0x0200) {
+ memunmap(base);
+ pci_err(vdev->pdev,
+ "IGD passthrough does not support\n"
+ "opregion version 0x%x with physical rvda 0x%llx\n", version, rvda);
+ return -EINVAL;
+ }
+
+ if ((u32)rvda != size) {
+ memunmap(base);
+ pci_err(vdev->pdev,
+ "Extended VBT does not follow opregion !\n"
+ "opregion version 0x%x:rvda 0x%llx\n", version, rvda);
+ return -EINVAL;
+ }
+
+ /* region size for opregion v2.0+: opregion and VBT size */
+ size += rvds;
+ }
+ }
+
if (size != OPREGION_SIZE) {
memunmap(base);
base = memremap(addr, size, MEMREMAP_WB);
--
2.24.1.1.gb6d4d82bd5
^ permalink raw reply related [flat|nested] 48+ messages in thread
* [Intel-gfx] [PATCH v3] vfio/pci: Add support for opregion v2.1+
@ 2021-02-08 17:02 ` Fred Gao
0 siblings, 0 replies; 48+ messages in thread
From: Fred Gao @ 2021-02-08 17:02 UTC (permalink / raw)
To: kvm, intel-gfx; +Cc: Fred Gao, Swee Yee Fonn
Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
However, When VBT data exceeds 6KB size and cannot be within mailbox #4
starting from opregion v2.0+, Extended VBT region, next to opregion, is
used to hold the VBT data, so the total size will be opregion size plus
extended VBT region size.
since opregion v2.0 with physical host VBT address should not be
practically available for end user, it is not supported.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
Signed-off-by: Fred Gao <fred.gao@intel.com>
---
drivers/vfio/pci/vfio_pci_igd.c | 49 +++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
index 53d97f459252..d93a855227e7 100644
--- a/drivers/vfio/pci/vfio_pci_igd.c
+++ b/drivers/vfio/pci/vfio_pci_igd.c
@@ -21,6 +21,10 @@
#define OPREGION_SIZE (8 * 1024)
#define OPREGION_PCI_ADDR 0xfc
+#define OPREGION_RVDA 0x3ba
+#define OPREGION_RVDS 0x3c2
+#define OPREGION_VERSION 0x16
+
static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
size_t count, loff_t *ppos, bool iswrite)
{
@@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
u32 addr, size;
void *base;
int ret;
+ u16 version;
ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
if (ret)
@@ -83,6 +88,50 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
size *= 1024; /* In KB */
+ /*
+ * Support opregion v2.1+
+ * When VBT data exceeds 6KB size and cannot be within mailbox #4
+ * Extended VBT region, next to opregion, is used to hold the VBT data.
+ * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
+ * (VBT Data Size) from opregion structure member are used to hold the
+ * address from region base and size of VBT data while RVDA/RVDS
+ * are not defined before opregion 2.0.
+ *
+ * opregion 2.0: rvda is the physical VBT address.
+ *
+ * opregion 2.1+: rvda is unsigned, relative offset from
+ * opregion base, and should never point within opregion.
+ */
+ version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
+ if (version >= 0x0200) {
+ u64 rvda;
+ u32 rvds;
+
+ rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
+ rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
+ if (rvda && rvds) {
+ /* no support for opregion v2.0 with physical VBT address */
+ if (version == 0x0200) {
+ memunmap(base);
+ pci_err(vdev->pdev,
+ "IGD passthrough does not support\n"
+ "opregion version 0x%x with physical rvda 0x%llx\n", version, rvda);
+ return -EINVAL;
+ }
+
+ if ((u32)rvda != size) {
+ memunmap(base);
+ pci_err(vdev->pdev,
+ "Extended VBT does not follow opregion !\n"
+ "opregion version 0x%x:rvda 0x%llx\n", version, rvda);
+ return -EINVAL;
+ }
+
+ /* region size for opregion v2.0+: opregion and VBT size */
+ size += rvds;
+ }
+ }
+
if (size != OPREGION_SIZE) {
memunmap(base);
base = memremap(addr, size, MEMREMAP_WB);
--
2.24.1.1.gb6d4d82bd5
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for vfio/pci: Add support for opregion v2.0+ (rev4)
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
` (9 preceding siblings ...)
(?)
@ 2021-03-02 6:49 ` Patchwork
2021-03-02 12:47 ` Gao, Fred
-1 siblings, 1 reply; 48+ messages in thread
From: Patchwork @ 2021-03-02 6:49 UTC (permalink / raw)
To: Fred Gao; +Cc: intel-gfx
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== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+ (rev4)
URL : https://patchwork.freedesktop.org/series/84494/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9819 -> Patchwork_19740
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_19740 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19740, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19740:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_gttfill@basic:
- fi-kbl-8809g: [PASS][1] -> [TIMEOUT][2] +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9819/fi-kbl-8809g/igt@gem_exec_gttfill@basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-kbl-8809g/igt@gem_exec_gttfill@basic.html
Known issues
------------
Here are the changes found in Patchwork_19740 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@memory-alloc:
- fi-cml-u2: NOTRUN -> [SKIP][3] ([fdo#109315]) +17 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@amdgpu/amd_basic@memory-alloc.html
* igt@debugfs_test@read_all_entries:
- fi-tgl-y: [PASS][4] -> [DMESG-WARN][5] ([i915#402]) +2 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9819/fi-tgl-y/igt@debugfs_test@read_all_entries.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-tgl-y/igt@debugfs_test@read_all_entries.html
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-cml-u2: NOTRUN -> [SKIP][6] ([i915#1208]) +1 similar issue
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@gem_exec_fence@basic-busy@bcs0.html
* igt@gem_huc_copy@huc-copy:
- fi-cml-u2: NOTRUN -> [SKIP][7] ([i915#2190])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@gem_huc_copy@huc-copy.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-cml-u2: NOTRUN -> [SKIP][8] ([i915#1004]) +2 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_chamelium@vga-edid-read:
- fi-cml-u2: NOTRUN -> [SKIP][9] ([fdo#109309]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@kms_chamelium@vga-edid-read.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-cml-u2: NOTRUN -> [SKIP][10] ([fdo#109285])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-cml-u2: NOTRUN -> [SKIP][11] ([fdo#109278] / [i915#533])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
#### Possible fixes ####
* igt@gem_linear_blits@basic:
- fi-kbl-8809g: [TIMEOUT][12] ([i915#2502]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9819/fi-kbl-8809g/igt@gem_linear_blits@basic.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-kbl-8809g/igt@gem_linear_blits@basic.html
* igt@prime_self_import@basic-with_one_bo_two_files:
- fi-tgl-y: [DMESG-WARN][14] ([i915#402]) -> [PASS][15] +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9819/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1004]: https://gitlab.freedesktop.org/drm/intel/issues/1004
[i915#1021]: https://gitlab.freedesktop.org/drm/intel/issues/1021
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1208]: https://gitlab.freedesktop.org/drm/intel/issues/1208
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2502]: https://gitlab.freedesktop.org/drm/intel/issues/2502
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Participating hosts (42 -> 41)
------------------------------
Additional (2): fi-cml-u2 fi-ehl-1
Missing (3): fi-ctg-p8600 fi-ilk-m540 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9819 -> Patchwork_19740
CI-20190529: 20190529
CI_DRM_9819: 52e5817b130a97930caddaf02dcbaca717028b77 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6016: 2107b0a53692fb329175bc16169c3699712187aa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19740: 037079b93d89ddae6130fd4a0d43d5fb7a84cd45 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
037079b93d89 vfio/pci: Add support for opregion v2.1+
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/index.html
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for vfio/pci: Add support for opregion v2.0+ (rev4)
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
` (10 preceding siblings ...)
(?)
@ 2021-03-02 6:55 ` Patchwork
-1 siblings, 0 replies; 48+ messages in thread
From: Patchwork @ 2021-03-02 6:55 UTC (permalink / raw)
To: Fred Gao; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 1058 bytes --]
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+ (rev4)
URL : https://patchwork.freedesktop.org/series/84494/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9819_full -> Patchwork_19740_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/index.html
Changes
-------
No changes found
Participating hosts (8 -> 8)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_9819 -> Patchwork_19740
CI_DRM_9819: 52e5817b130a97930caddaf02dcbaca717028b77 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6016: 2107b0a53692fb329175bc16169c3699712187aa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19740: 037079b93d89ddae6130fd4a0d43d5fb7a84cd45 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/index.html
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for vfio/pci: Add support for opregion v2.0+ (rev4)
2021-03-02 6:49 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for vfio/pci: Add support for opregion v2.0+ (rev4) Patchwork
@ 2021-03-02 12:47 ` Gao, Fred
0 siblings, 0 replies; 48+ messages in thread
From: Gao, Fred @ 2021-03-02 12:47 UTC (permalink / raw)
To: Vudum, Lakshminarayana; +Cc: intel-gfx, Wang, Zhenyu Z
[-- Attachment #1.1: Type: text/plain, Size: 5820 bytes --]
Hi, Lakshmi:
1. The test failed on version 4 while passed on version 3.
The only difference between v3/v4 lies in the format indent issue :“Alignment should match open parenthesis ”
2. My patch only works in VFIO during a guest virtual machine is launched on VT-d gpu passthru.
i,e my patch should not be called in common i915 tests.
Can u help on this failure ?
Thanks in advance.
BR/Fred
From: Patchwork <patchwork@emeril.freedesktop.org>
Sent: Tuesday, March 2, 2021 2:50 PM
To: Gao, Fred <fred.gao@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: failure for vfio/pci: Add support for opregion v2.0+ (rev4)
Patch Details
Series:
vfio/pci: Add support for opregion v2.0+ (rev4)
URL:
https://patchwork.freedesktop.org/series/84494/
State:
failure
Details:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/index.html
CI Bug Log - changes from CI_DRM_9819 -> Patchwork_19740
Summary
FAILURE
Serious unknown changes coming with Patchwork_19740 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19740, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/index.html
Possible new issues
Here are the unknown changes that may have been introduced in Patchwork_19740:
IGT changes
Possible regressions
* igt@gem_exec_gttfill@basic:
* fi-kbl-8809g: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9819/fi-kbl-8809g/igt@gem_exec_gttfill@basic.html> -> TIMEOUT<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-kbl-8809g/igt@gem_exec_gttfill@basic.html> +1 similar issue
Known issues
Here are the changes found in Patchwork_19740 that come from known issues:
IGT changes
Issues hit
* igt@amdgpu/amd_basic@memory-alloc:
* fi-cml-u2: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@amdgpu/amd_basic@memory-alloc.html> (fdo#109315<https://bugs.freedesktop.org/show_bug.cgi?id=109315>) +17 similar issues
* igt@debugfs_test@read_all_entries:
* fi-tgl-y: PASS<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9819/fi-tgl-y/igt@debugfs_test@read_all_entries.html> -> DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-tgl-y/igt@debugfs_test@read_all_entries.html> (i915#402<https://gitlab.freedesktop.org/drm/intel/issues/402>) +2 similar issues
* igt@gem_exec_fence@basic-busy@bcs0:
* fi-cml-u2: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@gem_exec_fence@basic-busy@bcs0.html> (i915#1208<https://gitlab.freedesktop.org/drm/intel/issues/1208>) +1 similar issue
* igt@gem_huc_copy@huc-copy:
* fi-cml-u2: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@gem_huc_copy@huc-copy.html> (i915#2190<https://gitlab.freedesktop.org/drm/intel/issues/2190>)
* igt@kms_chamelium@hdmi-hpd-fast:
* fi-cml-u2: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@kms_chamelium@hdmi-hpd-fast.html> (i915#1004<https://gitlab.freedesktop.org/drm/intel/issues/1004>) +2 similar issues
* igt@kms_chamelium@vga-edid-read:
* fi-cml-u2: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@kms_chamelium@vga-edid-read.html> (fdo#109309<https://bugs.freedesktop.org/show_bug.cgi?id=109309>) +1 similar issue
* igt@kms_force_connector_basic@force-load-detect:
* fi-cml-u2: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@kms_force_connector_basic@force-load-detect.html> (fdo#109285<https://bugs.freedesktop.org/show_bug.cgi?id=109285>)
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
* fi-cml-u2: NOTRUN -> SKIP<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html> (fdo#109278<https://bugs.freedesktop.org/show_bug.cgi?id=109278> / i915#533<https://gitlab.freedesktop.org/drm/intel/issues/533>)
Possible fixes
* igt@gem_linear_blits@basic:
* fi-kbl-8809g: TIMEOUT<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9819/fi-kbl-8809g/igt@gem_linear_blits@basic.html> (i915#2502<https://gitlab.freedesktop.org/drm/intel/issues/2502>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-kbl-8809g/igt@gem_linear_blits@basic.html>
* igt@prime_self_import@basic-with_one_bo_two_files:
* fi-tgl-y: DMESG-WARN<https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9819/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html> (i915#402<https://gitlab.freedesktop.org/drm/intel/issues/402>) -> PASS<https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html> +1 similar issue
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
Participating hosts (42 -> 41)
Additional (2): fi-cml-u2 fi-ehl-1
Missing (3): fi-ctg-p8600 fi-ilk-m540 fi-bdw-samus
Build changes
* Linux: CI_DRM_9819 -> Patchwork_19740
CI-20190529: 20190529
CI_DRM_9819: 52e5817b130a97930caddaf02dcbaca717028b77 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6016: 2107b0a53692fb329175bc16169c3699712187aa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19740: 037079b93d89ddae6130fd4a0d43d5fb7a84cd45 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
037079b93d89 vfio/pci: Add support for opregion v2.1+
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH v4] vfio/pci: Add support for opregion v2.1+
2021-02-08 17:02 ` [Intel-gfx] " Fred Gao
@ 2021-03-02 13:02 ` Fred Gao
-1 siblings, 0 replies; 48+ messages in thread
From: Fred Gao @ 2021-03-02 13:02 UTC (permalink / raw)
To: kvm, intel-gfx; +Cc: Fred Gao, Zhenyu Wang, Swee Yee Fonn
Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
However, When VBT data exceeds 6KB size and cannot be within mailbox #4
starting from opregion v2.0+, Extended VBT region, next to opregion, is
used to hold the VBT data, so the total size will be opregion size plus
extended VBT region size.
since opregion v2.0 with physical host VBT address should not be
practically available for end user, it is not supported.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
Signed-off-by: Fred Gao <fred.gao@intel.com>
---
drivers/vfio/pci/vfio_pci_igd.c | 49 +++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
index 53d97f459252..4edb8afcdbfc 100644
--- a/drivers/vfio/pci/vfio_pci_igd.c
+++ b/drivers/vfio/pci/vfio_pci_igd.c
@@ -21,6 +21,10 @@
#define OPREGION_SIZE (8 * 1024)
#define OPREGION_PCI_ADDR 0xfc
+#define OPREGION_RVDA 0x3ba
+#define OPREGION_RVDS 0x3c2
+#define OPREGION_VERSION 0x16
+
static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
size_t count, loff_t *ppos, bool iswrite)
{
@@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
u32 addr, size;
void *base;
int ret;
+ u16 version;
ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
if (ret)
@@ -83,6 +88,50 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
size *= 1024; /* In KB */
+ /*
+ * Support opregion v2.1+
+ * When VBT data exceeds 6KB size and cannot be within mailbox #4
+ * Extended VBT region, next to opregion, is used to hold the VBT data.
+ * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
+ * (VBT Data Size) from opregion structure member are used to hold the
+ * address from region base and size of VBT data while RVDA/RVDS
+ * are not defined before opregion 2.0.
+ *
+ * opregion 2.0: rvda is the physical VBT address.
+ *
+ * opregion 2.1+: rvda is unsigned, relative offset from
+ * opregion base, and should never point within opregion.
+ */
+ version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
+ if (version >= 0x0200) {
+ u64 rvda;
+ u32 rvds;
+
+ rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
+ rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
+ if (rvda && rvds) {
+ /* no support for opregion v2.0 with physical VBT address */
+ if (version == 0x0200) {
+ memunmap(base);
+ pci_err(vdev->pdev,
+ "IGD passthrough does not support opregion\n"
+ "version 0x%x with physical rvda 0x%llx\n", version, rvda);
+ return -EINVAL;
+ }
+
+ if ((u32)rvda != size) {
+ memunmap(base);
+ pci_err(vdev->pdev,
+ "Extended VBT does not follow opregion !\n"
+ "opregion version 0x%x:rvda 0x%llx\n", version, rvda);
+ return -EINVAL;
+ }
+
+ /* region size for opregion v2.0+: opregion and VBT size */
+ size += rvds;
+ }
+ }
+
if (size != OPREGION_SIZE) {
memunmap(base);
base = memremap(addr, size, MEMREMAP_WB);
--
2.24.1.1.gb6d4d82bd5
^ permalink raw reply related [flat|nested] 48+ messages in thread
* [Intel-gfx] [PATCH v4] vfio/pci: Add support for opregion v2.1+
@ 2021-03-02 13:02 ` Fred Gao
0 siblings, 0 replies; 48+ messages in thread
From: Fred Gao @ 2021-03-02 13:02 UTC (permalink / raw)
To: kvm, intel-gfx; +Cc: Fred Gao, Swee Yee Fonn
Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
However, When VBT data exceeds 6KB size and cannot be within mailbox #4
starting from opregion v2.0+, Extended VBT region, next to opregion, is
used to hold the VBT data, so the total size will be opregion size plus
extended VBT region size.
since opregion v2.0 with physical host VBT address should not be
practically available for end user, it is not supported.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
Signed-off-by: Fred Gao <fred.gao@intel.com>
---
drivers/vfio/pci/vfio_pci_igd.c | 49 +++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
index 53d97f459252..4edb8afcdbfc 100644
--- a/drivers/vfio/pci/vfio_pci_igd.c
+++ b/drivers/vfio/pci/vfio_pci_igd.c
@@ -21,6 +21,10 @@
#define OPREGION_SIZE (8 * 1024)
#define OPREGION_PCI_ADDR 0xfc
+#define OPREGION_RVDA 0x3ba
+#define OPREGION_RVDS 0x3c2
+#define OPREGION_VERSION 0x16
+
static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
size_t count, loff_t *ppos, bool iswrite)
{
@@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
u32 addr, size;
void *base;
int ret;
+ u16 version;
ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
if (ret)
@@ -83,6 +88,50 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
size *= 1024; /* In KB */
+ /*
+ * Support opregion v2.1+
+ * When VBT data exceeds 6KB size and cannot be within mailbox #4
+ * Extended VBT region, next to opregion, is used to hold the VBT data.
+ * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
+ * (VBT Data Size) from opregion structure member are used to hold the
+ * address from region base and size of VBT data while RVDA/RVDS
+ * are not defined before opregion 2.0.
+ *
+ * opregion 2.0: rvda is the physical VBT address.
+ *
+ * opregion 2.1+: rvda is unsigned, relative offset from
+ * opregion base, and should never point within opregion.
+ */
+ version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
+ if (version >= 0x0200) {
+ u64 rvda;
+ u32 rvds;
+
+ rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
+ rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
+ if (rvda && rvds) {
+ /* no support for opregion v2.0 with physical VBT address */
+ if (version == 0x0200) {
+ memunmap(base);
+ pci_err(vdev->pdev,
+ "IGD passthrough does not support opregion\n"
+ "version 0x%x with physical rvda 0x%llx\n", version, rvda);
+ return -EINVAL;
+ }
+
+ if ((u32)rvda != size) {
+ memunmap(base);
+ pci_err(vdev->pdev,
+ "Extended VBT does not follow opregion !\n"
+ "opregion version 0x%x:rvda 0x%llx\n", version, rvda);
+ return -EINVAL;
+ }
+
+ /* region size for opregion v2.0+: opregion and VBT size */
+ size += rvds;
+ }
+ }
+
if (size != OPREGION_SIZE) {
memunmap(base);
base = memremap(addr, size, MEMREMAP_WB);
--
2.24.1.1.gb6d4d82bd5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for vfio/pci: Add support for opregion v2.0+ (rev4)
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
` (11 preceding siblings ...)
(?)
@ 2021-03-02 17:09 ` Patchwork
-1 siblings, 0 replies; 48+ messages in thread
From: Patchwork @ 2021-03-02 17:09 UTC (permalink / raw)
To: Gao, Fred; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 5553 bytes --]
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+ (rev4)
URL : https://patchwork.freedesktop.org/series/84494/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9819 -> Patchwork_19740
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/index.html
Known issues
------------
Here are the changes found in Patchwork_19740 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@memory-alloc:
- fi-cml-u2: NOTRUN -> [SKIP][1] ([fdo#109315]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@amdgpu/amd_basic@memory-alloc.html
* igt@debugfs_test@read_all_entries:
- fi-tgl-y: [PASS][2] -> [DMESG-WARN][3] ([i915#402]) +2 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9819/fi-tgl-y/igt@debugfs_test@read_all_entries.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-tgl-y/igt@debugfs_test@read_all_entries.html
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-cml-u2: NOTRUN -> [SKIP][4] ([i915#1208]) +1 similar issue
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@gem_exec_fence@basic-busy@bcs0.html
* igt@gem_exec_gttfill@basic:
- fi-kbl-8809g: [PASS][5] -> [TIMEOUT][6] ([i915#3145]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9819/fi-kbl-8809g/igt@gem_exec_gttfill@basic.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-kbl-8809g/igt@gem_exec_gttfill@basic.html
* igt@gem_huc_copy@huc-copy:
- fi-cml-u2: NOTRUN -> [SKIP][7] ([i915#2190])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@gem_huc_copy@huc-copy.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-cml-u2: NOTRUN -> [SKIP][8] ([i915#1004]) +2 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_chamelium@vga-edid-read:
- fi-cml-u2: NOTRUN -> [SKIP][9] ([fdo#109309]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@kms_chamelium@vga-edid-read.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-cml-u2: NOTRUN -> [SKIP][10] ([fdo#109285])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-cml-u2: NOTRUN -> [SKIP][11] ([fdo#109278] / [i915#533])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-cml-u2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
#### Possible fixes ####
* igt@gem_linear_blits@basic:
- fi-kbl-8809g: [TIMEOUT][12] ([i915#2502]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9819/fi-kbl-8809g/igt@gem_linear_blits@basic.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-kbl-8809g/igt@gem_linear_blits@basic.html
* igt@prime_self_import@basic-with_one_bo_two_files:
- fi-tgl-y: [DMESG-WARN][14] ([i915#402]) -> [PASS][15] +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9819/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/fi-tgl-y/igt@prime_self_import@basic-with_one_bo_two_files.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1004]: https://gitlab.freedesktop.org/drm/intel/issues/1004
[i915#1021]: https://gitlab.freedesktop.org/drm/intel/issues/1021
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1208]: https://gitlab.freedesktop.org/drm/intel/issues/1208
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2502]: https://gitlab.freedesktop.org/drm/intel/issues/2502
[i915#3145]: https://gitlab.freedesktop.org/drm/intel/issues/3145
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Participating hosts (42 -> 41)
------------------------------
Additional (2): fi-cml-u2 fi-ehl-1
Missing (3): fi-ctg-p8600 fi-ilk-m540 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9819 -> Patchwork_19740
CI-20190529: 20190529
CI_DRM_9819: 52e5817b130a97930caddaf02dcbaca717028b77 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6016: 2107b0a53692fb329175bc16169c3699712187aa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19740: 037079b93d89ddae6130fd4a0d43d5fb7a84cd45 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
037079b93d89 vfio/pci: Add support for opregion v2.1+
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19740/index.html
[-- Attachment #1.2: Type: text/html, Size: 6237 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [PATCH v4] vfio/pci: Add support for opregion v2.1+
2021-03-02 13:02 ` [Intel-gfx] " Fred Gao
@ 2021-03-19 19:26 ` Alex Williamson
-1 siblings, 0 replies; 48+ messages in thread
From: Alex Williamson @ 2021-03-19 19:26 UTC (permalink / raw)
To: Fred Gao; +Cc: kvm, intel-gfx, Zhenyu Wang, Swee Yee Fonn
On Tue, 2 Mar 2021 21:02:20 +0800
Fred Gao <fred.gao@intel.com> wrote:
> Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
> However, When VBT data exceeds 6KB size and cannot be within mailbox #4
> starting from opregion v2.0+, Extended VBT region, next to opregion, is
> used to hold the VBT data, so the total size will be opregion size plus
> extended VBT region size.
>
> since opregion v2.0 with physical host VBT address should not be
> practically available for end user, it is not supported.
>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> Signed-off-by: Fred Gao <fred.gao@intel.com>
> ---
> drivers/vfio/pci/vfio_pci_igd.c | 49 +++++++++++++++++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
> index 53d97f459252..4edb8afcdbfc 100644
> --- a/drivers/vfio/pci/vfio_pci_igd.c
> +++ b/drivers/vfio/pci/vfio_pci_igd.c
> @@ -21,6 +21,10 @@
> #define OPREGION_SIZE (8 * 1024)
> #define OPREGION_PCI_ADDR 0xfc
>
> +#define OPREGION_RVDA 0x3ba
> +#define OPREGION_RVDS 0x3c2
> +#define OPREGION_VERSION 0x16
> +
> static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
> size_t count, loff_t *ppos, bool iswrite)
> {
> @@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> u32 addr, size;
> void *base;
> int ret;
> + u16 version;
>
> ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
> if (ret)
> @@ -83,6 +88,50 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
>
> size *= 1024; /* In KB */
>
> + /*
> + * Support opregion v2.1+
> + * When VBT data exceeds 6KB size and cannot be within mailbox #4
s/#4/#4, then the/
> + * Extended VBT region, next to opregion, is used to hold the VBT data.
> + * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
> + * (VBT Data Size) from opregion structure member are used to hold the
> + * address from region base and size of VBT data while RVDA/RVDS
> + * are not defined before opregion 2.0.
> + *
> + * opregion 2.0: rvda is the physical VBT address.
Let's expand the comment to include why this is a problem to support
(virtualization of this register would be required in userspace) and why
we're choosing not to manipulate this into a 2.1+ table, which I think
is both the practical lack of v2.0 tables in use and any implicit
dependencies software may have on the OpRegion version.
> + *
> + * opregion 2.1+: rvda is unsigned, relative offset from
> + * opregion base, and should never point within opregion.
And for our purposes must exactly follow the base opregion to avoid
exposing unknown host memory to userspace, ie. provide a more
descriptive justification for the 2nd error condition below.
> + */
> + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> + if (version >= 0x0200) {
> + u64 rvda;
> + u32 rvds;
> +
> + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
> + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
> + if (rvda && rvds) {
> + /* no support for opregion v2.0 with physical VBT address */
> + if (version == 0x0200) {
> + memunmap(base);
> + pci_err(vdev->pdev,
> + "IGD passthrough does not support opregion\n"
> + "version 0x%x with physical rvda 0x%llx\n", version, rvda);
Why do we need a new line midway through this log message?
s/passthrough/assignment/
In testing the version you include the leading zero, do you also want
that leading zero in the printed version, ie. %04x?
If we get to this code, we already know that both rvda and rvds are
non-zero, why is it useful to print the rvda value in this error
message? For example, we could print:
"IGD assignment does not support opregion version 0x%04x with an extended VBT region"
> + return -EINVAL;
> + }
> +
> + if ((u32)rvda != size) {
What allows us to assume rvda is a 32bit value given that it's a 64bit
register? It seems safer not to include this cast.
> + memunmap(base);
> + pci_err(vdev->pdev,
> + "Extended VBT does not follow opregion !\n"
> + "opregion version 0x%x:rvda 0x%llx\n", version, rvda);
Again I'm not sure about the usefulness of printing the rvda value on
its own. Without knowing the size value it seems meaningless. Like
above, get rid of the mid-error new line and random space if you keep
the exclamation point.
> + return -EINVAL;
> + }
> +
> + /* region size for opregion v2.0+: opregion and VBT size */
> + size += rvds;
RVDS is defined as size in bytes, not in kilobytes like the base
opregion size, right? Let's include that clarification in the comment
since the spec is private. Thanks,
Alex
> + }
> + }
> +
> if (size != OPREGION_SIZE) {
> memunmap(base);
> base = memremap(addr, size, MEMREMAP_WB);
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] [PATCH v4] vfio/pci: Add support for opregion v2.1+
@ 2021-03-19 19:26 ` Alex Williamson
0 siblings, 0 replies; 48+ messages in thread
From: Alex Williamson @ 2021-03-19 19:26 UTC (permalink / raw)
To: Fred Gao; +Cc: Swee Yee Fonn, intel-gfx, kvm
On Tue, 2 Mar 2021 21:02:20 +0800
Fred Gao <fred.gao@intel.com> wrote:
> Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
> However, When VBT data exceeds 6KB size and cannot be within mailbox #4
> starting from opregion v2.0+, Extended VBT region, next to opregion, is
> used to hold the VBT data, so the total size will be opregion size plus
> extended VBT region size.
>
> since opregion v2.0 with physical host VBT address should not be
> practically available for end user, it is not supported.
>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> Signed-off-by: Fred Gao <fred.gao@intel.com>
> ---
> drivers/vfio/pci/vfio_pci_igd.c | 49 +++++++++++++++++++++++++++++++++
> 1 file changed, 49 insertions(+)
>
> diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
> index 53d97f459252..4edb8afcdbfc 100644
> --- a/drivers/vfio/pci/vfio_pci_igd.c
> +++ b/drivers/vfio/pci/vfio_pci_igd.c
> @@ -21,6 +21,10 @@
> #define OPREGION_SIZE (8 * 1024)
> #define OPREGION_PCI_ADDR 0xfc
>
> +#define OPREGION_RVDA 0x3ba
> +#define OPREGION_RVDS 0x3c2
> +#define OPREGION_VERSION 0x16
> +
> static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
> size_t count, loff_t *ppos, bool iswrite)
> {
> @@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> u32 addr, size;
> void *base;
> int ret;
> + u16 version;
>
> ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
> if (ret)
> @@ -83,6 +88,50 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
>
> size *= 1024; /* In KB */
>
> + /*
> + * Support opregion v2.1+
> + * When VBT data exceeds 6KB size and cannot be within mailbox #4
s/#4/#4, then the/
> + * Extended VBT region, next to opregion, is used to hold the VBT data.
> + * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
> + * (VBT Data Size) from opregion structure member are used to hold the
> + * address from region base and size of VBT data while RVDA/RVDS
> + * are not defined before opregion 2.0.
> + *
> + * opregion 2.0: rvda is the physical VBT address.
Let's expand the comment to include why this is a problem to support
(virtualization of this register would be required in userspace) and why
we're choosing not to manipulate this into a 2.1+ table, which I think
is both the practical lack of v2.0 tables in use and any implicit
dependencies software may have on the OpRegion version.
> + *
> + * opregion 2.1+: rvda is unsigned, relative offset from
> + * opregion base, and should never point within opregion.
And for our purposes must exactly follow the base opregion to avoid
exposing unknown host memory to userspace, ie. provide a more
descriptive justification for the 2nd error condition below.
> + */
> + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> + if (version >= 0x0200) {
> + u64 rvda;
> + u32 rvds;
> +
> + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
> + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
> + if (rvda && rvds) {
> + /* no support for opregion v2.0 with physical VBT address */
> + if (version == 0x0200) {
> + memunmap(base);
> + pci_err(vdev->pdev,
> + "IGD passthrough does not support opregion\n"
> + "version 0x%x with physical rvda 0x%llx\n", version, rvda);
Why do we need a new line midway through this log message?
s/passthrough/assignment/
In testing the version you include the leading zero, do you also want
that leading zero in the printed version, ie. %04x?
If we get to this code, we already know that both rvda and rvds are
non-zero, why is it useful to print the rvda value in this error
message? For example, we could print:
"IGD assignment does not support opregion version 0x%04x with an extended VBT region"
> + return -EINVAL;
> + }
> +
> + if ((u32)rvda != size) {
What allows us to assume rvda is a 32bit value given that it's a 64bit
register? It seems safer not to include this cast.
> + memunmap(base);
> + pci_err(vdev->pdev,
> + "Extended VBT does not follow opregion !\n"
> + "opregion version 0x%x:rvda 0x%llx\n", version, rvda);
Again I'm not sure about the usefulness of printing the rvda value on
its own. Without knowing the size value it seems meaningless. Like
above, get rid of the mid-error new line and random space if you keep
the exclamation point.
> + return -EINVAL;
> + }
> +
> + /* region size for opregion v2.0+: opregion and VBT size */
> + size += rvds;
RVDS is defined as size in bytes, not in kilobytes like the base
opregion size, right? Let's include that clarification in the comment
since the spec is private. Thanks,
Alex
> + }
> + }
> +
> if (size != OPREGION_SIZE) {
> memunmap(base);
> base = memremap(addr, size, MEMREMAP_WB);
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* RE: [PATCH v4] vfio/pci: Add support for opregion v2.1+
2021-03-19 19:26 ` [Intel-gfx] " Alex Williamson
@ 2021-03-25 8:50 ` Gao, Fred
-1 siblings, 0 replies; 48+ messages in thread
From: Gao, Fred @ 2021-03-25 8:50 UTC (permalink / raw)
To: Alex Williamson; +Cc: kvm, intel-gfx, Zhenyu Wang, Fonn, Swee Yee
Thank you for offering your valuable advice.
Will send the updated version soon.
> -----Original Message-----
> From: Alex Williamson <alex.williamson@redhat.com>
> Sent: Saturday, March 20, 2021 3:27 AM
> To: Gao, Fred <fred.gao@intel.com>
> Cc: kvm@vger.kernel.org; intel-gfx@lists.freedesktop.org; Zhenyu Wang
> <zhenyuw@linux.intel.com>; Fonn, Swee Yee <swee.yee.fonn@intel.com>
> Subject: Re: [PATCH v4] vfio/pci: Add support for opregion v2.1+
>
> On Tue, 2 Mar 2021 21:02:20 +0800
> Fred Gao <fred.gao@intel.com> wrote:
>
> > Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
> > However, When VBT data exceeds 6KB size and cannot be within mailbox
> > #4 starting from opregion v2.0+, Extended VBT region, next to
> > opregion, is used to hold the VBT data, so the total size will be
> > opregion size plus extended VBT region size.
> >
> > since opregion v2.0 with physical host VBT address should not be
> > practically available for end user, it is not supported.
> >
> > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> > Signed-off-by: Fred Gao <fred.gao@intel.com>
> > ---
> > drivers/vfio/pci/vfio_pci_igd.c | 49
> > +++++++++++++++++++++++++++++++++
> > 1 file changed, 49 insertions(+)
> >
> > diff --git a/drivers/vfio/pci/vfio_pci_igd.c
> > b/drivers/vfio/pci/vfio_pci_igd.c index 53d97f459252..4edb8afcdbfc
> > 100644
> > --- a/drivers/vfio/pci/vfio_pci_igd.c
> > +++ b/drivers/vfio/pci/vfio_pci_igd.c
> > @@ -21,6 +21,10 @@
> > #define OPREGION_SIZE (8 * 1024)
> > #define OPREGION_PCI_ADDR 0xfc
> >
> > +#define OPREGION_RVDA 0x3ba
> > +#define OPREGION_RVDS 0x3c2
> > +#define OPREGION_VERSION 0x16
> > +
> > static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user
> *buf,
> > size_t count, loff_t *ppos, bool iswrite) { @@ -
> 58,6 +62,7
> > @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> > u32 addr, size;
> > void *base;
> > int ret;
> > + u16 version;
> >
> > ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR,
> &addr);
> > if (ret)
> > @@ -83,6 +88,50 @@ static int vfio_pci_igd_opregion_init(struct
> > vfio_pci_device *vdev)
> >
> > size *= 1024; /* In KB */
> >
> > + /*
> > + * Support opregion v2.1+
> > + * When VBT data exceeds 6KB size and cannot be within mailbox #4
>
> s/#4/#4, then the/
>
> > + * Extended VBT region, next to opregion, is used to hold the VBT
> data.
> > + * RVDA (Relative Address of VBT Data from Opregion Base) and
> RVDS
> > + * (VBT Data Size) from opregion structure member are used to hold
> the
> > + * address from region base and size of VBT data while RVDA/RVDS
> > + * are not defined before opregion 2.0.
> > + *
> > + * opregion 2.0: rvda is the physical VBT address.
>
> Let's expand the comment to include why this is a problem to support
> (virtualization of this register would be required in userspace) and why we're
> choosing not to manipulate this into a 2.1+ table, which I think is both the
> practical lack of v2.0 tables in use and any implicit dependencies software
> may have on the OpRegion version.
>
> > + *
> > + * opregion 2.1+: rvda is unsigned, relative offset from
> > + * opregion base, and should never point within opregion.
>
> And for our purposes must exactly follow the base opregion to avoid
> exposing unknown host memory to userspace, ie. provide a more descriptive
> justification for the 2nd error condition below.
>
> > + */
> > + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> > + if (version >= 0x0200) {
> > + u64 rvda;
> > + u32 rvds;
> > +
> > + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
> > + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
> > + if (rvda && rvds) {
> > + /* no support for opregion v2.0 with physical VBT
> address */
> > + if (version == 0x0200) {
> > + memunmap(base);
> > + pci_err(vdev->pdev,
> > + "IGD passthrough does not support
> opregion\n"
> > + "version 0x%x with physical rvda
> 0x%llx\n", version, rvda);
>
>
> Why do we need a new line midway through this log message?
>
> s/passthrough/assignment/
>
> In testing the version you include the leading zero, do you also want that
> leading zero in the printed version, ie. %04x?
>
> If we get to this code, we already know that both rvda and rvds are non-zero,
> why is it useful to print the rvda value in this error message? For example,
> we could print:
>
> "IGD assignment does not support opregion version 0x%04x with an
> extended VBT region"
>
> > + return -EINVAL;
> > + }
> > +
> > + if ((u32)rvda != size) {
>
> What allows us to assume rvda is a 32bit value given that it's a 64bit register?
> It seems safer not to include this cast.
>
> > + memunmap(base);
> > + pci_err(vdev->pdev,
> > + "Extended VBT does not follow
> opregion !\n"
> > + "opregion version 0x%x:rvda
> 0x%llx\n", version, rvda);
>
> Again I'm not sure about the usefulness of printing the rvda value on its own.
> Without knowing the size value it seems meaningless. Like above, get rid of
> the mid-error new line and random space if you keep the exclamation point.
>
> > + return -EINVAL;
> > + }
> > +
> > + /* region size for opregion v2.0+: opregion and VBT
> size */
> > + size += rvds;
>
> RVDS is defined as size in bytes, not in kilobytes like the base opregion size,
> right? Let's include that clarification in the comment since the spec is private.
> Thanks,
>
> Alex
>
>
> > + }
> > + }
> > +
> > if (size != OPREGION_SIZE) {
> > memunmap(base);
> > base = memremap(addr, size, MEMREMAP_WB);
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] [PATCH v4] vfio/pci: Add support for opregion v2.1+
@ 2021-03-25 8:50 ` Gao, Fred
0 siblings, 0 replies; 48+ messages in thread
From: Gao, Fred @ 2021-03-25 8:50 UTC (permalink / raw)
To: Alex Williamson; +Cc: Fonn, Swee Yee, intel-gfx, kvm
Thank you for offering your valuable advice.
Will send the updated version soon.
> -----Original Message-----
> From: Alex Williamson <alex.williamson@redhat.com>
> Sent: Saturday, March 20, 2021 3:27 AM
> To: Gao, Fred <fred.gao@intel.com>
> Cc: kvm@vger.kernel.org; intel-gfx@lists.freedesktop.org; Zhenyu Wang
> <zhenyuw@linux.intel.com>; Fonn, Swee Yee <swee.yee.fonn@intel.com>
> Subject: Re: [PATCH v4] vfio/pci: Add support for opregion v2.1+
>
> On Tue, 2 Mar 2021 21:02:20 +0800
> Fred Gao <fred.gao@intel.com> wrote:
>
> > Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
> > However, When VBT data exceeds 6KB size and cannot be within mailbox
> > #4 starting from opregion v2.0+, Extended VBT region, next to
> > opregion, is used to hold the VBT data, so the total size will be
> > opregion size plus extended VBT region size.
> >
> > since opregion v2.0 with physical host VBT address should not be
> > practically available for end user, it is not supported.
> >
> > Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> > Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> > Signed-off-by: Fred Gao <fred.gao@intel.com>
> > ---
> > drivers/vfio/pci/vfio_pci_igd.c | 49
> > +++++++++++++++++++++++++++++++++
> > 1 file changed, 49 insertions(+)
> >
> > diff --git a/drivers/vfio/pci/vfio_pci_igd.c
> > b/drivers/vfio/pci/vfio_pci_igd.c index 53d97f459252..4edb8afcdbfc
> > 100644
> > --- a/drivers/vfio/pci/vfio_pci_igd.c
> > +++ b/drivers/vfio/pci/vfio_pci_igd.c
> > @@ -21,6 +21,10 @@
> > #define OPREGION_SIZE (8 * 1024)
> > #define OPREGION_PCI_ADDR 0xfc
> >
> > +#define OPREGION_RVDA 0x3ba
> > +#define OPREGION_RVDS 0x3c2
> > +#define OPREGION_VERSION 0x16
> > +
> > static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user
> *buf,
> > size_t count, loff_t *ppos, bool iswrite) { @@ -
> 58,6 +62,7
> > @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> > u32 addr, size;
> > void *base;
> > int ret;
> > + u16 version;
> >
> > ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR,
> &addr);
> > if (ret)
> > @@ -83,6 +88,50 @@ static int vfio_pci_igd_opregion_init(struct
> > vfio_pci_device *vdev)
> >
> > size *= 1024; /* In KB */
> >
> > + /*
> > + * Support opregion v2.1+
> > + * When VBT data exceeds 6KB size and cannot be within mailbox #4
>
> s/#4/#4, then the/
>
> > + * Extended VBT region, next to opregion, is used to hold the VBT
> data.
> > + * RVDA (Relative Address of VBT Data from Opregion Base) and
> RVDS
> > + * (VBT Data Size) from opregion structure member are used to hold
> the
> > + * address from region base and size of VBT data while RVDA/RVDS
> > + * are not defined before opregion 2.0.
> > + *
> > + * opregion 2.0: rvda is the physical VBT address.
>
> Let's expand the comment to include why this is a problem to support
> (virtualization of this register would be required in userspace) and why we're
> choosing not to manipulate this into a 2.1+ table, which I think is both the
> practical lack of v2.0 tables in use and any implicit dependencies software
> may have on the OpRegion version.
>
> > + *
> > + * opregion 2.1+: rvda is unsigned, relative offset from
> > + * opregion base, and should never point within opregion.
>
> And for our purposes must exactly follow the base opregion to avoid
> exposing unknown host memory to userspace, ie. provide a more descriptive
> justification for the 2nd error condition below.
>
> > + */
> > + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> > + if (version >= 0x0200) {
> > + u64 rvda;
> > + u32 rvds;
> > +
> > + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
> > + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
> > + if (rvda && rvds) {
> > + /* no support for opregion v2.0 with physical VBT
> address */
> > + if (version == 0x0200) {
> > + memunmap(base);
> > + pci_err(vdev->pdev,
> > + "IGD passthrough does not support
> opregion\n"
> > + "version 0x%x with physical rvda
> 0x%llx\n", version, rvda);
>
>
> Why do we need a new line midway through this log message?
>
> s/passthrough/assignment/
>
> In testing the version you include the leading zero, do you also want that
> leading zero in the printed version, ie. %04x?
>
> If we get to this code, we already know that both rvda and rvds are non-zero,
> why is it useful to print the rvda value in this error message? For example,
> we could print:
>
> "IGD assignment does not support opregion version 0x%04x with an
> extended VBT region"
>
> > + return -EINVAL;
> > + }
> > +
> > + if ((u32)rvda != size) {
>
> What allows us to assume rvda is a 32bit value given that it's a 64bit register?
> It seems safer not to include this cast.
>
> > + memunmap(base);
> > + pci_err(vdev->pdev,
> > + "Extended VBT does not follow
> opregion !\n"
> > + "opregion version 0x%x:rvda
> 0x%llx\n", version, rvda);
>
> Again I'm not sure about the usefulness of printing the rvda value on its own.
> Without knowing the size value it seems meaningless. Like above, get rid of
> the mid-error new line and random space if you keep the exclamation point.
>
> > + return -EINVAL;
> > + }
> > +
> > + /* region size for opregion v2.0+: opregion and VBT
> size */
> > + size += rvds;
>
> RVDS is defined as size in bytes, not in kilobytes like the base opregion size,
> right? Let's include that clarification in the comment since the spec is private.
> Thanks,
>
> Alex
>
>
> > + }
> > + }
> > +
> > if (size != OPREGION_SIZE) {
> > memunmap(base);
> > base = memremap(addr, size, MEMREMAP_WB);
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [PATCH v5] vfio/pci: Add support for opregion v2.1+
2021-03-02 13:02 ` [Intel-gfx] " Fred Gao
@ 2021-03-25 17:09 ` Fred Gao
-1 siblings, 0 replies; 48+ messages in thread
From: Fred Gao @ 2021-03-25 17:09 UTC (permalink / raw)
To: kvm, intel-gfx; +Cc: Fred Gao, Zhenyu Wang, Swee Yee Fonn
Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
but when VBT data exceeds 6KB size and cannot be within mailbox #4
then from opregion v2.0+, Extended VBT region, next to opregion is
used to hold the VBT data, so the total size will be opregion size plus
extended VBT region size.
Since opregion v2.0 with physical host VBT address would not be
practically available for end user and guest can not directly access
host physical address, so it is not supported.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
Signed-off-by: Fred Gao <fred.gao@intel.com>
---
drivers/vfio/pci/vfio_pci_igd.c | 53 +++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
index e66dfb0178ed..228df565e9bc 100644
--- a/drivers/vfio/pci/vfio_pci_igd.c
+++ b/drivers/vfio/pci/vfio_pci_igd.c
@@ -21,6 +21,10 @@
#define OPREGION_SIZE (8 * 1024)
#define OPREGION_PCI_ADDR 0xfc
+#define OPREGION_RVDA 0x3ba
+#define OPREGION_RVDS 0x3c2
+#define OPREGION_VERSION 0x16
+
static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
size_t count, loff_t *ppos, bool iswrite)
{
@@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
u32 addr, size;
void *base;
int ret;
+ u16 version;
ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
if (ret)
@@ -83,6 +88,54 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
size *= 1024; /* In KB */
+ /*
+ * Support opregion v2.1+
+ * When VBT data exceeds 6KB size and cannot be within mailbox #4, then
+ * the Extended VBT region next to opregion is used to hold the VBT data.
+ * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
+ * (Raw VBT Data Size) from opregion structure member are used to hold the
+ * address from region base and size of VBT data. RVDA/RVDS are not
+ * defined before opregion 2.0.
+ *
+ * opregion 2.1+: RVDA is unsigned, relative offset from
+ * opregion base, and should point to the end of opregion.
+ * otherwise, exposing to userspace to allow read access to everything between
+ * the OpRegion and VBT is not safe.
+ * RVDS is defined as size in bytes.
+ *
+ * opregion 2.0: rvda is the physical VBT address.
+ * Since rvda is HPA it cannot be directly used in guest.
+ * And it should not be practically available for end user,so it is not supported.
+ */
+ version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
+ if (version >= 0x0200) {
+ u64 rvda;
+ u32 rvds;
+
+ rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
+ rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
+ if (rvda && rvds) {
+ /* no support for opregion v2.0 with physical VBT address */
+ if (version == 0x0200) {
+ memunmap(base);
+ pci_err(vdev->pdev,
+ "IGD assignment does not support opregion v2.0 with an extended VBT region\n");
+ return -EINVAL;
+ }
+
+ if (rvda != size) {
+ memunmap(base);
+ pci_err(vdev->pdev,
+ "Extended VBT does not follow opregion on version 0x%04x\n",
+ version);
+ return -EINVAL;
+ }
+
+ /* region size for opregion v2.0+: opregion and VBT size. */
+ size += rvds;
+ }
+ }
+
if (size != OPREGION_SIZE) {
memunmap(base);
base = memremap(addr, size, MEMREMAP_WB);
--
2.24.1.1.gb6d4d82bd5
^ permalink raw reply related [flat|nested] 48+ messages in thread
* [Intel-gfx] [PATCH v5] vfio/pci: Add support for opregion v2.1+
@ 2021-03-25 17:09 ` Fred Gao
0 siblings, 0 replies; 48+ messages in thread
From: Fred Gao @ 2021-03-25 17:09 UTC (permalink / raw)
To: kvm, intel-gfx; +Cc: Fred Gao, Swee Yee Fonn
Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
but when VBT data exceeds 6KB size and cannot be within mailbox #4
then from opregion v2.0+, Extended VBT region, next to opregion is
used to hold the VBT data, so the total size will be opregion size plus
extended VBT region size.
Since opregion v2.0 with physical host VBT address would not be
practically available for end user and guest can not directly access
host physical address, so it is not supported.
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
Signed-off-by: Fred Gao <fred.gao@intel.com>
---
drivers/vfio/pci/vfio_pci_igd.c | 53 +++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
index e66dfb0178ed..228df565e9bc 100644
--- a/drivers/vfio/pci/vfio_pci_igd.c
+++ b/drivers/vfio/pci/vfio_pci_igd.c
@@ -21,6 +21,10 @@
#define OPREGION_SIZE (8 * 1024)
#define OPREGION_PCI_ADDR 0xfc
+#define OPREGION_RVDA 0x3ba
+#define OPREGION_RVDS 0x3c2
+#define OPREGION_VERSION 0x16
+
static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
size_t count, loff_t *ppos, bool iswrite)
{
@@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
u32 addr, size;
void *base;
int ret;
+ u16 version;
ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
if (ret)
@@ -83,6 +88,54 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
size *= 1024; /* In KB */
+ /*
+ * Support opregion v2.1+
+ * When VBT data exceeds 6KB size and cannot be within mailbox #4, then
+ * the Extended VBT region next to opregion is used to hold the VBT data.
+ * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
+ * (Raw VBT Data Size) from opregion structure member are used to hold the
+ * address from region base and size of VBT data. RVDA/RVDS are not
+ * defined before opregion 2.0.
+ *
+ * opregion 2.1+: RVDA is unsigned, relative offset from
+ * opregion base, and should point to the end of opregion.
+ * otherwise, exposing to userspace to allow read access to everything between
+ * the OpRegion and VBT is not safe.
+ * RVDS is defined as size in bytes.
+ *
+ * opregion 2.0: rvda is the physical VBT address.
+ * Since rvda is HPA it cannot be directly used in guest.
+ * And it should not be practically available for end user,so it is not supported.
+ */
+ version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
+ if (version >= 0x0200) {
+ u64 rvda;
+ u32 rvds;
+
+ rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
+ rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
+ if (rvda && rvds) {
+ /* no support for opregion v2.0 with physical VBT address */
+ if (version == 0x0200) {
+ memunmap(base);
+ pci_err(vdev->pdev,
+ "IGD assignment does not support opregion v2.0 with an extended VBT region\n");
+ return -EINVAL;
+ }
+
+ if (rvda != size) {
+ memunmap(base);
+ pci_err(vdev->pdev,
+ "Extended VBT does not follow opregion on version 0x%04x\n",
+ version);
+ return -EINVAL;
+ }
+
+ /* region size for opregion v2.0+: opregion and VBT size. */
+ size += rvds;
+ }
+ }
+
if (size != OPREGION_SIZE) {
memunmap(base);
base = memremap(addr, size, MEMREMAP_WB);
--
2.24.1.1.gb6d4d82bd5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 48+ messages in thread
* [Intel-gfx] ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion v2.0+ (rev5)
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
` (12 preceding siblings ...)
(?)
@ 2021-03-25 21:05 ` Patchwork
2021-03-29 7:12 ` Gao, Fred
-1 siblings, 1 reply; 48+ messages in thread
From: Patchwork @ 2021-03-25 21:05 UTC (permalink / raw)
To: Fred Gao; +Cc: intel-gfx
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+ (rev5)
URL : https://patchwork.freedesktop.org/series/84494/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter or member 'ww' not described in 'i915_gem_shrink'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'jump_whitelist' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'shadow_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or member 'batch_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function parameter 'trampoline' description in 'intel_engine_cmd_parser'
/home/cidrm/kernel/Documentation/gpu/i915:22: ./drivers/gpu/drm/i915/intel_runtime_pm.c:423: WARNING: Inline strong start-string without end-string.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for vfio/pci: Add support for opregion v2.0+ (rev5)
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
` (13 preceding siblings ...)
(?)
@ 2021-03-25 21:31 ` Patchwork
-1 siblings, 0 replies; 48+ messages in thread
From: Patchwork @ 2021-03-25 21:31 UTC (permalink / raw)
To: Fred Gao; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 5361 bytes --]
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+ (rev5)
URL : https://patchwork.freedesktop.org/series/84494/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9895 -> Patchwork_19853
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_19853 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19853, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19853:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@gt_heartbeat:
- fi-tgl-y: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html
Known issues
------------
Here are the changes found in Patchwork_19853 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271]) +24 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html
* igt@gem_flink_basic@double-flink:
- fi-tgl-y: [PASS][4] -> [DMESG-WARN][5] ([i915#402]) +2 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/fi-tgl-y/igt@gem_flink_basic@double-flink.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-tgl-y/igt@gem_flink_basic@double-flink.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2190])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886] / [i915#2291])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271] / [fdo#111827]) +8 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#533])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-y: [DMESG-WARN][10] ([i915#2411] / [i915#402]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html
* igt@i915_getparams_basic@basic-subslice-total:
- fi-tgl-y: [DMESG-WARN][12] ([i915#402]) -> [PASS][13] +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
[i915#3278]: https://gitlab.freedesktop.org/drm/intel/issues/3278
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Participating hosts (46 -> 42)
------------------------------
Additional (1): fi-kbl-soraka
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-icl-y fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9895 -> Patchwork_19853
CI-20190529: 20190529
CI_DRM_9895: bb187b1b292c637c3ef195f46d6e5c74f60df8f4 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6046: e76039273b1524147c43dba061756f06003d56ae @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19853: f3def8bf970adfbb4814c552041f791424d0a2f9 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
f3def8bf970a vfio/pci: Add support for opregion v2.1+
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/index.html
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion v2.0+ (rev5)
2021-03-25 21:05 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion v2.0+ (rev5) Patchwork
@ 2021-03-29 7:12 ` Gao, Fred
2021-03-29 7:12 ` Zhenyu Wang
2021-03-29 16:19 ` Vudum, Lakshminarayana
0 siblings, 2 replies; 48+ messages in thread
From: Gao, Fred @ 2021-03-29 7:12 UTC (permalink / raw)
To: intel-gfx, Vudum, Lakshminarayana; +Cc: Wang, Zhenyu Z
Hi, Lakshmi:
Can u help on this failure again,
the only difference between version 5& 4 is the comments.
Thanks in advance.
> -----Original Message-----
> From: Patchwork <patchwork@emeril.freedesktop.org>
> Sent: Friday, March 26, 2021 5:05 AM
> To: Gao, Fred <fred.gao@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion v2.0+
> (rev5)
>
> == Series Details ==
>
> Series: vfio/pci: Add support for opregion v2.0+ (rev5)
> URL : https://patchwork.freedesktop.org/series/84494/
> State : warning
>
> == Summary ==
>
> $ make htmldocs 2>&1 > /dev/null | grep i915
> ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function
> parameter or member 'ww' not described in 'i915_gem_shrink'
> ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function
> parameter 'trampoline' description in 'intel_engine_cmd_parser'
> ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> parameter or member 'jump_whitelist' not described in
> 'intel_engine_cmd_parser'
> ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> parameter or member 'shadow_map' not described in
> 'intel_engine_cmd_parser'
> ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> parameter or member 'batch_map' not described in
> 'intel_engine_cmd_parser'
> ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function
> parameter 'trampoline' description in 'intel_engine_cmd_parser'
> /home/cidrm/kernel/Documentation/gpu/i915:22: ./drivers/gpu/drm/i915/i
> ntel_runtime_pm.c:423: WARNING: Inline strong start-string without end-
> string.
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion v2.0+ (rev5)
2021-03-29 7:12 ` Gao, Fred
@ 2021-03-29 7:12 ` Zhenyu Wang
2021-03-29 16:19 ` Vudum, Lakshminarayana
1 sibling, 0 replies; 48+ messages in thread
From: Zhenyu Wang @ 2021-03-29 7:12 UTC (permalink / raw)
To: Gao, Fred; +Cc: intel-gfx, Vudum, Lakshminarayana
[-- Attachment #1.1: Type: text/plain, Size: 1902 bytes --]
On 2021.03.29 15:12:23 +0800, Gao, Fred wrote:
> Hi, Lakshmi:
>
> Can u help on this failure again,
> the only difference between version 5& 4 is the comments.
> Thanks in advance.
Looks i915 build warning, not related to vfio driver at all...
>
> > -----Original Message-----
> > From: Patchwork <patchwork@emeril.freedesktop.org>
> > Sent: Friday, March 26, 2021 5:05 AM
> > To: Gao, Fred <fred.gao@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org
> > Subject: ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion v2.0+
> > (rev5)
> >
> > == Series Details ==
> >
> > Series: vfio/pci: Add support for opregion v2.0+ (rev5)
> > URL : https://patchwork.freedesktop.org/series/84494/
> > State : warning
> >
> > == Summary ==
> >
> > $ make htmldocs 2>&1 > /dev/null | grep i915
> > ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function
> > parameter or member 'ww' not described in 'i915_gem_shrink'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function
> > parameter 'trampoline' description in 'intel_engine_cmd_parser'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> > parameter or member 'jump_whitelist' not described in
> > 'intel_engine_cmd_parser'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> > parameter or member 'shadow_map' not described in
> > 'intel_engine_cmd_parser'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> > parameter or member 'batch_map' not described in
> > 'intel_engine_cmd_parser'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function
> > parameter 'trampoline' description in 'intel_engine_cmd_parser'
> > /home/cidrm/kernel/Documentation/gpu/i915:22: ./drivers/gpu/drm/i915/i
> > ntel_runtime_pm.c:423: WARNING: Inline strong start-string without end-
> > string.
> >
>
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for vfio/pci: Add support for opregion v2.0+ (rev5)
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
` (14 preceding siblings ...)
(?)
@ 2021-03-29 15:51 ` Patchwork
-1 siblings, 0 replies; 48+ messages in thread
From: Patchwork @ 2021-03-29 15:51 UTC (permalink / raw)
To: Gao, Fred; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 4960 bytes --]
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+ (rev5)
URL : https://patchwork.freedesktop.org/series/84494/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9895 -> Patchwork_19853
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/index.html
Known issues
------------
Here are the changes found in Patchwork_19853 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271]) +24 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html
* igt@gem_flink_basic@double-flink:
- fi-tgl-y: [PASS][2] -> [DMESG-WARN][3] ([i915#402]) +2 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/fi-tgl-y/igt@gem_flink_basic@double-flink.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-tgl-y/igt@gem_flink_basic@double-flink.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#2190])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-tgl-y: [PASS][5] -> [DMESG-FAIL][6] ([i915#541])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-tgl-y/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886] / [i915#2291])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271] / [fdo#111827]) +8 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#533])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-y: [DMESG-WARN][10] ([i915#2411] / [i915#402]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-tgl-y/igt@gem_exec_suspend@basic-s3.html
* igt@i915_getparams_basic@basic-subslice-total:
- fi-tgl-y: [DMESG-WARN][12] ([i915#402]) -> [PASS][13] +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#3180]: https://gitlab.freedesktop.org/drm/intel/issues/3180
[i915#3278]: https://gitlab.freedesktop.org/drm/intel/issues/3278
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
Participating hosts (46 -> 42)
------------------------------
Additional (1): fi-kbl-soraka
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-icl-y fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9895 -> Patchwork_19853
CI-20190529: 20190529
CI_DRM_9895: bb187b1b292c637c3ef195f46d6e5c74f60df8f4 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6046: e76039273b1524147c43dba061756f06003d56ae @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19853: f3def8bf970adfbb4814c552041f791424d0a2f9 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
f3def8bf970a vfio/pci: Add support for opregion v2.1+
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/index.html
[-- Attachment #1.2: Type: text/html, Size: 5919 bytes --]
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion v2.0+ (rev5)
2021-03-29 7:12 ` Gao, Fred
2021-03-29 7:12 ` Zhenyu Wang
@ 2021-03-29 16:19 ` Vudum, Lakshminarayana
2021-03-29 16:22 ` Gao, Fred
1 sibling, 1 reply; 48+ messages in thread
From: Vudum, Lakshminarayana @ 2021-03-29 16:19 UTC (permalink / raw)
To: Gao, Fred, intel-gfx; +Cc: Wang, Zhenyu Z
Failure is reported. It's now showing as success.
-----Original Message-----
From: Gao, Fred <fred.gao@intel.com>
Sent: Monday, March 29, 2021 12:12 AM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
Cc: Wang, Zhenyu Z <zhenyu.z.wang@intel.com>
Subject: RE: ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion v2.0+ (rev5)
Hi, Lakshmi:
Can u help on this failure again,
the only difference between version 5& 4 is the comments.
Thanks in advance.
> -----Original Message-----
> From: Patchwork <patchwork@emeril.freedesktop.org>
> Sent: Friday, March 26, 2021 5:05 AM
> To: Gao, Fred <fred.gao@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion
> v2.0+
> (rev5)
>
> == Series Details ==
>
> Series: vfio/pci: Add support for opregion v2.0+ (rev5)
> URL : https://patchwork.freedesktop.org/series/84494/
> State : warning
>
> == Summary ==
>
> $ make htmldocs 2>&1 > /dev/null | grep i915
> ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function
> parameter or member 'ww' not described in 'i915_gem_shrink'
> ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess
> function parameter 'trampoline' description in 'intel_engine_cmd_parser'
> ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> parameter or member 'jump_whitelist' not described in
> 'intel_engine_cmd_parser'
> ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> parameter or member 'shadow_map' not described in
> 'intel_engine_cmd_parser'
> ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> parameter or member 'batch_map' not described in
> 'intel_engine_cmd_parser'
> ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess
> function parameter 'trampoline' description in 'intel_engine_cmd_parser'
> /home/cidrm/kernel/Documentation/gpu/i915:22: ./drivers/gpu/drm/i915/i
> ntel_runtime_pm.c:423: WARNING: Inline strong start-string without
> end- string.
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion v2.0+ (rev5)
2021-03-29 16:19 ` Vudum, Lakshminarayana
@ 2021-03-29 16:22 ` Gao, Fred
2021-03-29 16:35 ` Vudum, Lakshminarayana
0 siblings, 1 reply; 48+ messages in thread
From: Gao, Fred @ 2021-03-29 16:22 UTC (permalink / raw)
To: Vudum, Lakshminarayana, intel-gfx; +Cc: Wang, Zhenyu Z
Thanks for the quick help.
Test of Fi.CI.DOCS is still failed although we do not change any code in i915.
> -----Original Message-----
> From: Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
> Sent: Tuesday, March 30, 2021 12:20 AM
> To: Gao, Fred <fred.gao@intel.com>; intel-gfx@lists.freedesktop.org
> Cc: Wang, Zhenyu Z <zhenyu.z.wang@intel.com>
> Subject: RE: ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion
> v2.0+ (rev5)
>
> Failure is reported. It's now showing as success.
>
> -----Original Message-----
> From: Gao, Fred <fred.gao@intel.com>
> Sent: Monday, March 29, 2021 12:12 AM
> To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana
> <lakshminarayana.vudum@intel.com>
> Cc: Wang, Zhenyu Z <zhenyu.z.wang@intel.com>
> Subject: RE: ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion
> v2.0+ (rev5)
>
> Hi, Lakshmi:
>
> Can u help on this failure again,
> the only difference between version 5& 4 is the comments.
> Thanks in advance.
>
> > -----Original Message-----
> > From: Patchwork <patchwork@emeril.freedesktop.org>
> > Sent: Friday, March 26, 2021 5:05 AM
> > To: Gao, Fred <fred.gao@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org
> > Subject: ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion
> > v2.0+
> > (rev5)
> >
> > == Series Details ==
> >
> > Series: vfio/pci: Add support for opregion v2.0+ (rev5)
> > URL : https://patchwork.freedesktop.org/series/84494/
> > State : warning
> >
> > == Summary ==
> >
> > $ make htmldocs 2>&1 > /dev/null | grep i915
> > ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function
> > parameter or member 'ww' not described in 'i915_gem_shrink'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess
> > function parameter 'trampoline' description in 'intel_engine_cmd_parser'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> > parameter or member 'jump_whitelist' not described in
> > 'intel_engine_cmd_parser'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> > parameter or member 'shadow_map' not described in
> > 'intel_engine_cmd_parser'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> > parameter or member 'batch_map' not described in
> > 'intel_engine_cmd_parser'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess
> > function parameter 'trampoline' description in 'intel_engine_cmd_parser'
> >
> /home/cidrm/kernel/Documentation/gpu/i915:22: ./drivers/gpu/drm/i915/i
> > ntel_runtime_pm.c:423: WARNING: Inline strong start-string without
> > end- string.
> >
>
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion v2.0+ (rev5)
2021-03-29 16:22 ` Gao, Fred
@ 2021-03-29 16:35 ` Vudum, Lakshminarayana
0 siblings, 0 replies; 48+ messages in thread
From: Vudum, Lakshminarayana @ 2021-03-29 16:35 UTC (permalink / raw)
To: Gao, Fred, intel-gfx; +Cc: Wang, Zhenyu Z
That's a warning. For now, nothing we can do about that.
-----Original Message-----
From: Gao, Fred <fred.gao@intel.com>
Sent: Monday, March 29, 2021 9:23 AM
To: Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>; intel-gfx@lists.freedesktop.org
Cc: Wang, Zhenyu Z <zhenyu.z.wang@intel.com>
Subject: RE: ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion v2.0+ (rev5)
Thanks for the quick help.
Test of Fi.CI.DOCS is still failed although we do not change any code in i915.
> -----Original Message-----
> From: Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
> Sent: Tuesday, March 30, 2021 12:20 AM
> To: Gao, Fred <fred.gao@intel.com>; intel-gfx@lists.freedesktop.org
> Cc: Wang, Zhenyu Z <zhenyu.z.wang@intel.com>
> Subject: RE: ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for
> opregion v2.0+ (rev5)
>
> Failure is reported. It's now showing as success.
>
> -----Original Message-----
> From: Gao, Fred <fred.gao@intel.com>
> Sent: Monday, March 29, 2021 12:12 AM
> To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana
> <lakshminarayana.vudum@intel.com>
> Cc: Wang, Zhenyu Z <zhenyu.z.wang@intel.com>
> Subject: RE: ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for
> opregion v2.0+ (rev5)
>
> Hi, Lakshmi:
>
> Can u help on this failure again,
> the only difference between version 5& 4 is the comments.
> Thanks in advance.
>
> > -----Original Message-----
> > From: Patchwork <patchwork@emeril.freedesktop.org>
> > Sent: Friday, March 26, 2021 5:05 AM
> > To: Gao, Fred <fred.gao@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org
> > Subject: ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for
> > opregion v2.0+
> > (rev5)
> >
> > == Series Details ==
> >
> > Series: vfio/pci: Add support for opregion v2.0+ (rev5)
> > URL : https://patchwork.freedesktop.org/series/84494/
> > State : warning
> >
> > == Summary ==
> >
> > $ make htmldocs 2>&1 > /dev/null | grep i915
> > ./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning:
> > Function parameter or member 'ww' not described in 'i915_gem_shrink'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess
> > function parameter 'trampoline' description in 'intel_engine_cmd_parser'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> > parameter or member 'jump_whitelist' not described in
> > 'intel_engine_cmd_parser'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> > parameter or member 'shadow_map' not described in
> > 'intel_engine_cmd_parser'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function
> > parameter or member 'batch_map' not described in
> > 'intel_engine_cmd_parser'
> > ./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess
> > function parameter 'trampoline' description in 'intel_engine_cmd_parser'
> >
> /home/cidrm/kernel/Documentation/gpu/i915:22: ./drivers/gpu/drm/i915/i
> > ntel_runtime_pm.c:423: WARNING: Inline strong start-string without
> > end- string.
> >
>
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for vfio/pci: Add support for opregion v2.0+ (rev5)
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
` (15 preceding siblings ...)
(?)
@ 2021-03-29 18:35 ` Patchwork
-1 siblings, 0 replies; 48+ messages in thread
From: Patchwork @ 2021-03-29 18:35 UTC (permalink / raw)
To: Gao, Fred; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 30270 bytes --]
== Series Details ==
Series: vfio/pci: Add support for opregion v2.0+ (rev5)
URL : https://patchwork.freedesktop.org/series/84494/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9895_full -> Patchwork_19853_full
====================================================
Summary
-------
**WARNING**
Minor unknown changes coming with Patchwork_19853_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19853_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_19853_full:
### IGT changes ###
#### Warnings ####
* igt@prime_nv_api@i915_nv_double_export:
- shard-skl: [SKIP][1] ([fdo#109271]) -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-skl9/igt@prime_nv_api@i915_nv_double_export.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl1/igt@prime_nv_api@i915_nv_double_export.html
Known issues
------------
Here are the changes found in Patchwork_19853_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@legacy-engines-queued:
- shard-snb: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099]) +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-snb2/igt@gem_ctx_persistence@legacy-engines-queued.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][4] -> [TIMEOUT][5] ([i915#2369] / [i915#3063])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-tglb2/igt@gem_eio@unwedge-stress.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-tglb3/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-deadline:
- shard-apl: NOTRUN -> [FAIL][6] ([i915#2846])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl2/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-iclb: NOTRUN -> [FAIL][7] ([i915#2842])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@gem_exec_fair@basic-none-rrul@rcs0.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-kbl: NOTRUN -> [FAIL][8] ([i915#2842])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl4/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none@rcs0:
- shard-glk: [PASS][9] -> [FAIL][10] ([i915#2842]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-glk5/igt@gem_exec_fair@basic-none@rcs0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-glk1/igt@gem_exec_fair@basic-none@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl: [PASS][11] -> [FAIL][12] ([i915#2842]) +4 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-kbl6/igt@gem_exec_fair@basic-none@vcs0.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl7/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-tglb: [PASS][13] -> [FAIL][14] ([i915#2842])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-tglb5/igt@gem_exec_fair@basic-pace@rcs0.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-tglb5/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][15] -> [FAIL][16] ([i915#2849])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_params@no-bsd:
- shard-iclb: NOTRUN -> [SKIP][17] ([fdo#109283])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@gem_exec_params@no-bsd.html
* igt@gem_exec_reloc@basic-many-active@vcs1:
- shard-iclb: NOTRUN -> [FAIL][18] ([i915#2389])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb2/igt@gem_exec_reloc@basic-many-active@vcs1.html
* igt@gem_exec_reloc@basic-parallel:
- shard-kbl: NOTRUN -> [TIMEOUT][19] ([i915#3183])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl1/igt@gem_exec_reloc@basic-parallel.html
* igt@gem_exec_reloc@basic-wide-active@rcs0:
- shard-snb: NOTRUN -> [FAIL][20] ([i915#2389]) +2 similar issues
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-snb2/igt@gem_exec_reloc@basic-wide-active@rcs0.html
* igt@gem_mmap_gtt@cpuset-big-copy-xy:
- shard-iclb: [PASS][21] -> [FAIL][22] ([i915#307])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-iclb6/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb6/igt@gem_mmap_gtt@cpuset-big-copy-xy.html
* igt@gem_pread@exhaustion:
- shard-apl: NOTRUN -> [WARN][23] ([i915#2658])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl2/igt@gem_pread@exhaustion.html
* igt@gem_pwrite@basic-exhaustion:
- shard-skl: NOTRUN -> [WARN][24] ([i915#2658])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl8/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-kbl: NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#3323])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl2/igt@gem_userptr_blits@dmabuf-sync.html
- shard-skl: NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#3323])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl8/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gen9_exec_parse@batch-invalid-length:
- shard-snb: NOTRUN -> [SKIP][27] ([fdo#109271]) +111 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-snb2/igt@gen9_exec_parse@batch-invalid-length.html
* igt@gen9_exec_parse@bb-large:
- shard-apl: NOTRUN -> [FAIL][28] ([i915#3296])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl3/igt@gen9_exec_parse@bb-large.html
* igt@gen9_exec_parse@secure-batches:
- shard-iclb: NOTRUN -> [SKIP][29] ([fdo#112306])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@gen9_exec_parse@secure-batches.html
* igt@i915_pm_dc@dc6-dpms:
- shard-skl: NOTRUN -> [FAIL][30] ([i915#454])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl4/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp:
- shard-apl: NOTRUN -> [SKIP][31] ([fdo#109271] / [i915#1937])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl2/igt@i915_pm_lpsp@kms-lpsp@kms-lpsp-dp.html
* igt@kms_async_flips@test-time-stamp:
- shard-tglb: [PASS][32] -> [FAIL][33] ([i915#2597])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-tglb7/igt@kms_async_flips@test-time-stamp.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-tglb7/igt@kms_async_flips@test-time-stamp.html
* igt@kms_atomic_transition@plane-all-transition-nonblocking@dp-1-pipe-b:
- shard-kbl: [PASS][34] -> [FAIL][35] ([i915#3168])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-kbl1/igt@kms_atomic_transition@plane-all-transition-nonblocking@dp-1-pipe-b.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl3/igt@kms_atomic_transition@plane-all-transition-nonblocking@dp-1-pipe-b.html
* igt@kms_ccs@pipe-c-ccs-on-another-bo:
- shard-skl: NOTRUN -> [SKIP][36] ([fdo#109271] / [fdo#111304])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl4/igt@kms_ccs@pipe-c-ccs-on-another-bo.html
* igt@kms_chamelium@dp-hpd-storm:
- shard-iclb: NOTRUN -> [SKIP][37] ([fdo#109284] / [fdo#111827]) +2 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@kms_chamelium@dp-hpd-storm.html
* igt@kms_chamelium@dp-mode-timings:
- shard-apl: NOTRUN -> [SKIP][38] ([fdo#109271] / [fdo#111827]) +26 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl2/igt@kms_chamelium@dp-mode-timings.html
* igt@kms_chamelium@hdmi-hpd-storm:
- shard-kbl: NOTRUN -> [SKIP][39] ([fdo#109271] / [fdo#111827]) +12 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl7/igt@kms_chamelium@hdmi-hpd-storm.html
* igt@kms_chamelium@hdmi-mode-timings:
- shard-snb: NOTRUN -> [SKIP][40] ([fdo#109271] / [fdo#111827]) +7 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-snb6/igt@kms_chamelium@hdmi-mode-timings.html
* igt@kms_color_chamelium@pipe-d-ctm-0-25:
- shard-skl: NOTRUN -> [SKIP][41] ([fdo#109271] / [fdo#111827]) +9 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl7/igt@kms_color_chamelium@pipe-d-ctm-0-25.html
* igt@kms_content_protection@legacy:
- shard-kbl: NOTRUN -> [TIMEOUT][42] ([i915#1319]) +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl7/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@lic:
- shard-apl: NOTRUN -> [TIMEOUT][43] ([i915#1319])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl2/igt@kms_content_protection@lic.html
* igt@kms_cursor_crc@pipe-d-cursor-256x256-onscreen:
- shard-kbl: NOTRUN -> [SKIP][44] ([fdo#109271]) +123 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl2/igt@kms_cursor_crc@pipe-d-cursor-256x256-onscreen.html
* igt@kms_cursor_crc@pipe-d-cursor-64x64-rapid-movement:
- shard-iclb: NOTRUN -> [SKIP][45] ([fdo#109278]) +1 similar issue
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@kms_cursor_crc@pipe-d-cursor-64x64-rapid-movement.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
- shard-iclb: NOTRUN -> [SKIP][46] ([fdo#109274] / [fdo#109278])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: NOTRUN -> [FAIL][47] ([i915#2346])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled:
- shard-skl: NOTRUN -> [FAIL][48] ([i915#52] / [i915#54]) +1 similar issue
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl8/igt@kms_draw_crc@draw-method-xrgb8888-render-ytiled.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: NOTRUN -> [INCOMPLETE][49] ([i915#155] / [i915#180] / [i915#636])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl2/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-iclb: NOTRUN -> [SKIP][50] ([fdo#109274]) +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@kms_flip@2x-blocking-wf_vblank.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
- shard-skl: NOTRUN -> [FAIL][51] ([i915#79])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-tglb: [PASS][52] -> [FAIL][53] ([i915#2598])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-tglb1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-tglb2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@flip-vs-suspend@b-dp1:
- shard-apl: [PASS][54] -> [DMESG-WARN][55] ([i915#180]) +1 similar issue
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-apl1/igt@kms_flip@flip-vs-suspend@b-dp1.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl1/igt@kms_flip@flip-vs-suspend@b-dp1.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-kbl: [PASS][56] -> [DMESG-WARN][57] ([i915#180]) +3 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-kbl7/igt@kms_flip@flip-vs-suspend@c-dp1.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl3/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1:
- shard-skl: [PASS][58] -> [FAIL][59] ([i915#2122]) +1 similar issue
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-skl5/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl9/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs:
- shard-tglb: NOTRUN -> [SKIP][60] ([i915#2587])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-tglb8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs:
- shard-kbl: NOTRUN -> [SKIP][61] ([fdo#109271] / [i915#2672])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile:
- shard-apl: NOTRUN -> [FAIL][62] ([i915#2641])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc:
- shard-tglb: NOTRUN -> [SKIP][63] ([fdo#111825]) +4 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render:
- shard-iclb: NOTRUN -> [SKIP][64] ([fdo#109280]) +5 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-cpu:
- shard-skl: NOTRUN -> [SKIP][65] ([fdo#109271]) +100 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-cpu.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [PASS][66] -> [FAIL][67] ([i915#1188])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-skl10/igt@kms_hdr@bpc-switch.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl6/igt@kms_hdr@bpc-switch.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: NOTRUN -> [FAIL][68] ([i915#1188])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl8/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_hdr@static-toggle-dpms:
- shard-iclb: NOTRUN -> [SKIP][69] ([i915#1187])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- shard-apl: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#533]) +2 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl8/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d:
- shard-skl: NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#533])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl7/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d:
- shard-kbl: NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#533]) +1 similar issue
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl1/igt@kms_pipe_crc_basic@read-crc-pipe-d.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-apl: NOTRUN -> [FAIL][73] ([fdo#108145] / [i915#265]) +1 similar issue
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl8/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: NOTRUN -> [FAIL][74] ([fdo#108145] / [i915#265]) +2 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
- shard-kbl: NOTRUN -> [FAIL][75] ([fdo#108145] / [i915#265])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
- shard-kbl: NOTRUN -> [FAIL][76] ([i915#265])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl7/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
* igt@kms_prime@basic-crc@first-to-second:
- shard-iclb: NOTRUN -> [SKIP][77] ([i915#1836])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@kms_prime@basic-crc@first-to-second.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1:
- shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#658]) +5 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl3/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-1.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
- shard-kbl: NOTRUN -> [SKIP][79] ([fdo#109271] / [i915#658]) +2 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl6/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3:
- shard-skl: NOTRUN -> [SKIP][80] ([fdo#109271] / [i915#658]) +1 similar issue
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl8/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area-3.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [PASS][81] -> [SKIP][82] ([fdo#109441]) +2 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb8/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_psr@suspend:
- shard-skl: [PASS][83] -> [INCOMPLETE][84] ([i915#198]) +1 similar issue
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-skl7/igt@kms_psr@suspend.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl9/igt@kms_psr@suspend.html
* igt@kms_vblank@pipe-d-wait-forked-hang:
- shard-apl: NOTRUN -> [SKIP][85] ([fdo#109271]) +233 similar issues
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl3/igt@kms_vblank@pipe-d-wait-forked-hang.html
* igt@kms_writeback@writeback-fb-id:
- shard-skl: NOTRUN -> [SKIP][86] ([fdo#109271] / [i915#2437])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl4/igt@kms_writeback@writeback-fb-id.html
* igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame:
- shard-iclb: NOTRUN -> [SKIP][87] ([i915#2530])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame.html
* igt@nouveau_crc@pipe-d-source-outp-inactive:
- shard-iclb: NOTRUN -> [SKIP][88] ([fdo#109278] / [i915#2530])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@nouveau_crc@pipe-d-source-outp-inactive.html
* igt@prime_nv_api@i915_nv_import_vs_close:
- shard-tglb: NOTRUN -> [SKIP][89] ([fdo#109291])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-tglb8/igt@prime_nv_api@i915_nv_import_vs_close.html
- shard-iclb: NOTRUN -> [SKIP][90] ([fdo#109291])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@prime_nv_api@i915_nv_import_vs_close.html
* igt@sysfs_clients@create:
- shard-skl: NOTRUN -> [SKIP][91] ([fdo#109271] / [i915#2994])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl4/igt@sysfs_clients@create.html
* igt@sysfs_clients@pidname:
- shard-kbl: NOTRUN -> [SKIP][92] ([fdo#109271] / [i915#2994])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl1/igt@sysfs_clients@pidname.html
* igt@sysfs_clients@split-10:
- shard-iclb: NOTRUN -> [SKIP][93] ([i915#2994])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@sysfs_clients@split-10.html
* igt@sysfs_clients@split-25:
- shard-apl: NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2994])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl8/igt@sysfs_clients@split-25.html
#### Possible fixes ####
* igt@gem_ctx_isolation@preservation-s3@bcs0:
- shard-skl: [INCOMPLETE][95] ([i915#198]) -> [PASS][96]
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-skl9/igt@gem_ctx_isolation@preservation-s3@bcs0.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl4/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* igt@gem_eio@in-flight-10ms:
- shard-skl: [TIMEOUT][97] ([i915#2502]) -> [PASS][98]
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-skl8/igt@gem_eio@in-flight-10ms.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl7/igt@gem_eio@in-flight-10ms.html
* igt@gem_eio@in-flight-contexts-10ms:
- shard-tglb: [TIMEOUT][99] ([i915#3063]) -> [PASS][100]
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-tglb8/igt@gem_eio@in-flight-contexts-10ms.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-tglb6/igt@gem_eio@in-flight-contexts-10ms.html
* igt@gem_eio@in-flight-contexts-immediate:
- shard-skl: [TIMEOUT][101] ([i915#3063]) -> [PASS][102]
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-skl2/igt@gem_eio@in-flight-contexts-immediate.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl4/igt@gem_eio@in-flight-contexts-immediate.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [FAIL][103] ([i915#2842]) -> [PASS][104] +2 similar issues
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-tglb6/igt@gem_exec_fair@basic-pace-share@rcs0.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-tglb8/igt@gem_exec_fair@basic-pace-share@rcs0.html
- shard-glk: [FAIL][105] ([i915#2842]) -> [PASS][106]
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-glk7/igt@gem_exec_fair@basic-pace-share@rcs0.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-glk7/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs0:
- shard-kbl: [FAIL][107] ([i915#2842]) -> [PASS][108]
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs0.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl4/igt@gem_exec_fair@basic-pace@vcs0.html
* igt@gem_exec_whisper@basic-queues-forked-all:
- shard-iclb: [INCOMPLETE][109] ([i915#1895]) -> [PASS][110]
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-iclb4/igt@gem_exec_whisper@basic-queues-forked-all.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@gem_exec_whisper@basic-queues-forked-all.html
* igt@gem_mmap_gtt@cpuset-big-copy-odd:
- shard-iclb: [FAIL][111] ([i915#2428]) -> [PASS][112]
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-iclb1/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb8/igt@gem_mmap_gtt@cpuset-big-copy-odd.html
* igt@gem_mmap_gtt@cpuset-medium-copy-odd:
- shard-iclb: [FAIL][113] ([i915#307]) -> [PASS][114]
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-iclb6/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [DMESG-WARN][115] ([i915#1436] / [i915#716]) -> [PASS][116]
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-skl4/igt@gen9_exec_parse@allowed-single.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl8/igt@gen9_exec_parse@allowed-single.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- shard-skl: [DMESG-WARN][117] ([i915#1982]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-skl9/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-skl8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled:
- shard-glk: [FAIL][119] ([i915#52] / [i915#54]) -> [PASS][120]
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-glk9/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-glk2/igt@kms_draw_crc@draw-method-rgb565-mmap-gtt-ytiled.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][121] ([i915#79]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank@ac-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-apl: [DMESG-WARN][123] ([i915#180]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-apl1/igt@kms_flip@flip-vs-suspend@c-dp1.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl1/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [DMESG-WARN][125] ([i915#180]) -> [PASS][126] +4 similar issues
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-kbl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_psr@psr2_sprite_render:
- shard-iclb: [SKIP][127] ([fdo#109441]) -> [PASS][128] +1 similar issue
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-iclb7/igt@kms_psr@psr2_sprite_render.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
* igt@prime_vgem@sync@rcs0:
- shard-tglb: [INCOMPLETE][129] ([i915#409]) -> [PASS][130]
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-tglb2/igt@prime_vgem@sync@rcs0.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-tglb8/igt@prime_vgem@sync@rcs0.html
#### Warnings ####
* igt@gem_userptr_blits@dmabuf-sync:
- shard-apl: [SKIP][131] ([fdo#109271]) -> [SKIP][132] ([fdo#109271] / [i915#3323])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-apl1/igt@gem_userptr_blits@dmabuf-sync.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-apl2/igt@gem_userptr_blits@dmabuf-sync.html
- shard-glk: [SKIP][133] ([fdo#109271]) -> [SKIP][134] ([fdo#109271] / [i915#3323])
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-glk7/igt@gem_userptr_blits@dmabuf-sync.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-glk7/igt@gem_userptr_blits@dmabuf-sync.html
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][135] ([i915#1804] / [i915#2684]) -> [WARN][136] ([i915#2681] / [i915#2684])
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-iclb6/igt@i915_pm_rc6_residency@rc6-fence.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb1/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-tglb: [WARN][137] ([i915#2681] / [i915#2684]) -> [FAIL][138] ([i915#2681] / [i915#2692])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-tglb6/igt@i915_pm_rc6_residency@rc6-idle.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-tglb2/igt@i915_pm_rc6_residency@rc6-idle.html
- shard-iclb: [WARN][139] ([i915#2684]) -> [WARN][140] ([i915#1804] / [i915#2684])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9895/shard-iclb2/igt@i915_pm_rc6_residency@rc6-idle.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/shard-iclb7/igt@i915_pm_rc6_residency@rc6-idl
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19853/index.html
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_______________________________________________
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^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [PATCH v5] vfio/pci: Add support for opregion v2.1+
2021-03-25 17:09 ` [Intel-gfx] " Fred Gao
@ 2021-03-30 9:08 ` Zhenyu Wang
-1 siblings, 0 replies; 48+ messages in thread
From: Zhenyu Wang @ 2021-03-30 9:08 UTC (permalink / raw)
To: Alex Williamson; +Cc: kvm, intel-gfx, Swee Yee Fonn
[-- Attachment #1: Type: text/plain, Size: 3910 bytes --]
On 2021.03.26 01:09:53 +0800, Fred Gao wrote:
> Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
> but when VBT data exceeds 6KB size and cannot be within mailbox #4
> then from opregion v2.0+, Extended VBT region, next to opregion is
> used to hold the VBT data, so the total size will be opregion size plus
> extended VBT region size.
>
> Since opregion v2.0 with physical host VBT address would not be
> practically available for end user and guest can not directly access
> host physical address, so it is not supported.
>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> Signed-off-by: Fred Gao <fred.gao@intel.com>
> ---
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Hi, Alex, pls let us know if you have other concern to merge this one.
Thanks!
> drivers/vfio/pci/vfio_pci_igd.c | 53 +++++++++++++++++++++++++++++++++
> 1 file changed, 53 insertions(+)
>
> diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
> index e66dfb0178ed..228df565e9bc 100644
> --- a/drivers/vfio/pci/vfio_pci_igd.c
> +++ b/drivers/vfio/pci/vfio_pci_igd.c
> @@ -21,6 +21,10 @@
> #define OPREGION_SIZE (8 * 1024)
> #define OPREGION_PCI_ADDR 0xfc
>
> +#define OPREGION_RVDA 0x3ba
> +#define OPREGION_RVDS 0x3c2
> +#define OPREGION_VERSION 0x16
> +
> static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
> size_t count, loff_t *ppos, bool iswrite)
> {
> @@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> u32 addr, size;
> void *base;
> int ret;
> + u16 version;
>
> ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
> if (ret)
> @@ -83,6 +88,54 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
>
> size *= 1024; /* In KB */
>
> + /*
> + * Support opregion v2.1+
> + * When VBT data exceeds 6KB size and cannot be within mailbox #4, then
> + * the Extended VBT region next to opregion is used to hold the VBT data.
> + * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
> + * (Raw VBT Data Size) from opregion structure member are used to hold the
> + * address from region base and size of VBT data. RVDA/RVDS are not
> + * defined before opregion 2.0.
> + *
> + * opregion 2.1+: RVDA is unsigned, relative offset from
> + * opregion base, and should point to the end of opregion.
> + * otherwise, exposing to userspace to allow read access to everything between
> + * the OpRegion and VBT is not safe.
> + * RVDS is defined as size in bytes.
> + *
> + * opregion 2.0: rvda is the physical VBT address.
> + * Since rvda is HPA it cannot be directly used in guest.
> + * And it should not be practically available for end user,so it is not supported.
> + */
> + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> + if (version >= 0x0200) {
> + u64 rvda;
> + u32 rvds;
> +
> + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
> + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
> + if (rvda && rvds) {
> + /* no support for opregion v2.0 with physical VBT address */
> + if (version == 0x0200) {
> + memunmap(base);
> + pci_err(vdev->pdev,
> + "IGD assignment does not support opregion v2.0 with an extended VBT region\n");
> + return -EINVAL;
> + }
> +
> + if (rvda != size) {
> + memunmap(base);
> + pci_err(vdev->pdev,
> + "Extended VBT does not follow opregion on version 0x%04x\n",
> + version);
> + return -EINVAL;
> + }
> +
> + /* region size for opregion v2.0+: opregion and VBT size. */
> + size += rvds;
> + }
> + }
> +
> if (size != OPREGION_SIZE) {
> memunmap(base);
> base = memremap(addr, size, MEMREMAP_WB);
> --
> 2.24.1.1.gb6d4d82bd5
>
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^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] [PATCH v5] vfio/pci: Add support for opregion v2.1+
@ 2021-03-30 9:08 ` Zhenyu Wang
0 siblings, 0 replies; 48+ messages in thread
From: Zhenyu Wang @ 2021-03-30 9:08 UTC (permalink / raw)
To: Alex Williamson; +Cc: intel-gfx, Swee Yee Fonn, kvm
[-- Attachment #1.1: Type: text/plain, Size: 3910 bytes --]
On 2021.03.26 01:09:53 +0800, Fred Gao wrote:
> Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
> but when VBT data exceeds 6KB size and cannot be within mailbox #4
> then from opregion v2.0+, Extended VBT region, next to opregion is
> used to hold the VBT data, so the total size will be opregion size plus
> extended VBT region size.
>
> Since opregion v2.0 with physical host VBT address would not be
> practically available for end user and guest can not directly access
> host physical address, so it is not supported.
>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> Signed-off-by: Fred Gao <fred.gao@intel.com>
> ---
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Hi, Alex, pls let us know if you have other concern to merge this one.
Thanks!
> drivers/vfio/pci/vfio_pci_igd.c | 53 +++++++++++++++++++++++++++++++++
> 1 file changed, 53 insertions(+)
>
> diff --git a/drivers/vfio/pci/vfio_pci_igd.c b/drivers/vfio/pci/vfio_pci_igd.c
> index e66dfb0178ed..228df565e9bc 100644
> --- a/drivers/vfio/pci/vfio_pci_igd.c
> +++ b/drivers/vfio/pci/vfio_pci_igd.c
> @@ -21,6 +21,10 @@
> #define OPREGION_SIZE (8 * 1024)
> #define OPREGION_PCI_ADDR 0xfc
>
> +#define OPREGION_RVDA 0x3ba
> +#define OPREGION_RVDS 0x3c2
> +#define OPREGION_VERSION 0x16
> +
> static size_t vfio_pci_igd_rw(struct vfio_pci_device *vdev, char __user *buf,
> size_t count, loff_t *ppos, bool iswrite)
> {
> @@ -58,6 +62,7 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
> u32 addr, size;
> void *base;
> int ret;
> + u16 version;
>
> ret = pci_read_config_dword(vdev->pdev, OPREGION_PCI_ADDR, &addr);
> if (ret)
> @@ -83,6 +88,54 @@ static int vfio_pci_igd_opregion_init(struct vfio_pci_device *vdev)
>
> size *= 1024; /* In KB */
>
> + /*
> + * Support opregion v2.1+
> + * When VBT data exceeds 6KB size and cannot be within mailbox #4, then
> + * the Extended VBT region next to opregion is used to hold the VBT data.
> + * RVDA (Relative Address of VBT Data from Opregion Base) and RVDS
> + * (Raw VBT Data Size) from opregion structure member are used to hold the
> + * address from region base and size of VBT data. RVDA/RVDS are not
> + * defined before opregion 2.0.
> + *
> + * opregion 2.1+: RVDA is unsigned, relative offset from
> + * opregion base, and should point to the end of opregion.
> + * otherwise, exposing to userspace to allow read access to everything between
> + * the OpRegion and VBT is not safe.
> + * RVDS is defined as size in bytes.
> + *
> + * opregion 2.0: rvda is the physical VBT address.
> + * Since rvda is HPA it cannot be directly used in guest.
> + * And it should not be practically available for end user,so it is not supported.
> + */
> + version = le16_to_cpu(*(__le16 *)(base + OPREGION_VERSION));
> + if (version >= 0x0200) {
> + u64 rvda;
> + u32 rvds;
> +
> + rvda = le64_to_cpu(*(__le64 *)(base + OPREGION_RVDA));
> + rvds = le32_to_cpu(*(__le32 *)(base + OPREGION_RVDS));
> + if (rvda && rvds) {
> + /* no support for opregion v2.0 with physical VBT address */
> + if (version == 0x0200) {
> + memunmap(base);
> + pci_err(vdev->pdev,
> + "IGD assignment does not support opregion v2.0 with an extended VBT region\n");
> + return -EINVAL;
> + }
> +
> + if (rvda != size) {
> + memunmap(base);
> + pci_err(vdev->pdev,
> + "Extended VBT does not follow opregion on version 0x%04x\n",
> + version);
> + return -EINVAL;
> + }
> +
> + /* region size for opregion v2.0+: opregion and VBT size. */
> + size += rvds;
> + }
> + }
> +
> if (size != OPREGION_SIZE) {
> memunmap(base);
> base = memremap(addr, size, MEMREMAP_WB);
> --
> 2.24.1.1.gb6d4d82bd5
>
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [PATCH v5] vfio/pci: Add support for opregion v2.1+
2021-03-25 17:09 ` [Intel-gfx] " Fred Gao
@ 2021-04-06 19:37 ` Alex Williamson
-1 siblings, 0 replies; 48+ messages in thread
From: Alex Williamson @ 2021-04-06 19:37 UTC (permalink / raw)
To: Fred Gao; +Cc: kvm, intel-gfx, Zhenyu Wang, Swee Yee Fonn
On Fri, 26 Mar 2021 01:09:53 +0800
Fred Gao <fred.gao@intel.com> wrote:
> Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
> but when VBT data exceeds 6KB size and cannot be within mailbox #4
> then from opregion v2.0+, Extended VBT region, next to opregion is
> used to hold the VBT data, so the total size will be opregion size plus
> extended VBT region size.
>
> Since opregion v2.0 with physical host VBT address would not be
> practically available for end user and guest can not directly access
> host physical address, so it is not supported.
>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> Signed-off-by: Fred Gao <fred.gao@intel.com>
> ---
> drivers/vfio/pci/vfio_pci_igd.c | 53 +++++++++++++++++++++++++++++++++
> 1 file changed, 53 insertions(+)
Applied to vfio next branch for v5.13. Thanks,
Alex
^ permalink raw reply [flat|nested] 48+ messages in thread
* Re: [Intel-gfx] [PATCH v5] vfio/pci: Add support for opregion v2.1+
@ 2021-04-06 19:37 ` Alex Williamson
0 siblings, 0 replies; 48+ messages in thread
From: Alex Williamson @ 2021-04-06 19:37 UTC (permalink / raw)
To: Fred Gao; +Cc: Swee Yee Fonn, intel-gfx, kvm
On Fri, 26 Mar 2021 01:09:53 +0800
Fred Gao <fred.gao@intel.com> wrote:
> Before opregion version 2.0 VBT data is stored in opregion mailbox #4,
> but when VBT data exceeds 6KB size and cannot be within mailbox #4
> then from opregion v2.0+, Extended VBT region, next to opregion is
> used to hold the VBT data, so the total size will be opregion size plus
> extended VBT region size.
>
> Since opregion v2.0 with physical host VBT address would not be
> practically available for end user and guest can not directly access
> host physical address, so it is not supported.
>
> Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
> Signed-off-by: Swee Yee Fonn <swee.yee.fonn@intel.com>
> Signed-off-by: Fred Gao <fred.gao@intel.com>
> ---
> drivers/vfio/pci/vfio_pci_igd.c | 53 +++++++++++++++++++++++++++++++++
> 1 file changed, 53 insertions(+)
Applied to vfio next branch for v5.13. Thanks,
Alex
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 48+ messages in thread
end of thread, other threads:[~2021-04-06 19:37 UTC | newest]
Thread overview: 48+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-12-02 17:12 [PATCH v1] vfio/pci: Add support for opregion v2.0+ Fred Gao
2020-12-02 17:12 ` [Intel-gfx] " Fred Gao
2020-12-02 10:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2020-12-02 10:35 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-12-02 12:06 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-12-02 18:57 ` [PATCH v1] " Alex Williamson
2020-12-02 18:57 ` [Intel-gfx] " Alex Williamson
2020-12-03 9:21 ` Gao, Fred
2020-12-03 9:21 ` [Intel-gfx] " Gao, Fred
2020-12-03 23:38 ` Alex Williamson
2020-12-03 23:38 ` [Intel-gfx] " Alex Williamson
2021-01-18 5:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for vfio/pci: Add support for opregion v2.0+ (rev2) Patchwork
2021-01-18 5:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-01-18 12:38 ` [PATCH v2] vfio/pci: Add support for opregion v2.0+ Fred Gao
2021-01-18 12:38 ` [Intel-gfx] " Fred Gao
2021-01-21 20:33 ` Alex Williamson
2021-01-21 20:33 ` [Intel-gfx] " Alex Williamson
2021-02-02 5:09 ` Zhenyu Wang
2021-02-02 5:09 ` [Intel-gfx] " Zhenyu Wang
2021-02-08 17:02 ` [PATCH v3] vfio/pci: Add support for opregion v2.1+ Fred Gao
2021-02-08 17:02 ` [Intel-gfx] " Fred Gao
2021-03-02 13:02 ` [PATCH v4] " Fred Gao
2021-03-02 13:02 ` [Intel-gfx] " Fred Gao
2021-03-19 19:26 ` Alex Williamson
2021-03-19 19:26 ` [Intel-gfx] " Alex Williamson
2021-03-25 8:50 ` Gao, Fred
2021-03-25 8:50 ` [Intel-gfx] " Gao, Fred
2021-03-25 17:09 ` [PATCH v5] " Fred Gao
2021-03-25 17:09 ` [Intel-gfx] " Fred Gao
2021-03-30 9:08 ` Zhenyu Wang
2021-03-30 9:08 ` [Intel-gfx] " Zhenyu Wang
2021-04-06 19:37 ` Alex Williamson
2021-04-06 19:37 ` [Intel-gfx] " Alex Williamson
2021-02-08 9:22 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for vfio/pci: Add support for opregion v2.0+ (rev3) Patchwork
2021-02-08 9:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-03-02 6:49 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for vfio/pci: Add support for opregion v2.0+ (rev4) Patchwork
2021-03-02 12:47 ` Gao, Fred
2021-03-02 6:55 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2021-03-02 17:09 ` [Intel-gfx] ✓ Fi.CI.BAT: " Patchwork
2021-03-25 21:05 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for vfio/pci: Add support for opregion v2.0+ (rev5) Patchwork
2021-03-29 7:12 ` Gao, Fred
2021-03-29 7:12 ` Zhenyu Wang
2021-03-29 16:19 ` Vudum, Lakshminarayana
2021-03-29 16:22 ` Gao, Fred
2021-03-29 16:35 ` Vudum, Lakshminarayana
2021-03-25 21:31 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-03-29 15:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-03-29 18:35 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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