* [PATCH V1] arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card
@ 2021-03-09 19:18 Shaik Sajida Bhanu
2021-03-09 20:02 ` Bjorn Andersson
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Shaik Sajida Bhanu @ 2021-03-09 19:18 UTC (permalink / raw)
To: adrian.hunter, ulf.hansson, robh+dt, sartgarg
Cc: asutoshd, stummala, vbadigan, rampraka, sayalil, rnayak,
saiprakash.ranjan, sibis, cang, pragalla, nitirawa, linux-mmc,
linux-kernel, linux-arm-msm, devicetree, agross, bjorn.andersson,
Shaik Sajida Bhanu
Add nodes for eMMC and SD card on sc7280.
Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
---
This change is depends on the below patch series:
https://lore.kernel.org/lkml/1613114930-1661-1-git-send-email-rnayak@codeaurora.org/
https://lore.kernel.org/patchwork/project/lkml/list/?series=&submitter=28035&state=&q=&archive=&delegate=
---
arch/arm64/boot/dts/qcom/sc7280-idp.dts | 26 +++++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 170 ++++++++++++++++++++++++++++++++
2 files changed, 196 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
index ac79420..6abb2aa 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
@@ -8,6 +8,7 @@
/dts-v1/;
#include "sc7280.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Qualcomm Technologies, Inc. SC7280 IDP platform";
@@ -256,3 +257,28 @@
bias-pull-up;
};
};
+
+&sdhc_1 {
+ status = "okay";
+
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&sdc1_on>;
+ pinctrl-1 = <&sdc1_off>;
+
+ vmmc-supply = <&vreg_l7b_2p9>;
+ vqmmc-supply = <&vreg_l19b_1p8>;
+
+};
+
+&sdhc_2 {
+ status = "okay";
+
+ pinctrl-names = "default","sleep";
+ pinctrl-0 = <&sdc2_on>;
+ pinctrl-1 = <&sdc2_off>;
+
+ vmmc-supply = <&vreg_l9c_2p9>;
+ vqmmc-supply = <&vreg_l6c_2p9>;
+
+ cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
+};
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 3b86052..91fb18a 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -18,6 +18,11 @@
chosen { };
+ aliases {
+ mmc1 = &sdhc_1;
+ mmc2 = &sdhc_2;
+ };
+
clocks {
xo_board: xo-board {
compatible = "fixed-clock";
@@ -315,6 +320,69 @@
#power-domain-cells = <1>;
};
+ sdhc_1: sdhci@7c4000 {
+ compatible = "qcom,sdhci-msm-v5";
+ reg = <0 0x7c4000 0 0x1000>,
+ <0 0x7c5000 0 0x1000>;
+ reg-names = "hc", "cqhci";
+
+ iommus = <&apps_smmu 0xC0 0x0>;
+ interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+
+ clocks = <&gcc GCC_SDCC1_APPS_CLK>,
+ <&gcc GCC_SDCC1_AHB_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "core", "iface", "xo";
+
+ bus-width = <8>;
+ non-removable;
+ supports-cqe;
+ no-sd;
+ no-sdio;
+
+ max-frequency = <192000000>;
+
+ qcom,dll-config = <0x0007642c>;
+ qcom,ddr-config = <0x80040868>;
+
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+
+ status = "disabled";
+
+ };
+
+ sdhc_2: sdhci@8804000 {
+ compatible = "qcom,sdhci-msm-v5";
+ reg = <0 0x08804000 0 0x1000>;
+
+ iommus = <&apps_smmu 0x100 0x0>;
+ interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "hc_irq", "pwr_irq";
+
+ clocks = <&gcc GCC_SDCC2_APPS_CLK>,
+ <&gcc GCC_SDCC2_AHB_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "core", "iface", "xo";
+
+ bus-width = <4>;
+
+ no-mmc;
+ no-sdio;
+
+ max-frequency = <202000000>;
+
+ qcom,dll-config = <0x0007642c>;
+
+ status = "disabled";
+
+ };
+
qupv3_id_0: geniqup@9c0000 {
compatible = "qcom,geni-se-qup";
reg = <0 0x009c0000 0 0x2000>;
@@ -385,6 +453,108 @@
pins = "gpio46", "gpio47";
function = "qup13";
};
+
+ sdc1_on: sdc1-on {
+ pinconf-clk {
+ pins = "sdc1_clk";
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ pinconf-cmd {
+ pins = "sdc1_cmd";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ pinconf-data {
+ pins = "sdc1_data";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ pinconf-rclk {
+ pins = "sdc1_rclk";
+ bias-pull-down;
+ };
+ };
+
+ sdc1_off: sdc1-off {
+ pinconf-clk {
+ pins = "sdc1_clk";
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ pinconf-cmd {
+ pins = "sdc1_cmd";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+
+ pinconf-data {
+ pins = "sdc1_data";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+
+ pinconf-rclk {
+ pins = "sdc1_rclk";
+ bias-pull-down;
+ };
+ };
+
+ sdc2_on: sdc2-on {
+ pinconf-clk {
+ pins = "sdc2_clk";
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ pinconf-cmd {
+ pins = "sdc2_cmd";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ pinconf-data {
+ pins = "sdc2_data";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ pinconf-sd-cd {
+ pins = "gpio91";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+ };
+
+ sdc2_off: sdc2-off {
+ pinconf-clk {
+ pins = "sdc2_clk";
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ pinconf-cmd {
+ pins = "sdc2_cmd";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+
+ pinconf-data {
+ pins = "sdc2_data";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+
+ pinconf-sd-cd {
+ pins = "gpio91";
+ bias-disable;
+ drive-strength = <2>;
+ };
+ };
};
apps_smmu: iommu@15000000 {
--
2.7.4
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH V1] arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card
2021-03-09 19:18 [PATCH V1] arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card Shaik Sajida Bhanu
@ 2021-03-09 20:02 ` Bjorn Andersson
2021-03-10 13:47 ` sbhanu
2021-03-09 20:50 ` Konrad Dybcio
2021-03-10 4:48 ` Veerabhadrarao Badiganti
2 siblings, 1 reply; 8+ messages in thread
From: Bjorn Andersson @ 2021-03-09 20:02 UTC (permalink / raw)
To: Shaik Sajida Bhanu
Cc: adrian.hunter, ulf.hansson, robh+dt, sartgarg, asutoshd,
stummala, vbadigan, rampraka, sayalil, rnayak, saiprakash.ranjan,
sibis, cang, pragalla, nitirawa, linux-mmc, linux-kernel,
linux-arm-msm, devicetree, agross
On Tue 09 Mar 13:18 CST 2021, Shaik Sajida Bhanu wrote:
> Add nodes for eMMC and SD card on sc7280.
>
> Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
>
> ---
> This change is depends on the below patch series:
> https://lore.kernel.org/lkml/1613114930-1661-1-git-send-email-rnayak@codeaurora.org/
> https://lore.kernel.org/patchwork/project/lkml/list/?series=&submitter=28035&state=&q=&archive=&delegate=
> ---
> arch/arm64/boot/dts/qcom/sc7280-idp.dts | 26 +++++
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 170 ++++++++++++++++++++++++++++++++
> 2 files changed, 196 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
> index ac79420..6abb2aa 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
> @@ -8,6 +8,7 @@
> /dts-v1/;
>
> #include "sc7280.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
>
> / {
> model = "Qualcomm Technologies, Inc. SC7280 IDP platform";
> @@ -256,3 +257,28 @@
> bias-pull-up;
> };
> };
> +
> +&sdhc_1 {
> + status = "okay";
> +
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&sdc1_on>;
> + pinctrl-1 = <&sdc1_off>;
> +
> + vmmc-supply = <&vreg_l7b_2p9>;
> + vqmmc-supply = <&vreg_l19b_1p8>;
> +
> +};
> +
> +&sdhc_2 {
> + status = "okay";
> +
> + pinctrl-names = "default","sleep";
> + pinctrl-0 = <&sdc2_on>;
> + pinctrl-1 = <&sdc2_off>;
> +
> + vmmc-supply = <&vreg_l9c_2p9>;
> + vqmmc-supply = <&vreg_l6c_2p9>;
> +
> + cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
Please add these nodes above the comment that says "PINCTRL -
additions..." and please include the pinctrl state for gpio 91.
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 3b86052..91fb18a 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -18,6 +18,11 @@
>
> chosen { };
>
> + aliases {
> + mmc1 = &sdhc_1;
> + mmc2 = &sdhc_2;
> + };
> +
> clocks {
> xo_board: xo-board {
> compatible = "fixed-clock";
> @@ -315,6 +320,69 @@
> #power-domain-cells = <1>;
> };
>
> + sdhc_1: sdhci@7c4000 {
> + compatible = "qcom,sdhci-msm-v5";
> + reg = <0 0x7c4000 0 0x1000>,
> + <0 0x7c5000 0 0x1000>;
> + reg-names = "hc", "cqhci";
> +
> + iommus = <&apps_smmu 0xC0 0x0>;
> + interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hc_irq", "pwr_irq";
> +
> + clocks = <&gcc GCC_SDCC1_APPS_CLK>,
> + <&gcc GCC_SDCC1_AHB_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "core", "iface", "xo";
> +
> + bus-width = <8>;
> + non-removable;
> + supports-cqe;
> + no-sd;
> + no-sdio;
> +
> + max-frequency = <192000000>;
> +
> + qcom,dll-config = <0x0007642c>;
> + qcom,ddr-config = <0x80040868>;
> +
> + mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> +
> + status = "disabled";
> +
> + };
> +
> + sdhc_2: sdhci@8804000 {
> + compatible = "qcom,sdhci-msm-v5";
> + reg = <0 0x08804000 0 0x1000>;
> +
> + iommus = <&apps_smmu 0x100 0x0>;
> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hc_irq", "pwr_irq";
> +
> + clocks = <&gcc GCC_SDCC2_APPS_CLK>,
> + <&gcc GCC_SDCC2_AHB_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "core", "iface", "xo";
> +
> + bus-width = <4>;
> +
> + no-mmc;
> + no-sdio;
> +
> + max-frequency = <202000000>;
> +
> + qcom,dll-config = <0x0007642c>;
> +
> + status = "disabled";
> +
> + };
> +
> qupv3_id_0: geniqup@9c0000 {
> compatible = "qcom,geni-se-qup";
> reg = <0 0x009c0000 0 0x2000>;
> @@ -385,6 +453,108 @@
> pins = "gpio46", "gpio47";
> function = "qup13";
> };
> +
> + sdc1_on: sdc1-on {
> + pinconf-clk {
The "pinconf-" prefix does not provide any value here. Can you please
drop it?
Regards,
Bjorn
> + pins = "sdc1_clk";
> + bias-disable;
> + drive-strength = <16>;
> + };
> +
> + pinconf-cmd {
> + pins = "sdc1_cmd";
> + bias-pull-up;
> + drive-strength = <10>;
> + };
> +
> + pinconf-data {
> + pins = "sdc1_data";
> + bias-pull-up;
> + drive-strength = <10>;
> + };
> +
> + pinconf-rclk {
> + pins = "sdc1_rclk";
> + bias-pull-down;
> + };
> + };
> +
> + sdc1_off: sdc1-off {
> + pinconf-clk {
> + pins = "sdc1_clk";
> + bias-disable;
> + drive-strength = <2>;
> + };
> +
> + pinconf-cmd {
> + pins = "sdc1_cmd";
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +
> + pinconf-data {
> + pins = "sdc1_data";
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +
> + pinconf-rclk {
> + pins = "sdc1_rclk";
> + bias-pull-down;
> + };
> + };
> +
> + sdc2_on: sdc2-on {
> + pinconf-clk {
> + pins = "sdc2_clk";
> + bias-disable;
> + drive-strength = <16>;
> + };
> +
> + pinconf-cmd {
> + pins = "sdc2_cmd";
> + bias-pull-up;
> + drive-strength = <10>;
> + };
> +
> + pinconf-data {
> + pins = "sdc2_data";
> + bias-pull-up;
> + drive-strength = <10>;
> + };
> +
> + pinconf-sd-cd {
> + pins = "gpio91";
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> + };
> +
> + sdc2_off: sdc2-off {
> + pinconf-clk {
> + pins = "sdc2_clk";
> + bias-disable;
> + drive-strength = <2>;
> + };
> +
> + pinconf-cmd {
> + pins = "sdc2_cmd";
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +
> + pinconf-data {
> + pins = "sdc2_data";
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +
> + pinconf-sd-cd {
> + pins = "gpio91";
> + bias-disable;
> + drive-strength = <2>;
> + };
> + };
> };
>
> apps_smmu: iommu@15000000 {
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH V1] arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card
2021-03-09 19:18 [PATCH V1] arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card Shaik Sajida Bhanu
2021-03-09 20:02 ` Bjorn Andersson
@ 2021-03-09 20:50 ` Konrad Dybcio
2021-03-10 13:15 ` sbhanu
2021-03-10 4:48 ` Veerabhadrarao Badiganti
2 siblings, 1 reply; 8+ messages in thread
From: Konrad Dybcio @ 2021-03-09 20:50 UTC (permalink / raw)
To: Shaik Sajida Bhanu, adrian.hunter, ulf.hansson, robh+dt, sartgarg
Cc: asutoshd, stummala, vbadigan, rampraka, sayalil, rnayak,
saiprakash.ranjan, sibis, cang, pragalla, nitirawa, linux-mmc,
linux-kernel, linux-arm-msm, devicetree, agross, bjorn.andersson
Hi!
> +
> +&sdhc_1 {
> + status = "okay";
> +
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&sdc1_on>;
> + pinctrl-1 = <&sdc1_off>;
> +
> + vmmc-supply = <&vreg_l7b_2p9>;
> + vqmmc-supply = <&vreg_l19b_1p8>;
> +
Redundant newline, please remove
> +
> + mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> +
> + status = "disabled";
> +
Redundant newline, please remove
> + };
> +
> + sdhc_2: sdhci@8804000 {
> + compatible = "qcom,sdhci-msm-v5";
> + reg = <0 0x08804000 0 0x1000>;
> +
> + iommus = <&apps_smmu 0x100 0x0>;
> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hc_irq", "pwr_irq";
> +
> + clocks = <&gcc GCC_SDCC2_APPS_CLK>,
> + <&gcc GCC_SDCC2_AHB_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "core", "iface", "xo";
> +
> + bus-width = <4>;
> +
> + no-mmc;
> + no-sdio;
> +
> + max-frequency = <202000000>;
> +
> + qcom,dll-config = <0x0007642c>;
> +
> + status = "disabled";
> +
Redundant newline, please remove
Konrad
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH V1] arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card
2021-03-09 19:18 [PATCH V1] arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card Shaik Sajida Bhanu
2021-03-09 20:02 ` Bjorn Andersson
2021-03-09 20:50 ` Konrad Dybcio
@ 2021-03-10 4:48 ` Veerabhadrarao Badiganti
2021-03-10 13:14 ` sbhanu
2 siblings, 1 reply; 8+ messages in thread
From: Veerabhadrarao Badiganti @ 2021-03-10 4:48 UTC (permalink / raw)
To: Shaik Sajida Bhanu, adrian.hunter, ulf.hansson, robh+dt, sartgarg
Cc: asutoshd, stummala, rampraka, sayalil, rnayak, saiprakash.ranjan,
sibis, cang, pragalla, nitirawa, linux-mmc, linux-kernel,
linux-arm-msm, devicetree, agross, bjorn.andersson
On 3/10/2021 12:48 AM, Shaik Sajida Bhanu wrote:
> Add nodes for eMMC and SD card on sc7280.
>
> Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
>
> ---
> This change is depends on the below patch series:
> https://lore.kernel.org/lkml/1613114930-1661-1-git-send-email-rnayak@codeaurora.org/
> https://lore.kernel.org/patchwork/project/lkml/list/?series=&submitter=28035&state=&q=&archive=&delegate=
> ---
> arch/arm64/boot/dts/qcom/sc7280-idp.dts | 26 +++++
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 170 ++++++++++++++++++++++++++++++++
> 2 files changed, 196 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
> index ac79420..6abb2aa 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
> @@ -8,6 +8,7 @@
> /dts-v1/;
>
> #include "sc7280.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
>
> / {
> model = "Qualcomm Technologies, Inc. SC7280 IDP platform";
> @@ -256,3 +257,28 @@
> bias-pull-up;
> };
> };
> +
> +&sdhc_1 {
> + status = "okay";
> +
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&sdc1_on>;
> + pinctrl-1 = <&sdc1_off>;
> +
> + vmmc-supply = <&vreg_l7b_2p9>;
> + vqmmc-supply = <&vreg_l19b_1p8>;
> +
> +};
> +
> +&sdhc_2 {
> + status = "okay";
> +
> + pinctrl-names = "default","sleep";
> + pinctrl-0 = <&sdc2_on>;
> + pinctrl-1 = <&sdc2_off>;
> +
> + vmmc-supply = <&vreg_l9c_2p9>;
> + vqmmc-supply = <&vreg_l6c_2p9>;
> +
> + cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
> +};
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index 3b86052..91fb18a 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -18,6 +18,11 @@
>
> chosen { };
>
> + aliases {
> + mmc1 = &sdhc_1;
> + mmc2 = &sdhc_2;
> + };
> +
> clocks {
> xo_board: xo-board {
> compatible = "fixed-clock";
> @@ -315,6 +320,69 @@
> #power-domain-cells = <1>;
> };
>
> + sdhc_1: sdhci@7c4000 {
> + compatible = "qcom,sdhci-msm-v5";
> + reg = <0 0x7c4000 0 0x1000>,
> + <0 0x7c5000 0 0x1000>;
> + reg-names = "hc", "cqhci";
> +
> + iommus = <&apps_smmu 0xC0 0x0>;
> + interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hc_irq", "pwr_irq";
> +
> + clocks = <&gcc GCC_SDCC1_APPS_CLK>,
> + <&gcc GCC_SDCC1_AHB_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "core", "iface", "xo";
> +
> + bus-width = <8>;
> + non-removable;
> + supports-cqe;
> + no-sd;
> + no-sdio;
> +
> + max-frequency = <192000000>;
> +
> + qcom,dll-config = <0x0007642c>;
> + qcom,ddr-config = <0x80040868>;
> +
> + mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> +
> + status = "disabled";
> +
> + };
> +
> + sdhc_2: sdhci@8804000 {
> + compatible = "qcom,sdhci-msm-v5";
> + reg = <0 0x08804000 0 0x1000>;
> +
> + iommus = <&apps_smmu 0x100 0x0>;
> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "hc_irq", "pwr_irq";
> +
> + clocks = <&gcc GCC_SDCC2_APPS_CLK>,
> + <&gcc GCC_SDCC2_AHB_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "core", "iface", "xo";
> +
> + bus-width = <4>;
> +
> + no-mmc;
> + no-sdio;
> +
> + max-frequency = <202000000>;
> +
> + qcom,dll-config = <0x0007642c>;
> +
> + status = "disabled";
> +
> + };
> +
> qupv3_id_0: geniqup@9c0000 {
> compatible = "qcom,geni-se-qup";
> reg = <0 0x009c0000 0 0x2000>;
> @@ -385,6 +453,108 @@
> pins = "gpio46", "gpio47";
> function = "qup13";
> };
> +
> + sdc1_on: sdc1-on {
> + pinconf-clk {
> + pins = "sdc1_clk";
> + bias-disable;
> + drive-strength = <16>;
> + };
> +
> + pinconf-cmd {
> + pins = "sdc1_cmd";
> + bias-pull-up;
> + drive-strength = <10>;
> + };
> +
> + pinconf-data {
> + pins = "sdc1_data";
> + bias-pull-up;
> + drive-strength = <10>;
> + };
> +
> + pinconf-rclk {
> + pins = "sdc1_rclk";
> + bias-pull-down;
> + };
> + };
> +
> + sdc1_off: sdc1-off {
> + pinconf-clk {
> + pins = "sdc1_clk";
> + bias-disable;
> + drive-strength = <2>;
> + };
> +
> + pinconf-cmd {
> + pins = "sdc1_cmd";
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +
> + pinconf-data {
> + pins = "sdc1_data";
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +
> + pinconf-rclk {
> + pins = "sdc1_rclk";
> + bias-pull-down;
> + };
> + };
> +
> + sdc2_on: sdc2-on {
> + pinconf-clk {
> + pins = "sdc2_clk";
> + bias-disable;
> + drive-strength = <16>;
> + };
> +
> + pinconf-cmd {
> + pins = "sdc2_cmd";
> + bias-pull-up;
> + drive-strength = <10>;
> + };
> +
> + pinconf-data {
> + pins = "sdc2_data";
> + bias-pull-up;
> + drive-strength = <10>;
> + };
> +
> + pinconf-sd-cd {
> + pins = "gpio91";
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> + };
> +
> + sdc2_off: sdc2-off {
> + pinconf-clk {
> + pins = "sdc2_clk";
> + bias-disable;
> + drive-strength = <2>;
> + };
> +
> + pinconf-cmd {
> + pins = "sdc2_cmd";
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +
> + pinconf-data {
> + pins = "sdc2_data";
> + bias-pull-up;
> + drive-strength = <2>;
> + };
> +
> + pinconf-sd-cd {
> + pins = "gpio91";
> + bias-disable;
On few sc7180 based boards where external pull up is missing on cd-gpio,
we had seen issues like un-intended interrupt on cd-gpio pin (since its
getting toggled) during runtime PM cycle and resulting in unnecessary
scheduling of SDcard scan (mmc_rescan). This issue is seen only when SDcard
is not present.
By enabling internal pull all the time (bais-pull-up), we can avoid such
issue.
> + drive-strength = <2>;
> + };
> + };
> };
>
> apps_smmu: iommu@15000000 {
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH V1] arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card
2021-03-10 4:48 ` Veerabhadrarao Badiganti
@ 2021-03-10 13:14 ` sbhanu
0 siblings, 0 replies; 8+ messages in thread
From: sbhanu @ 2021-03-10 13:14 UTC (permalink / raw)
To: Veerabhadrarao Badiganti
Cc: adrian.hunter, ulf.hansson, robh+dt, sartgarg, asutoshd,
stummala, rampraka, sayalil, rnayak, saiprakash.ranjan, sibis,
cang, pragalla, nitirawa, linux-mmc, linux-kernel, linux-arm-msm,
devicetree, agross, bjorn.andersson, vbadigan=codeaurora.org
On 2021-03-10 10:18, Veerabhadrarao Badiganti wrote:
> On 3/10/2021 12:48 AM, Shaik Sajida Bhanu wrote:
>> Add nodes for eMMC and SD card on sc7280.
>>
>> Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
>>
>> ---
>> This change is depends on the below patch series:
>> https://lore.kernel.org/lkml/1613114930-1661-1-git-send-email-rnayak@codeaurora.org/
>> https://lore.kernel.org/patchwork/project/lkml/list/?series=&submitter=28035&state=&q=&archive=&delegate=
>> ---
>> arch/arm64/boot/dts/qcom/sc7280-idp.dts | 26 +++++
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 170
>> ++++++++++++++++++++++++++++++++
>> 2 files changed, 196 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> index ac79420..6abb2aa 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> @@ -8,6 +8,7 @@
>> /dts-v1/;
>> #include "sc7280.dtsi"
>> +#include <dt-bindings/gpio/gpio.h>
>> / {
>> model = "Qualcomm Technologies, Inc. SC7280 IDP platform";
>> @@ -256,3 +257,28 @@
>> bias-pull-up;
>> };
>> };
>> +
>> +&sdhc_1 {
>> + status = "okay";
>> +
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-0 = <&sdc1_on>;
>> + pinctrl-1 = <&sdc1_off>;
>> +
>> + vmmc-supply = <&vreg_l7b_2p9>;
>> + vqmmc-supply = <&vreg_l19b_1p8>;
>> +
>> +};
>> +
>> +&sdhc_2 {
>> + status = "okay";
>> +
>> + pinctrl-names = "default","sleep";
>> + pinctrl-0 = <&sdc2_on>;
>> + pinctrl-1 = <&sdc2_off>;
>> +
>> + vmmc-supply = <&vreg_l9c_2p9>;
>> + vqmmc-supply = <&vreg_l6c_2p9>;
>> +
>> + cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
>> +};
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 3b86052..91fb18a 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -18,6 +18,11 @@
>> chosen { };
>> + aliases {
>> + mmc1 = &sdhc_1;
>> + mmc2 = &sdhc_2;
>> + };
>> +
>> clocks {
>> xo_board: xo-board {
>> compatible = "fixed-clock";
>> @@ -315,6 +320,69 @@
>> #power-domain-cells = <1>;
>> };
>> + sdhc_1: sdhci@7c4000 {
>> + compatible = "qcom,sdhci-msm-v5";
>> + reg = <0 0x7c4000 0 0x1000>,
>> + <0 0x7c5000 0 0x1000>;
>> + reg-names = "hc", "cqhci";
>> +
>> + iommus = <&apps_smmu 0xC0 0x0>;
>> + interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "hc_irq", "pwr_irq";
>> +
>> + clocks = <&gcc GCC_SDCC1_APPS_CLK>,
>> + <&gcc GCC_SDCC1_AHB_CLK>,
>> + <&rpmhcc RPMH_CXO_CLK>;
>> + clock-names = "core", "iface", "xo";
>> +
>> + bus-width = <8>;
>> + non-removable;
>> + supports-cqe;
>> + no-sd;
>> + no-sdio;
>> +
>> + max-frequency = <192000000>;
>> +
>> + qcom,dll-config = <0x0007642c>;
>> + qcom,ddr-config = <0x80040868>;
>> +
>> + mmc-ddr-1_8v;
>> + mmc-hs200-1_8v;
>> + mmc-hs400-1_8v;
>> + mmc-hs400-enhanced-strobe;
>> +
>> + status = "disabled";
>> +
>> + };
>> +
>> + sdhc_2: sdhci@8804000 {
>> + compatible = "qcom,sdhci-msm-v5";
>> + reg = <0 0x08804000 0 0x1000>;
>> +
>> + iommus = <&apps_smmu 0x100 0x0>;
>> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "hc_irq", "pwr_irq";
>> +
>> + clocks = <&gcc GCC_SDCC2_APPS_CLK>,
>> + <&gcc GCC_SDCC2_AHB_CLK>,
>> + <&rpmhcc RPMH_CXO_CLK>;
>> + clock-names = "core", "iface", "xo";
>> +
>> + bus-width = <4>;
>> +
>> + no-mmc;
>> + no-sdio;
>> +
>> + max-frequency = <202000000>;
>> +
>> + qcom,dll-config = <0x0007642c>;
>> +
>> + status = "disabled";
>> +
>> + };
>> +
>> qupv3_id_0: geniqup@9c0000 {
>> compatible = "qcom,geni-se-qup";
>> reg = <0 0x009c0000 0 0x2000>;
>> @@ -385,6 +453,108 @@
>> pins = "gpio46", "gpio47";
>> function = "qup13";
>> };
>> +
>> + sdc1_on: sdc1-on {
>> + pinconf-clk {
>> + pins = "sdc1_clk";
>> + bias-disable;
>> + drive-strength = <16>;
>> + };
>> +
>> + pinconf-cmd {
>> + pins = "sdc1_cmd";
>> + bias-pull-up;
>> + drive-strength = <10>;
>> + };
>> +
>> + pinconf-data {
>> + pins = "sdc1_data";
>> + bias-pull-up;
>> + drive-strength = <10>;
>> + };
>> +
>> + pinconf-rclk {
>> + pins = "sdc1_rclk";
>> + bias-pull-down;
>> + };
>> + };
>> +
>> + sdc1_off: sdc1-off {
>> + pinconf-clk {
>> + pins = "sdc1_clk";
>> + bias-disable;
>> + drive-strength = <2>;
>> + };
>> +
>> + pinconf-cmd {
>> + pins = "sdc1_cmd";
>> + bias-pull-up;
>> + drive-strength = <2>;
>> + };
>> +
>> + pinconf-data {
>> + pins = "sdc1_data";
>> + bias-pull-up;
>> + drive-strength = <2>;
>> + };
>> +
>> + pinconf-rclk {
>> + pins = "sdc1_rclk";
>> + bias-pull-down;
>> + };
>> + };
>> +
>> + sdc2_on: sdc2-on {
>> + pinconf-clk {
>> + pins = "sdc2_clk";
>> + bias-disable;
>> + drive-strength = <16>;
>> + };
>> +
>> + pinconf-cmd {
>> + pins = "sdc2_cmd";
>> + bias-pull-up;
>> + drive-strength = <10>;
>> + };
>> +
>> + pinconf-data {
>> + pins = "sdc2_data";
>> + bias-pull-up;
>> + drive-strength = <10>;
>> + };
>> +
>> + pinconf-sd-cd {
>> + pins = "gpio91";
>> + bias-pull-up;
>> + drive-strength = <2>;
>> + };
>> + };
>> +
>> + sdc2_off: sdc2-off {
>> + pinconf-clk {
>> + pins = "sdc2_clk";
>> + bias-disable;
>> + drive-strength = <2>;
>> + };
>> +
>> + pinconf-cmd {
>> + pins = "sdc2_cmd";
>> + bias-pull-up;
>> + drive-strength = <2>;
>> + };
>> +
>> + pinconf-data {
>> + pins = "sdc2_data";
>> + bias-pull-up;
>> + drive-strength = <2>;
>> + };
>> +
>> + pinconf-sd-cd {
>> + pins = "gpio91";
>> + bias-disable;
> On few sc7180 based boards where external pull up is missing on
> cd-gpio,
> we had seen issues like un-intended interrupt on cd-gpio pin (since its
> getting toggled) during runtime PM cycle and resulting in unnecessary
> scheduling of SDcard scan (mmc_rescan). This issue is seen only when
> SDcard
> is not present.
> By enabling internal pull all the time (bais-pull-up), we can avoid
> such issue.
>
sure
>> + drive-strength = <2>;
>> + };
>> + };
>> };
>> apps_smmu: iommu@15000000 {
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH V1] arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card
2021-03-09 20:50 ` Konrad Dybcio
@ 2021-03-10 13:15 ` sbhanu
0 siblings, 0 replies; 8+ messages in thread
From: sbhanu @ 2021-03-10 13:15 UTC (permalink / raw)
To: Konrad Dybcio
Cc: adrian.hunter, ulf.hansson, robh+dt, sartgarg, asutoshd,
stummala, vbadigan, rampraka, sayalil, rnayak, saiprakash.ranjan,
sibis, cang, pragalla, nitirawa, linux-mmc, linux-kernel,
linux-arm-msm, devicetree, agross, bjorn.andersson
On 2021-03-10 02:20, Konrad Dybcio wrote:
> Hi!
>
>
>> +
>> +&sdhc_1 {
>> + status = "okay";
>> +
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-0 = <&sdc1_on>;
>> + pinctrl-1 = <&sdc1_off>;
>> +
>> + vmmc-supply = <&vreg_l7b_2p9>;
>> + vqmmc-supply = <&vreg_l19b_1p8>;
>> +
>
> Redundant newline, please remove
>
>
>> +
>> + mmc-ddr-1_8v;
>> + mmc-hs200-1_8v;
>> + mmc-hs400-1_8v;
>> + mmc-hs400-enhanced-strobe;
>> +
>> + status = "disabled";
>> +
>
> Redundant newline, please remove
>
sure
>
>> + };
>> +
>> + sdhc_2: sdhci@8804000 {
>> + compatible = "qcom,sdhci-msm-v5";
>> + reg = <0 0x08804000 0 0x1000>;
>> +
>> + iommus = <&apps_smmu 0x100 0x0>;
>> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "hc_irq", "pwr_irq";
>> +
>> + clocks = <&gcc GCC_SDCC2_APPS_CLK>,
>> + <&gcc GCC_SDCC2_AHB_CLK>,
>> + <&rpmhcc RPMH_CXO_CLK>;
>> + clock-names = "core", "iface", "xo";
>> +
>> + bus-width = <4>;
>> +
>> + no-mmc;
>> + no-sdio;
>> +
>> + max-frequency = <202000000>;
>> +
>> + qcom,dll-config = <0x0007642c>;
>> +
>> + status = "disabled";
>> +
>
> Redundant newline, please remove
>
sure
>
> Konrad
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH V1] arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card
2021-03-09 20:02 ` Bjorn Andersson
@ 2021-03-10 13:47 ` sbhanu
2021-03-13 8:17 ` sbhanu
0 siblings, 1 reply; 8+ messages in thread
From: sbhanu @ 2021-03-10 13:47 UTC (permalink / raw)
To: Bjorn Andersson
Cc: adrian.hunter, ulf.hansson, robh+dt, sartgarg, asutoshd,
stummala, vbadigan, rampraka, sayalil, rnayak, saiprakash.ranjan,
sibis, cang, pragalla, nitirawa, linux-mmc, linux-kernel,
linux-arm-msm, devicetree, agross
On 2021-03-10 01:32, Bjorn Andersson wrote:
> On Tue 09 Mar 13:18 CST 2021, Shaik Sajida Bhanu wrote:
>
>> Add nodes for eMMC and SD card on sc7280.
>>
>> Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
>>
>> ---
>> This change is depends on the below patch series:
>> https://lore.kernel.org/lkml/1613114930-1661-1-git-send-email-rnayak@codeaurora.org/
>> https://lore.kernel.org/patchwork/project/lkml/list/?series=&submitter=28035&state=&q=&archive=&delegate=
>> ---
>> arch/arm64/boot/dts/qcom/sc7280-idp.dts | 26 +++++
>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 170
>> ++++++++++++++++++++++++++++++++
>> 2 files changed, 196 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> index ac79420..6abb2aa 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>> @@ -8,6 +8,7 @@
>> /dts-v1/;
>>
>> #include "sc7280.dtsi"
>> +#include <dt-bindings/gpio/gpio.h>
>>
>> / {
>> model = "Qualcomm Technologies, Inc. SC7280 IDP platform";
>> @@ -256,3 +257,28 @@
>> bias-pull-up;
>> };
>> };
>> +
>> +&sdhc_1 {
>> + status = "okay";
>> +
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-0 = <&sdc1_on>;
>> + pinctrl-1 = <&sdc1_off>;
>> +
>> + vmmc-supply = <&vreg_l7b_2p9>;
>> + vqmmc-supply = <&vreg_l19b_1p8>;
>> +
>> +};
>> +
>> +&sdhc_2 {
>> + status = "okay";
>> +
>> + pinctrl-names = "default","sleep";
>> + pinctrl-0 = <&sdc2_on>;
>> + pinctrl-1 = <&sdc2_off>;
>> +
>> + vmmc-supply = <&vreg_l9c_2p9>;
>> + vqmmc-supply = <&vreg_l6c_2p9>;
>> +
>> + cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
>
> Please add these nodes above the comment that says "PINCTRL -
> additions..." and please include the pinctrl state for gpio 91.
>
sure
>> +};
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> index 3b86052..91fb18a 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>> @@ -18,6 +18,11 @@
>>
>> chosen { };
>>
>> + aliases {
>> + mmc1 = &sdhc_1;
>> + mmc2 = &sdhc_2;
>> + };
>> +
>> clocks {
>> xo_board: xo-board {
>> compatible = "fixed-clock";
>> @@ -315,6 +320,69 @@
>> #power-domain-cells = <1>;
>> };
>>
>> + sdhc_1: sdhci@7c4000 {
>> + compatible = "qcom,sdhci-msm-v5";
>> + reg = <0 0x7c4000 0 0x1000>,
>> + <0 0x7c5000 0 0x1000>;
>> + reg-names = "hc", "cqhci";
>> +
>> + iommus = <&apps_smmu 0xC0 0x0>;
>> + interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "hc_irq", "pwr_irq";
>> +
>> + clocks = <&gcc GCC_SDCC1_APPS_CLK>,
>> + <&gcc GCC_SDCC1_AHB_CLK>,
>> + <&rpmhcc RPMH_CXO_CLK>;
>> + clock-names = "core", "iface", "xo";
>> +
>> + bus-width = <8>;
>> + non-removable;
>> + supports-cqe;
>> + no-sd;
>> + no-sdio;
>> +
>> + max-frequency = <192000000>;
>> +
>> + qcom,dll-config = <0x0007642c>;
>> + qcom,ddr-config = <0x80040868>;
>> +
>> + mmc-ddr-1_8v;
>> + mmc-hs200-1_8v;
>> + mmc-hs400-1_8v;
>> + mmc-hs400-enhanced-strobe;
>> +
>> + status = "disabled";
>> +
>> + };
>> +
>> + sdhc_2: sdhci@8804000 {
>> + compatible = "qcom,sdhci-msm-v5";
>> + reg = <0 0x08804000 0 0x1000>;
>> +
>> + iommus = <&apps_smmu 0x100 0x0>;
>> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
>> + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
>> + interrupt-names = "hc_irq", "pwr_irq";
>> +
>> + clocks = <&gcc GCC_SDCC2_APPS_CLK>,
>> + <&gcc GCC_SDCC2_AHB_CLK>,
>> + <&rpmhcc RPMH_CXO_CLK>;
>> + clock-names = "core", "iface", "xo";
>> +
>> + bus-width = <4>;
>> +
>> + no-mmc;
>> + no-sdio;
>> +
>> + max-frequency = <202000000>;
>> +
>> + qcom,dll-config = <0x0007642c>;
>> +
>> + status = "disabled";
>> +
>> + };
>> +
>> qupv3_id_0: geniqup@9c0000 {
>> compatible = "qcom,geni-se-qup";
>> reg = <0 0x009c0000 0 0x2000>;
>> @@ -385,6 +453,108 @@
>> pins = "gpio46", "gpio47";
>> function = "qup13";
>> };
>> +
>> + sdc1_on: sdc1-on {
>> + pinconf-clk {
>
> The "pinconf-" prefix does not provide any value here. Can you please
> drop it?
>
> Regards,
> Bjorn
sure will drop
>
>> + pins = "sdc1_clk";
>> + bias-disable;
>> + drive-strength = <16>;
>> + };
>> +
>> + pinconf-cmd {
>> + pins = "sdc1_cmd";
>> + bias-pull-up;
>> + drive-strength = <10>;
>> + };
>> +
>> + pinconf-data {
>> + pins = "sdc1_data";
>> + bias-pull-up;
>> + drive-strength = <10>;
>> + };
>> +
>> + pinconf-rclk {
>> + pins = "sdc1_rclk";
>> + bias-pull-down;
>> + };
>> + };
>> +
>> + sdc1_off: sdc1-off {
>> + pinconf-clk {
>> + pins = "sdc1_clk";
>> + bias-disable;
>> + drive-strength = <2>;
>> + };
>> +
>> + pinconf-cmd {
>> + pins = "sdc1_cmd";
>> + bias-pull-up;
>> + drive-strength = <2>;
>> + };
>> +
>> + pinconf-data {
>> + pins = "sdc1_data";
>> + bias-pull-up;
>> + drive-strength = <2>;
>> + };
>> +
>> + pinconf-rclk {
>> + pins = "sdc1_rclk";
>> + bias-pull-down;
>> + };
>> + };
>> +
>> + sdc2_on: sdc2-on {
>> + pinconf-clk {
>> + pins = "sdc2_clk";
>> + bias-disable;
>> + drive-strength = <16>;
>> + };
>> +
>> + pinconf-cmd {
>> + pins = "sdc2_cmd";
>> + bias-pull-up;
>> + drive-strength = <10>;
>> + };
>> +
>> + pinconf-data {
>> + pins = "sdc2_data";
>> + bias-pull-up;
>> + drive-strength = <10>;
>> + };
>> +
>> + pinconf-sd-cd {
>> + pins = "gpio91";
>> + bias-pull-up;
>> + drive-strength = <2>;
>> + };
>> + };
>> +
>> + sdc2_off: sdc2-off {
>> + pinconf-clk {
>> + pins = "sdc2_clk";
>> + bias-disable;
>> + drive-strength = <2>;
>> + };
>> +
>> + pinconf-cmd {
>> + pins = "sdc2_cmd";
>> + bias-pull-up;
>> + drive-strength = <2>;
>> + };
>> +
>> + pinconf-data {
>> + pins = "sdc2_data";
>> + bias-pull-up;
>> + drive-strength = <2>;
>> + };
>> +
>> + pinconf-sd-cd {
>> + pins = "gpio91";
>> + bias-disable;
>> + drive-strength = <2>;
>> + };
>> + };
>> };
>>
>> apps_smmu: iommu@15000000 {
>> --
>> 2.7.4
>>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH V1] arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card
2021-03-10 13:47 ` sbhanu
@ 2021-03-13 8:17 ` sbhanu
0 siblings, 0 replies; 8+ messages in thread
From: sbhanu @ 2021-03-13 8:17 UTC (permalink / raw)
To: Bjorn Andersson
Cc: adrian.hunter, ulf.hansson, robh+dt, sartgarg, asutoshd,
stummala, vbadigan, rampraka, sayalil, rnayak, saiprakash.ranjan,
sibis, cang, pragalla, nitirawa, linux-mmc, linux-kernel,
linux-arm-msm, devicetree, agross
On 2021-03-10 19:17, sbhanu@codeaurora.org wrote:
> On 2021-03-10 01:32, Bjorn Andersson wrote:
>> On Tue 09 Mar 13:18 CST 2021, Shaik Sajida Bhanu wrote:
>>
>>> Add nodes for eMMC and SD card on sc7280.
>>>
>>> Signed-off-by: Shaik Sajida Bhanu <sbhanu@codeaurora.org>
>>>
>>> ---
>>> This change is depends on the below patch series:
>>> https://lore.kernel.org/lkml/1613114930-1661-1-git-send-email-rnayak@codeaurora.org/
>>> https://lore.kernel.org/patchwork/project/lkml/list/?series=&submitter=28035&state=&q=&archive=&delegate=
>>> ---
>>> arch/arm64/boot/dts/qcom/sc7280-idp.dts | 26 +++++
>>> arch/arm64/boot/dts/qcom/sc7280.dtsi | 170
>>> ++++++++++++++++++++++++++++++++
>>> 2 files changed, 196 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>>> b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>>> index ac79420..6abb2aa 100644
>>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
>>> @@ -8,6 +8,7 @@
>>> /dts-v1/;
>>>
>>> #include "sc7280.dtsi"
>>> +#include <dt-bindings/gpio/gpio.h>
>>>
>>> / {
>>> model = "Qualcomm Technologies, Inc. SC7280 IDP platform";
>>> @@ -256,3 +257,28 @@
>>> bias-pull-up;
>>> };
>>> };
>>> +
>>> +&sdhc_1 {
>>> + status = "okay";
>>> +
>>> + pinctrl-names = "default", "sleep";
>>> + pinctrl-0 = <&sdc1_on>;
>>> + pinctrl-1 = <&sdc1_off>;
>>> +
>>> + vmmc-supply = <&vreg_l7b_2p9>;
>>> + vqmmc-supply = <&vreg_l19b_1p8>;
>>> +
>>> +};
>>> +
>>> +&sdhc_2 {
>>> + status = "okay";
>>> +
>>> + pinctrl-names = "default","sleep";
>>> + pinctrl-0 = <&sdc2_on>;
>>> + pinctrl-1 = <&sdc2_off>;
>>> +
>>> + vmmc-supply = <&vreg_l9c_2p9>;
>>> + vqmmc-supply = <&vreg_l6c_2p9>;
>>> +
>>> + cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
>>
>> Please add these nodes above the comment that says "PINCTRL -
>> additions..." and please include the pinctrl state for gpio 91.
>>
> sure
Hi
>> "and please include the pinctrl state for gpio 91"
sorry didn't get this
>>> +};
>>> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>>> b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>>> index 3b86052..91fb18a 100644
>>> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
>>> @@ -18,6 +18,11 @@
>>>
>>> chosen { };
>>>
>>> + aliases {
>>> + mmc1 = &sdhc_1;
>>> + mmc2 = &sdhc_2;
>>> + };
>>> +
>>> clocks {
>>> xo_board: xo-board {
>>> compatible = "fixed-clock";
>>> @@ -315,6 +320,69 @@
>>> #power-domain-cells = <1>;
>>> };
>>>
>>> + sdhc_1: sdhci@7c4000 {
>>> + compatible = "qcom,sdhci-msm-v5";
>>> + reg = <0 0x7c4000 0 0x1000>,
>>> + <0 0x7c5000 0 0x1000>;
>>> + reg-names = "hc", "cqhci";
>>> +
>>> + iommus = <&apps_smmu 0xC0 0x0>;
>>> + interrupts = <GIC_SPI 652 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 656 IRQ_TYPE_LEVEL_HIGH>;
>>> + interrupt-names = "hc_irq", "pwr_irq";
>>> +
>>> + clocks = <&gcc GCC_SDCC1_APPS_CLK>,
>>> + <&gcc GCC_SDCC1_AHB_CLK>,
>>> + <&rpmhcc RPMH_CXO_CLK>;
>>> + clock-names = "core", "iface", "xo";
>>> +
>>> + bus-width = <8>;
>>> + non-removable;
>>> + supports-cqe;
>>> + no-sd;
>>> + no-sdio;
>>> +
>>> + max-frequency = <192000000>;
>>> +
>>> + qcom,dll-config = <0x0007642c>;
>>> + qcom,ddr-config = <0x80040868>;
>>> +
>>> + mmc-ddr-1_8v;
>>> + mmc-hs200-1_8v;
>>> + mmc-hs400-1_8v;
>>> + mmc-hs400-enhanced-strobe;
>>> +
>>> + status = "disabled";
>>> +
>>> + };
>>> +
>>> + sdhc_2: sdhci@8804000 {
>>> + compatible = "qcom,sdhci-msm-v5";
>>> + reg = <0 0x08804000 0 0x1000>;
>>> +
>>> + iommus = <&apps_smmu 0x100 0x0>;
>>> + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
>>> + <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
>>> + interrupt-names = "hc_irq", "pwr_irq";
>>> +
>>> + clocks = <&gcc GCC_SDCC2_APPS_CLK>,
>>> + <&gcc GCC_SDCC2_AHB_CLK>,
>>> + <&rpmhcc RPMH_CXO_CLK>;
>>> + clock-names = "core", "iface", "xo";
>>> +
>>> + bus-width = <4>;
>>> +
>>> + no-mmc;
>>> + no-sdio;
>>> +
>>> + max-frequency = <202000000>;
>>> +
>>> + qcom,dll-config = <0x0007642c>;
>>> +
>>> + status = "disabled";
>>> +
>>> + };
>>> +
>>> qupv3_id_0: geniqup@9c0000 {
>>> compatible = "qcom,geni-se-qup";
>>> reg = <0 0x009c0000 0 0x2000>;
>>> @@ -385,6 +453,108 @@
>>> pins = "gpio46", "gpio47";
>>> function = "qup13";
>>> };
>>> +
>>> + sdc1_on: sdc1-on {
>>> + pinconf-clk {
>>
>> The "pinconf-" prefix does not provide any value here. Can you please
>> drop it?
>>
>> Regards,
>> Bjorn
>
> sure will drop
>>
>>> + pins = "sdc1_clk";
>>> + bias-disable;
>>> + drive-strength = <16>;
>>> + };
>>> +
>>> + pinconf-cmd {
>>> + pins = "sdc1_cmd";
>>> + bias-pull-up;
>>> + drive-strength = <10>;
>>> + };
>>> +
>>> + pinconf-data {
>>> + pins = "sdc1_data";
>>> + bias-pull-up;
>>> + drive-strength = <10>;
>>> + };
>>> +
>>> + pinconf-rclk {
>>> + pins = "sdc1_rclk";
>>> + bias-pull-down;
>>> + };
>>> + };
>>> +
>>> + sdc1_off: sdc1-off {
>>> + pinconf-clk {
>>> + pins = "sdc1_clk";
>>> + bias-disable;
>>> + drive-strength = <2>;
>>> + };
>>> +
>>> + pinconf-cmd {
>>> + pins = "sdc1_cmd";
>>> + bias-pull-up;
>>> + drive-strength = <2>;
>>> + };
>>> +
>>> + pinconf-data {
>>> + pins = "sdc1_data";
>>> + bias-pull-up;
>>> + drive-strength = <2>;
>>> + };
>>> +
>>> + pinconf-rclk {
>>> + pins = "sdc1_rclk";
>>> + bias-pull-down;
>>> + };
>>> + };
>>> +
>>> + sdc2_on: sdc2-on {
>>> + pinconf-clk {
>>> + pins = "sdc2_clk";
>>> + bias-disable;
>>> + drive-strength = <16>;
>>> + };
>>> +
>>> + pinconf-cmd {
>>> + pins = "sdc2_cmd";
>>> + bias-pull-up;
>>> + drive-strength = <10>;
>>> + };
>>> +
>>> + pinconf-data {
>>> + pins = "sdc2_data";
>>> + bias-pull-up;
>>> + drive-strength = <10>;
>>> + };
>>> +
>>> + pinconf-sd-cd {
>>> + pins = "gpio91";
>>> + bias-pull-up;
>>> + drive-strength = <2>;
>>> + };
>>> + };
>>> +
>>> + sdc2_off: sdc2-off {
>>> + pinconf-clk {
>>> + pins = "sdc2_clk";
>>> + bias-disable;
>>> + drive-strength = <2>;
>>> + };
>>> +
>>> + pinconf-cmd {
>>> + pins = "sdc2_cmd";
>>> + bias-pull-up;
>>> + drive-strength = <2>;
>>> + };
>>> +
>>> + pinconf-data {
>>> + pins = "sdc2_data";
>>> + bias-pull-up;
>>> + drive-strength = <2>;
>>> + };
>>> +
>>> + pinconf-sd-cd {
>>> + pins = "gpio91";
>>> + bias-disable;
>>> + drive-strength = <2>;
>>> + };
>>> + };
>>> };
>>>
>>> apps_smmu: iommu@15000000 {
>>> --
>>> 2.7.4
>>>
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2021-03-13 8:18 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-03-09 19:18 [PATCH V1] arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card Shaik Sajida Bhanu
2021-03-09 20:02 ` Bjorn Andersson
2021-03-10 13:47 ` sbhanu
2021-03-13 8:17 ` sbhanu
2021-03-09 20:50 ` Konrad Dybcio
2021-03-10 13:15 ` sbhanu
2021-03-10 4:48 ` Veerabhadrarao Badiganti
2021-03-10 13:14 ` sbhanu
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