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Thu, 18 Mar 2021 19:01:28 -0700 (PDT) Received: from localhost ([58.84.78.96]) by smtp.gmail.com with ESMTPSA id f21sm3259358pfe.6.2021.03.18.19.01.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Mar 2021 19:01:27 -0700 (PDT) Date: Fri, 19 Mar 2021 12:01:21 +1000 From: Nicholas Piggin Subject: Re: [RFC PATCH 6/8] powerpc/mm/book3s64/hash: drop pre 2.06 tlbiel for clang To: Daniel Axtens , linuxppc-dev@lists.ozlabs.org, llvmlinux@lists.linuxfoundation.org References: <20210225031006.1204774-1-dja@axtens.net> <20210225031006.1204774-7-dja@axtens.net> In-Reply-To: <20210225031006.1204774-7-dja@axtens.net> MIME-Version: 1.0 Message-Id: <1616118111.i881ydq4h2.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Daniel Axtens's message of February 25, 2021 1:10 pm: > The llvm integrated assembler does not recognise the ISA 2.05 tlbiel > version. Eventually do this more smartly. The whole thing with TLBIE and TLBIEL in this file seems a bit too=20 clever. We should have PPC_TLBIE* macros for all of them. Thanks, Nick >=20 > Signed-off-by: Daniel Axtens > --- > arch/powerpc/mm/book3s64/hash_native.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) >=20 > diff --git a/arch/powerpc/mm/book3s64/hash_native.c b/arch/powerpc/mm/boo= k3s64/hash_native.c > index 52e170bd95ae..c5937f69a452 100644 > --- a/arch/powerpc/mm/book3s64/hash_native.c > +++ b/arch/powerpc/mm/book3s64/hash_native.c > @@ -267,9 +267,14 @@ static inline void __tlbiel(unsigned long vpn, int p= size, int apsize, int ssize) > va |=3D ssize << 8; > sllp =3D get_sllp_encoding(apsize); > va |=3D sllp << 5; > +#if 0 > asm volatile(ASM_FTR_IFSET("tlbiel %0", "tlbiel %0,0", %1) > : : "r" (va), "i" (CPU_FTR_ARCH_206) > : "memory"); > +#endif > + asm volatile("tlbiel %0" > + : : "r" (va) > + : "memory"); > break; > default: > /* We need 14 to 14 + i bits of va */ > @@ -286,9 +291,14 @@ static inline void __tlbiel(unsigned long vpn, int p= size, int apsize, int ssize) > */ > va |=3D (vpn & 0xfe); > va |=3D 1; /* L */ > +#if 0 > asm volatile(ASM_FTR_IFSET("tlbiel %0", "tlbiel %0,1", %1) > : : "r" (va), "i" (CPU_FTR_ARCH_206) > : "memory"); > +#endif > + asm volatile("tlbiel %0" > + : : "r" (va) > + : "memory"); > break; > } > trace_tlbie(0, 1, va, 0, 0, 0, 0); > --=20 > 2.27.0 >=20 >=20