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From: Michael Ellerman <patch-notifications@ellerman.id.au>
To: Russell Currey <ruscur@russell.cc>, linuxppc-dev@lists.ozlabs.org
Cc: dja@axtens.net
Subject: Re: [PATCH v2] selftests/powerpc: Fix L1D flushing tests for Power10
Date: Wed, 31 Mar 2021 12:09:25 +1100	[thread overview]
Message-ID: <161715296533.226945.16801823044490927141.b4-ty@ellerman.id.au> (raw)
In-Reply-To: <20210223070227.2916871-1-ruscur@russell.cc>

On Tue, 23 Feb 2021 17:02:27 +1000, Russell Currey wrote:
> The rfi_flush and entry_flush selftests work by using the PM_LD_MISS_L1
> perf event to count L1D misses.  The value of this event has changed
> over time:
> 
> - Power7 uses 0x400f0
> - Power8 and Power9 use both 0x400f0 and 0x3e054
> - Power10 uses only 0x3e054
> 
> [...]

Applied to powerpc/next.

[1/1] selftests/powerpc: Fix L1D flushing tests for Power10
      https://git.kernel.org/powerpc/c/3a72c94ebfb1f171eba0715998010678a09ec796

cheers

      parent reply	other threads:[~2021-03-31  1:20 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-23  7:02 [PATCH v2] selftests/powerpc: Fix L1D flushing tests for Power10 Russell Currey
2021-02-24  0:42 ` Daniel Axtens
2021-03-31  1:09 ` Michael Ellerman [this message]

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