From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 36E28C433ED for ; Mon, 12 Apr 2021 15:31:41 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0DB9861206 for ; Mon, 12 Apr 2021 15:31:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242920AbhDLPb5 (ORCPT ); Mon, 12 Apr 2021 11:31:57 -0400 Received: from mx0a-0016f401.pphosted.com ([67.231.148.174]:47208 "EHLO mx0b-0016f401.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S242899AbhDLPbr (ORCPT ); Mon, 12 Apr 2021 11:31:47 -0400 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 13CFVBk6004588; Mon, 12 Apr 2021 08:31:11 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=pfpt0220; bh=1w1aOW3ghY/Ww+N67gF96mJvYXQ0kxUthm1XoYVB+Qs=; b=kaq9aYBbPal/PUIU6NyIipJ3FFRg9k5/qlYxy/dijCi2a8Th+ZJ5W/f7zD0rVHXzlxl/ wtAwGWpPZxhUasZ5SRQ78t9VkOJGLPhgHfUDG22ODTUYV7+EhvYrpvdRVBTEzs2+ozZM R2MKqkYdfqBZYcQ2JeRGjhk9JlV0QCJypYEprxwG5UWDq+kD9Wp7GmFlP++T1AxjpVI4 FHoTbB0M9LZLoJTvfuw6BqXgNQI8VONqTl49C7poomwPR0XQ5e0aaiubDQrDCgo52ssz j+wi0gOD84gVbwl2mFu+vJhJ09KA90/VER8Xb39/Nl9R+LBWP8VLqcs287PFfImCSDPE 4A== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 37vcu99xp8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 12 Apr 2021 08:31:11 -0700 Received: from SC-EXCH04.marvell.com (10.93.176.84) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 12 Apr 2021 08:31:09 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 12 Apr 2021 08:31:09 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 12 Apr 2021 08:31:09 -0700 Received: from nw-bp.marvell.com (nw-bp.marvell.com [10.5.24.22]) by maili.marvell.com (Postfix) with ESMTP id 5290F3F7043; Mon, 12 Apr 2021 08:31:05 -0700 (PDT) From: To: , , CC: , , , , , , , , , , , , , , , "Marc St-Amand" Subject: =?UTF-8?q?=5B=E2=80=9DPATCH=E2=80=9D=201/5=5D=20PCI=3A=20armada8k=3A=20Disable=20LTSSM=20on=20link=20down=20interrupts?= Date: Mon, 12 Apr 2021 18:30:52 +0300 Message-ID: <1618241456-27200-2-git-send-email-bpeled@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1618241456-27200-1-git-send-email-bpeled@marvell.com> References: <1618241456-27200-1-git-send-email-bpeled@marvell.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: lH0eozCtIxCe8ZuBdcND7yXWxwbA3kra X-Proofpoint-ORIG-GUID: lH0eozCtIxCe8ZuBdcND7yXWxwbA3kra X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391,18.0.761 definitions=2021-04-12_11:2021-04-12,2021-04-12 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ben Peled When a PCI link down condition is detected, the link training state machine must be disabled immediately. Signed-off-by: Marc St-Amand Signed-off-by: Konstantin Porotchkin Signed-off-by: Ben Peled --- drivers/pci/controller/dwc/pcie-armada8k.c | 38 ++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-armada8k.c b/drivers/pci/controller/dwc/pcie-armada8k.c index 13901f3..b2278b1 100644 --- a/drivers/pci/controller/dwc/pcie-armada8k.c +++ b/drivers/pci/controller/dwc/pcie-armada8k.c @@ -54,6 +54,10 @@ struct armada8k_pcie { #define PCIE_INT_C_ASSERT_MASK BIT(11) #define PCIE_INT_D_ASSERT_MASK BIT(12) +#define PCIE_GLOBAL_INT_CAUSE2_REG (PCIE_VENDOR_REGS_OFFSET + 0x24) +#define PCIE_GLOBAL_INT_MASK2_REG (PCIE_VENDOR_REGS_OFFSET + 0x28) +#define PCIE_INT2_PHY_RST_LINK_DOWN BIT(1) + #define PCIE_ARCACHE_TRC_REG (PCIE_VENDOR_REGS_OFFSET + 0x50) #define PCIE_AWCACHE_TRC_REG (PCIE_VENDOR_REGS_OFFSET + 0x54) #define PCIE_ARUSER_REG (PCIE_VENDOR_REGS_OFFSET + 0x5C) @@ -193,6 +197,11 @@ static void armada8k_pcie_establish_link(struct armada8k_pcie *pcie) PCIE_INT_C_ASSERT_MASK | PCIE_INT_D_ASSERT_MASK; dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_MASK1_REG, reg); + /* Also enable link down interrupts */ + reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_INT_MASK2_REG); + reg |= PCIE_INT2_PHY_RST_LINK_DOWN; + dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_MASK2_REG, reg); + if (!dw_pcie_link_up(pci)) { /* Configuration done. Start LTSSM */ reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG); @@ -230,6 +239,35 @@ static irqreturn_t armada8k_pcie_irq_handler(int irq, void *arg) val = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_INT_CAUSE1_REG); dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_CAUSE1_REG, val); + val = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_INT_CAUSE2_REG); + + if (PCIE_INT2_PHY_RST_LINK_DOWN & val) { + u32 ctrl_reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG); + /* + * The link went down. Disable LTSSM immediately. This + * unlocks the root complex config registers. Downstream + * device accesses will return all-Fs + */ + ctrl_reg &= ~(PCIE_APP_LTSSM_EN); + dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, ctrl_reg); + /* + * Mask link down interrupts. They can be re-enabled once + * the link is retrained. + */ + ctrl_reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_INT_MASK2_REG); + ctrl_reg &= ~PCIE_INT2_PHY_RST_LINK_DOWN; + dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_MASK2_REG, ctrl_reg); + /* + * At this point a worker thread can be triggered to + * initiate a link retrain. If link retrains were + * possible, that is. + */ + dev_dbg(pci->dev, "%s: link went down\n", __func__); + } + + /* Now clear the second interrupt cause. */ + dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_CAUSE2_REG, val); + return IRQ_HANDLED; } -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 05270C433B4 for ; Mon, 12 Apr 2021 15:33:19 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7E32761261 for ; Mon, 12 Apr 2021 15:33:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7E32761261 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=marvell.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Jf1hjk1wVIzdvNXWrkmDASsVJz1B6xxfIe3Fio0t9JM=; b=I0tMVuwAGR7DsCNa4OmNfS4H6 KSx8bbVObei0M/0Zvt6Uy0EVLSNYiaepXuxD0ME6I0mc72GIdeEIn5RyvHav/sy3dI0RqkQvRPqiH TpXi0HguoTuZ8PCJZHrUF5ZnlL/LUWndjMfUd4pYeLA0cfUVZBAzKDYiy/7CV9jFjr7gRO4nQeLsr a6AYb1v52bkixOS4JAfqekuZPfWpPk7+hQe6EOSq+4LCPkCOYGb+H+iwA+kwF7gN3A9EMyVNyOBNH 5EPTVCzSP6GBJxfVK3bRikYQBNDIpOSIPJrDdvq93Mm1Lt0NYBVrq/2W57zV3eL2VJFk3ZTnV8fUd UIH5t72hA==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lVyXI-0075rb-P2; Mon, 12 Apr 2021 15:31:36 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lVyX8-0075pu-Ez for linux-arm-kernel@desiato.infradead.org; Mon, 12 Apr 2021 15:31:26 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC: To:From:Sender:Reply-To:Content-ID:Content-Description; bh=1w1aOW3ghY/Ww+N67gF96mJvYXQ0kxUthm1XoYVB+Qs=; b=SQMG+shuiGaL0UfTe0SHrCZ8a3 7q48Wgol1vkzPwOhQQ6PP2XhVBPTwGPOOgUp/ACfE13q5mCPGZHw1DEI9ORj99wBRdOjUCNYm7FHp bl0E0Q9S07YfjJJ9XtAypXdqmgb50kPXrBkmd1m6HG4Y5Wiuewgd8IezfTPuA2hWI3mRhq4ykV4AQ 8jK4xap/ejNRPOWK1nSdT/1LtTSjm6xppwC4PvtG9fimaPcEo1XtK1tL3aPwuZUnb8Ars+Q5lpf3l M02OIO7I5I7DpcXRPZXU1lrnaX9CA9932mWjsWPhmGNpBMvDMtB22SvhMln6jO0EH+YSwJBZDl/QA w71CL3cA==; Received: from mx0a-0016f401.pphosted.com ([67.231.148.174] helo=mx0b-0016f401.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lVyX5-006LRY-SN for linux-arm-kernel@lists.infradead.org; Mon, 12 Apr 2021 15:31:25 +0000 Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.43/8.16.0.43) with SMTP id 13CFVBk6004588; Mon, 12 Apr 2021 08:31:11 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=pfpt0220; bh=1w1aOW3ghY/Ww+N67gF96mJvYXQ0kxUthm1XoYVB+Qs=; b=kaq9aYBbPal/PUIU6NyIipJ3FFRg9k5/qlYxy/dijCi2a8Th+ZJ5W/f7zD0rVHXzlxl/ wtAwGWpPZxhUasZ5SRQ78t9VkOJGLPhgHfUDG22ODTUYV7+EhvYrpvdRVBTEzs2+ozZM R2MKqkYdfqBZYcQ2JeRGjhk9JlV0QCJypYEprxwG5UWDq+kD9Wp7GmFlP++T1AxjpVI4 FHoTbB0M9LZLoJTvfuw6BqXgNQI8VONqTl49C7poomwPR0XQ5e0aaiubDQrDCgo52ssz j+wi0gOD84gVbwl2mFu+vJhJ09KA90/VER8Xb39/Nl9R+LBWP8VLqcs287PFfImCSDPE 4A== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com with ESMTP id 37vcu99xp8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 12 Apr 2021 08:31:11 -0700 Received: from SC-EXCH04.marvell.com (10.93.176.84) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 12 Apr 2021 08:31:09 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 12 Apr 2021 08:31:09 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 12 Apr 2021 08:31:09 -0700 Received: from nw-bp.marvell.com (nw-bp.marvell.com [10.5.24.22]) by maili.marvell.com (Postfix) with ESMTP id 5290F3F7043; Mon, 12 Apr 2021 08:31:05 -0700 (PDT) From: To: , , CC: , , , , , , , , , , , , , , , "Marc St-Amand" Subject: =?UTF-8?q?=5B=E2=80=9DPATCH=E2=80=9D=201/5=5D=20PCI=3A=20armada8k=3A=20Disable=20LTSSM=20on=20link=20down=20interrupts?= Date: Mon, 12 Apr 2021 18:30:52 +0300 Message-ID: <1618241456-27200-2-git-send-email-bpeled@marvell.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1618241456-27200-1-git-send-email-bpeled@marvell.com> References: <1618241456-27200-1-git-send-email-bpeled@marvell.com> MIME-Version: 1.0 X-Proofpoint-GUID: lH0eozCtIxCe8ZuBdcND7yXWxwbA3kra X-Proofpoint-ORIG-GUID: lH0eozCtIxCe8ZuBdcND7yXWxwbA3kra X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-04-12_11:2021-04-12, 2021-04-12 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210412_083123_959230_F6C10600 X-CRM114-Status: GOOD ( 18.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ben Peled When a PCI link down condition is detected, the link training state machine must be disabled immediately. Signed-off-by: Marc St-Amand Signed-off-by: Konstantin Porotchkin Signed-off-by: Ben Peled --- drivers/pci/controller/dwc/pcie-armada8k.c | 38 ++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-armada8k.c b/drivers/pci/controller/dwc/pcie-armada8k.c index 13901f3..b2278b1 100644 --- a/drivers/pci/controller/dwc/pcie-armada8k.c +++ b/drivers/pci/controller/dwc/pcie-armada8k.c @@ -54,6 +54,10 @@ struct armada8k_pcie { #define PCIE_INT_C_ASSERT_MASK BIT(11) #define PCIE_INT_D_ASSERT_MASK BIT(12) +#define PCIE_GLOBAL_INT_CAUSE2_REG (PCIE_VENDOR_REGS_OFFSET + 0x24) +#define PCIE_GLOBAL_INT_MASK2_REG (PCIE_VENDOR_REGS_OFFSET + 0x28) +#define PCIE_INT2_PHY_RST_LINK_DOWN BIT(1) + #define PCIE_ARCACHE_TRC_REG (PCIE_VENDOR_REGS_OFFSET + 0x50) #define PCIE_AWCACHE_TRC_REG (PCIE_VENDOR_REGS_OFFSET + 0x54) #define PCIE_ARUSER_REG (PCIE_VENDOR_REGS_OFFSET + 0x5C) @@ -193,6 +197,11 @@ static void armada8k_pcie_establish_link(struct armada8k_pcie *pcie) PCIE_INT_C_ASSERT_MASK | PCIE_INT_D_ASSERT_MASK; dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_MASK1_REG, reg); + /* Also enable link down interrupts */ + reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_INT_MASK2_REG); + reg |= PCIE_INT2_PHY_RST_LINK_DOWN; + dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_MASK2_REG, reg); + if (!dw_pcie_link_up(pci)) { /* Configuration done. Start LTSSM */ reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG); @@ -230,6 +239,35 @@ static irqreturn_t armada8k_pcie_irq_handler(int irq, void *arg) val = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_INT_CAUSE1_REG); dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_CAUSE1_REG, val); + val = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_INT_CAUSE2_REG); + + if (PCIE_INT2_PHY_RST_LINK_DOWN & val) { + u32 ctrl_reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG); + /* + * The link went down. Disable LTSSM immediately. This + * unlocks the root complex config registers. Downstream + * device accesses will return all-Fs + */ + ctrl_reg &= ~(PCIE_APP_LTSSM_EN); + dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, ctrl_reg); + /* + * Mask link down interrupts. They can be re-enabled once + * the link is retrained. + */ + ctrl_reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_INT_MASK2_REG); + ctrl_reg &= ~PCIE_INT2_PHY_RST_LINK_DOWN; + dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_MASK2_REG, ctrl_reg); + /* + * At this point a worker thread can be triggered to + * initiate a link retrain. If link retrains were + * possible, that is. + */ + dev_dbg(pci->dev, "%s: link went down\n", __func__); + } + + /* Now clear the second interrupt cause. */ + dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_CAUSE2_REG, val); + return IRQ_HANDLED; } -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel