All of lore.kernel.org
 help / color / mirror / Atom feed
From: "tip-bot2 for Josh Poimboeuf" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Josh Poimboeuf <jpoimboe@redhat.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	Sami Tolvanen <samitolvanen@google.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: objtool/core] x86/crypto/aesni-intel_avx: Fix register usage comments
Date: Tue, 20 Apr 2021 10:47:04 -0000	[thread overview]
Message-ID: <161891562414.29796.9900227308617726465.tip-bot2@tip-bot2> (raw)
In-Reply-To: <8655d4513a0ed1eddec609165064153973010aa2.1614182415.git.jpoimboe@redhat.com>

The following commit has been merged into the objtool/core branch of tip:

Commit-ID:     ff5796b6dbea4763fdca002101e32b60aa17f8e8
Gitweb:        https://git.kernel.org/tip/ff5796b6dbea4763fdca002101e32b60aa17f8e8
Author:        Josh Poimboeuf <jpoimboe@redhat.com>
AuthorDate:    Wed, 24 Feb 2021 10:29:16 -06:00
Committer:     Josh Poimboeuf <jpoimboe@redhat.com>
CommitterDate: Mon, 19 Apr 2021 12:36:33 -05:00

x86/crypto/aesni-intel_avx: Fix register usage comments

Fix register usage comments to match reality.

Signed-off-by: Josh Poimboeuf <jpoimboe@redhat.com>
Tested-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Tested-by: Sami Tolvanen <samitolvanen@google.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Herbert Xu <herbert@gondor.apana.org.au>
Link: https://lore.kernel.org/r/8655d4513a0ed1eddec609165064153973010aa2.1614182415.git.jpoimboe@redhat.com
---
 arch/x86/crypto/aesni-intel_avx-x86_64.S | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/x86/crypto/aesni-intel_avx-x86_64.S b/arch/x86/crypto/aesni-intel_avx-x86_64.S
index 4fdf38e..188f184 100644
--- a/arch/x86/crypto/aesni-intel_avx-x86_64.S
+++ b/arch/x86/crypto/aesni-intel_avx-x86_64.S
@@ -286,7 +286,7 @@ VARIABLE_OFFSET = 16*8
 
 # combined for GCM encrypt and decrypt functions
 # clobbering all xmm registers
-# clobbering r10, r11, r12, r13, r14, r15
+# clobbering r10, r11, r12, r13, r15, rax
 .macro  GCM_ENC_DEC INITIAL_BLOCKS GHASH_8_ENCRYPT_8_PARALLEL GHASH_LAST_8 GHASH_MUL ENC_DEC REP
         vmovdqu AadHash(arg2), %xmm8
         vmovdqu  HashKey(arg2), %xmm13      # xmm13 = HashKey
@@ -988,7 +988,7 @@ _partial_block_done_\@:
 ## num_initial_blocks = b mod 4#
 ## encrypt the initial num_initial_blocks blocks and apply ghash on the ciphertext
 ## r10, r11, r12, rax are clobbered
-## arg1, arg3, arg4, r14 are used as a pointer only, not modified
+## arg1, arg2, arg3, arg4 are used as pointers only, not modified
 
 .macro INITIAL_BLOCKS_AVX REP num_initial_blocks T1 T2 T3 T4 T5 CTR XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 T6 T_key ENC_DEC
 	i = (8-\num_initial_blocks)
@@ -1223,7 +1223,7 @@ _initial_blocks_done\@:
 
 # encrypt 8 blocks at a time
 # ghash the 8 previously encrypted ciphertext blocks
-# arg1, arg3, arg4 are used as pointers only, not modified
+# arg1, arg2, arg3, arg4 are used as pointers only, not modified
 # r11 is the data offset value
 .macro GHASH_8_ENCRYPT_8_PARALLEL_AVX REP T1 T2 T3 T4 T5 T6 CTR XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 T7 loop_idx ENC_DEC
 
@@ -1936,7 +1936,7 @@ SYM_FUNC_END(aesni_gcm_finalize_avx_gen2)
 ## num_initial_blocks = b mod 4#
 ## encrypt the initial num_initial_blocks blocks and apply ghash on the ciphertext
 ## r10, r11, r12, rax are clobbered
-## arg1, arg3, arg4, r14 are used as a pointer only, not modified
+## arg1, arg2, arg3, arg4 are used as pointers only, not modified
 
 .macro INITIAL_BLOCKS_AVX2 REP num_initial_blocks T1 T2 T3 T4 T5 CTR XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 T6 T_key ENC_DEC VER
 	i = (8-\num_initial_blocks)
@@ -2178,7 +2178,7 @@ _initial_blocks_done\@:
 
 # encrypt 8 blocks at a time
 # ghash the 8 previously encrypted ciphertext blocks
-# arg1, arg3, arg4 are used as pointers only, not modified
+# arg1, arg2, arg3, arg4 are used as pointers only, not modified
 # r11 is the data offset value
 .macro GHASH_8_ENCRYPT_8_PARALLEL_AVX2 REP T1 T2 T3 T4 T5 T6 CTR XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 T7 loop_idx ENC_DEC
 

  reply	other threads:[~2021-04-20 10:49 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-24 16:29 [PATCH 00/13] x86/crypto/asm: objtool support Josh Poimboeuf
2021-02-24 16:29 ` [PATCH 01/13] objtool: Support asm jump tables Josh Poimboeuf
2021-04-20 10:47   ` [tip: objtool/core] " tip-bot2 for Josh Poimboeuf
2021-02-24 16:29 ` [PATCH 02/13] x86/crypto/aesni-intel_avx: Remove unused macros Josh Poimboeuf
2021-04-20 10:47   ` [tip: objtool/core] " tip-bot2 for Josh Poimboeuf
2021-02-24 16:29 ` [PATCH 03/13] x86/crypto/aesni-intel_avx: Fix register usage comments Josh Poimboeuf
2021-04-20 10:47   ` tip-bot2 for Josh Poimboeuf [this message]
2021-02-24 16:29 ` [PATCH 04/13] x86/crypto/aesni-intel_avx: Standardize stack alignment prologue Josh Poimboeuf
2021-02-25  9:38   ` Peter Zijlstra
2021-04-20 10:47   ` [tip: objtool/core] " tip-bot2 for Josh Poimboeuf
2021-02-24 16:29 ` [PATCH 05/13] x86/crypto/camellia-aesni-avx2: Unconditionally allocate stack buffer Josh Poimboeuf
2021-04-20 10:47   ` [tip: objtool/core] " tip-bot2 for Josh Poimboeuf
2021-02-24 16:29 ` [PATCH 06/13] x86/crypto/crc32c-pcl-intel: Standardize jump table Josh Poimboeuf
2021-04-20 10:47   ` [tip: objtool/core] " tip-bot2 for Josh Poimboeuf
2021-02-24 16:29 ` [PATCH 07/13] x86/crypto/sha_ni: Standardize stack alignment prologue Josh Poimboeuf
2021-04-20 10:47   ` [tip: objtool/core] " tip-bot2 for Josh Poimboeuf
2021-02-24 16:29 ` [PATCH 08/13] x86/crypto/sha1_avx2: " Josh Poimboeuf
2021-04-20 10:47   ` [tip: objtool/core] " tip-bot2 for Josh Poimboeuf
2021-02-24 16:29 ` [PATCH 09/13] x86/crypto/sha256-avx2: " Josh Poimboeuf
2021-04-20 10:47   ` [tip: objtool/core] " tip-bot2 for Josh Poimboeuf
2021-02-24 16:29 ` [PATCH 10/13] x86/crypto/sha512-avx: " Josh Poimboeuf
2021-04-20 10:47   ` [tip: objtool/core] " tip-bot2 for Josh Poimboeuf
2021-02-24 16:29 ` [PATCH 11/13] x86/crypto/sha512-avx2: " Josh Poimboeuf
2021-04-20 10:47   ` [tip: objtool/core] " tip-bot2 for Josh Poimboeuf
2021-02-24 16:29 ` [PATCH 12/13] x86/crypto/sha512-ssse3: " Josh Poimboeuf
2021-04-20 10:47   ` [tip: objtool/core] " tip-bot2 for Josh Poimboeuf
2021-02-24 16:29 ` [PATCH 13/13] x86/crypto: Enable objtool in crypto code Josh Poimboeuf
2021-04-20 10:47   ` [tip: objtool/core] " tip-bot2 for Josh Poimboeuf
2021-02-24 17:10 ` [PATCH 00/13] x86/crypto/asm: objtool support Ard Biesheuvel
2021-02-24 21:48 ` Sami Tolvanen
2021-02-25  9:46 ` Peter Zijlstra
2021-02-25 13:29   ` Josh Poimboeuf
2021-03-03  8:47 ` Herbert Xu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=161891562414.29796.9900227308617726465.tip-bot2@tip-bot2 \
    --to=tip-bot2@linutronix.de \
    --cc=ardb@kernel.org \
    --cc=herbert@gondor.apana.org.au \
    --cc=jpoimboe@redhat.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-tip-commits@vger.kernel.org \
    --cc=peterz@infradead.org \
    --cc=samitolvanen@google.com \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.