From: Wang Xingang <wangxingang5@huawei.com>
To: <qemu-devel@nongnu.org>, <qemu-arm@nongnu.org>,
<eric.auger@redhat.com>, <shannon.zhaosl@gmail.com>,
<imammedo@redhat.com>, <mst@redhat.com>,
<marcel.apfelbaum@gmail.com>, <peter.maydell@linaro.org>,
<ehabkost@redhat.com>, <richard.henderson@linaro.org>,
<pbonzini@redhat.com>
Cc: xieyingtai@huawei.com, cenjiahui@huawei.com, wangxingang5@huawei.com
Subject: [PATCH RFC v3 8/8] hw/i386/acpi-build: Add bypass_iommu check when building IVRS table
Date: Wed, 21 Apr 2021 08:05:03 +0000 [thread overview]
Message-ID: <1618992303-19556-9-git-send-email-wangxingang5@huawei.com> (raw)
In-Reply-To: <1618992303-19556-1-git-send-email-wangxingang5@huawei.com>
From: Xingang Wang <wangxingang5@huawei.com>
When building IVRS table, only devices which go through iommu
will be scanned, and the corresponding ivhd will be inserted.
Signed-off-by: Xingang Wang <wangxingang5@huawei.com>
Signed-off-by: Jiahui Cen <cenjiahui@huawei.com>
---
hw/i386/acpi-build.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index fdb26682cb..71fb95737c 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2229,7 +2229,7 @@ ivrs_host_bridges(Object *obj, void *opaque)
if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) {
PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus;
- if (bus) {
+ if (bus && !pci_bus_bypass_iommu(bus)) {
pci_for_each_device(bus, pci_bus_num(bus), insert_ivhd, ivhd_blob);
}
}
--
2.19.1
prev parent reply other threads:[~2021-04-21 8:09 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-21 8:04 [PATCH RFC v3 0/8] Introduce Bypass IOMMU Feature Wang Xingang
2021-04-21 8:04 ` [PATCH RFC v3 1/8] hw/pci/pci_host: Allow bypass iommu for pci host Wang Xingang
2021-04-21 8:04 ` [PATCH RFC v3 2/8] hw/pxb: Add a bypass iommu property Wang Xingang
2021-04-21 8:04 ` [PATCH RFC v3 3/8] hw/arm/virt: Add a machine option to bypass iommu for primary bus Wang Xingang
2021-04-21 8:04 ` [PATCH RFC v3 4/8] hw/i386: Add a pc " Wang Xingang
2021-04-21 8:05 ` [PATCH RFC v3 5/8] hw/pci: Add pci_bus_range to get bus number range Wang Xingang
2021-04-21 8:05 ` [PATCH RFC v3 6/8] hw/arm/virt-acpi-build: Add explicit IORT idmap for smmuv3 node Wang Xingang
2021-04-21 8:05 ` [PATCH RFC v3 7/8] hw/i386/acpi-build: Add explicit scope in DMAR table Wang Xingang
2021-04-21 8:05 ` Wang Xingang [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1618992303-19556-9-git-send-email-wangxingang5@huawei.com \
--to=wangxingang5@huawei.com \
--cc=cenjiahui@huawei.com \
--cc=ehabkost@redhat.com \
--cc=eric.auger@redhat.com \
--cc=imammedo@redhat.com \
--cc=marcel.apfelbaum@gmail.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=shannon.zhaosl@gmail.com \
--cc=xieyingtai@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.