From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00,DATE_IN_PAST_06_12, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CECEC433ED for ; Mon, 10 May 2021 22:02:14 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0CCF561040 for ; Mon, 10 May 2021 22:02:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231327AbhEJWDR (ORCPT ); Mon, 10 May 2021 18:03:17 -0400 Received: from mga17.intel.com ([192.55.52.151]:47616 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232784AbhEJWDK (ORCPT ); Mon, 10 May 2021 18:03:10 -0400 IronPort-SDR: qzpJl+KsdoVmiOkVpdJ23HBpo4Pz5TpGys+bJxIcBvIZnlHV2gAiSmy/+Kp72unX/CuwiaJWTJ 9JhmN+XyudKQ== X-IronPort-AV: E=McAfee;i="6200,9189,9980"; a="179563404" X-IronPort-AV: E=Sophos;i="5.82,288,1613462400"; d="scan'208";a="179563404" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 May 2021 15:02:03 -0700 IronPort-SDR: WJywY7E4QZE787awLwdc1wnCIyxTgP51poMqJOjYh/KIm3x57xTa3EcdedETjSMtyVVUi1QIs+ cP9xbHMoy3PQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,288,1613462400"; d="scan'208";a="470919102" Received: from otc-wp-03.jf.intel.com ([10.54.39.79]) by orsmga001.jf.intel.com with ESMTP; 10 May 2021 15:01:27 -0700 From: Jacob Pan To: LKML , iommu@lists.linux-foundation.org, Joerg Roedel , "Lu Baolu" , Jean-Philippe Brucker Cc: "Christoph Hellwig" , Yi Liu , Raj Ashok , "Tian, Kevin" , Jason Gunthorpe , Dave Jiang , wangzhou1@hisilicon.com, zhangfei.gao@linaro.org, vkoul@kernel.org, Jacob Pan Subject: [PATCH v4 1/2] iommu/sva: Tighten SVA bind API with explicit flags Date: Mon, 10 May 2021 06:25:07 -0700 Message-Id: <1620653108-44901-2-git-send-email-jacob.jun.pan@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1620653108-44901-1-git-send-email-jacob.jun.pan@linux.intel.com> References: <1620653108-44901-1-git-send-email-jacob.jun.pan@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The void* drvdata parameter isn't really used in iommu_sva_bind_device() API, the current IDXD code "borrows" the drvdata for a VT-d private flag for supervisor SVA usage. Supervisor/Privileged mode request is a generic feature. It should be promoted from the VT-d vendor driver to the generic code. This patch replaces void* drvdata with a unsigned int flags parameter and adjusts callers accordingly. Link: https://lore.kernel.org/linux-iommu/YFhiMLR35WWMW%2FHu@myrica/ Suggested-by: Jean-Philippe Brucker Signed-off-by: Jacob Pan --- drivers/dma/idxd/cdev.c | 2 +- drivers/dma/idxd/init.c | 7 ++----- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 5 ++++- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 4 ++-- drivers/iommu/intel/svm.c | 14 ++++---------- drivers/iommu/iommu.c | 9 ++++++--- drivers/misc/uacce/uacce.c | 2 +- include/linux/intel-iommu.h | 2 +- include/linux/intel-svm.h | 12 ------------ include/linux/iommu.h | 19 ++++++++++++++++--- 10 files changed, 37 insertions(+), 39 deletions(-) diff --git a/drivers/dma/idxd/cdev.c b/drivers/dma/idxd/cdev.c index 302cba5ff779..04e3813b613c 100644 --- a/drivers/dma/idxd/cdev.c +++ b/drivers/dma/idxd/cdev.c @@ -100,7 +100,7 @@ static int idxd_cdev_open(struct inode *inode, struct file *filp) filp->private_data = ctx; if (device_pasid_enabled(idxd)) { - sva = iommu_sva_bind_device(dev, current->mm, NULL); + sva = iommu_sva_bind_device(dev, current->mm, 0); if (IS_ERR(sva)) { rc = PTR_ERR(sva); dev_err(dev, "pasid allocation failed: %d\n", rc); diff --git a/drivers/dma/idxd/init.c b/drivers/dma/idxd/init.c index 2a926bef87f2..6f75c29d3616 100644 --- a/drivers/dma/idxd/init.c +++ b/drivers/dma/idxd/init.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include @@ -457,13 +456,11 @@ static struct idxd_device *idxd_alloc(struct pci_dev *pdev, struct idxd_driver_d static int idxd_enable_system_pasid(struct idxd_device *idxd) { - int flags; unsigned int pasid; struct iommu_sva *sva; - flags = SVM_FLAG_SUPERVISOR_MODE; - - sva = iommu_sva_bind_device(&idxd->pdev->dev, NULL, &flags); + sva = iommu_sva_bind_device(&idxd->pdev->dev, NULL, + IOMMU_SVA_BIND_SUPERVISOR); if (IS_ERR(sva)) { dev_warn(&idxd->pdev->dev, "iommu sva bind failed: %ld\n", PTR_ERR(sva)); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c index bb251cab61f3..145ceb2fc5da 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -354,12 +354,15 @@ __arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm) } struct iommu_sva * -arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm, void *drvdata) +arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm, unsigned int flags) { struct iommu_sva *handle; struct iommu_domain *domain = iommu_get_domain_for_dev(dev); struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); + if (flags) + return ERR_PTR(-EINVAL); + if (smmu_domain->stage != ARM_SMMU_DOMAIN_S1) return ERR_PTR(-EINVAL); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h index 46e8c49214a8..3a4f24da59d9 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -717,7 +717,7 @@ bool arm_smmu_master_sva_enabled(struct arm_smmu_master *master); int arm_smmu_master_enable_sva(struct arm_smmu_master *master); int arm_smmu_master_disable_sva(struct arm_smmu_master *master); struct iommu_sva *arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm, - void *drvdata); + unsigned int flags); void arm_smmu_sva_unbind(struct iommu_sva *handle); u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle); void arm_smmu_sva_notifier_synchronize(void); @@ -748,7 +748,7 @@ static inline int arm_smmu_master_disable_sva(struct arm_smmu_master *master) } static inline struct iommu_sva * -arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm, void *drvdata) +arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm, unsigned int flags) { return ERR_PTR(-ENODEV); } diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index 5165cea90421..531f03d13bd5 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -485,12 +485,9 @@ intel_svm_bind_mm(struct device *dev, unsigned int flags, } else pasid_max = 1 << 20; - /* Bind supervisor PASID shuld have mm = NULL */ - if (flags & SVM_FLAG_SUPERVISOR_MODE) { - if (!ecap_srs(iommu->ecap) || mm) { - pr_err("Supervisor PASID with user provided mm.\n"); - return -EINVAL; - } + if ((flags & IOMMU_SVA_BIND_SUPERVISOR) && !ecap_srs(iommu->ecap)) { + pr_err("Supervisor PASID not supported.\n"); + return -EINVAL; } list_for_each_entry(t, &global_svm_list, list) { @@ -1055,11 +1052,10 @@ static irqreturn_t prq_event_thread(int irq, void *d) #define to_intel_svm_dev(handle) container_of(handle, struct intel_svm_dev, sva) struct iommu_sva * -intel_svm_bind(struct device *dev, struct mm_struct *mm, void *drvdata) +intel_svm_bind(struct device *dev, struct mm_struct *mm, unsigned int flags) { struct iommu_sva *sva = ERR_PTR(-EINVAL); struct intel_svm_dev *sdev = NULL; - unsigned int flags = 0; int ret; /* @@ -1067,8 +1063,6 @@ intel_svm_bind(struct device *dev, struct mm_struct *mm, void *drvdata) * It will require shared SVM data structures, i.e. combine io_mm * and intel_svm etc. */ - if (drvdata) - flags = *(unsigned int *)drvdata; mutex_lock(&pasid_mutex); ret = intel_svm_bind_mm(dev, flags, mm, &sdev); if (ret) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 808ab70d5df5..04e7ec640284 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -2949,6 +2949,7 @@ EXPORT_SYMBOL_GPL(iommu_aux_get_pasid); * iommu_sva_bind_device() - Bind a process address space to a device * @dev: the device * @mm: the mm to bind, caller must hold a reference to it + * @flags: options for the bind operation defined as IOMMU_SVA_BIND_* * * Create a bond between device and address space, allowing the device to access * the mm using the returned PASID. If a bond already exists between @device and @@ -2961,7 +2962,7 @@ EXPORT_SYMBOL_GPL(iommu_aux_get_pasid); * On error, returns an ERR_PTR value. */ struct iommu_sva * -iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata) +iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, unsigned int flags) { struct iommu_group *group; struct iommu_sva *handle = ERR_PTR(-EINVAL); @@ -2974,6 +2975,9 @@ iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata) if (!group) return ERR_PTR(-ENODEV); + /* Supervisor SVA does not need the current mm */ + if ((flags & IOMMU_SVA_BIND_SUPERVISOR) && mm) + return ERR_PTR(-EINVAL); /* Ensure device count and domain don't change while we're binding */ mutex_lock(&group->mutex); @@ -2986,8 +2990,7 @@ iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata) if (iommu_group_device_count(group) != 1) goto out_unlock; - handle = ops->sva_bind(dev, mm, drvdata); - + handle = ops->sva_bind(dev, mm, flags); out_unlock: mutex_unlock(&group->mutex); iommu_group_put(group); diff --git a/drivers/misc/uacce/uacce.c b/drivers/misc/uacce/uacce.c index bae18ef03dcb..1357427d497a 100644 --- a/drivers/misc/uacce/uacce.c +++ b/drivers/misc/uacce/uacce.c @@ -99,7 +99,7 @@ static int uacce_bind_queue(struct uacce_device *uacce, struct uacce_queue *q) if (!(uacce->flags & UACCE_DEV_SVA)) return 0; - handle = iommu_sva_bind_device(uacce->parent, current->mm, NULL); + handle = iommu_sva_bind_device(uacce->parent, current->mm, 0); if (IS_ERR(handle)) return PTR_ERR(handle); diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index 03faf20a6817..a93966361754 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -764,7 +764,7 @@ int intel_svm_bind_gpasid(struct iommu_domain *domain, struct device *dev, struct iommu_gpasid_bind_data *data); int intel_svm_unbind_gpasid(struct device *dev, u32 pasid); struct iommu_sva *intel_svm_bind(struct device *dev, struct mm_struct *mm, - void *drvdata); + unsigned int flags); void intel_svm_unbind(struct iommu_sva *handle); u32 intel_svm_get_pasid(struct iommu_sva *handle); int intel_svm_page_response(struct device *dev, struct iommu_fault_event *evt, diff --git a/include/linux/intel-svm.h b/include/linux/intel-svm.h index 10fa80eef13a..6fb41c69b7c0 100644 --- a/include/linux/intel-svm.h +++ b/include/linux/intel-svm.h @@ -14,18 +14,6 @@ #define SVM_REQ_EXEC (1<<1) #define SVM_REQ_PRIV (1<<0) -/* - * The SVM_FLAG_SUPERVISOR_MODE flag requests a PASID which can be used only - * for access to kernel addresses. No IOTLB flushes are automatically done - * for kernel mappings; it is valid only for access to the kernel's static - * 1:1 mapping of physical memory — not to vmalloc or even module mappings. - * A future API addition may permit the use of such ranges, by means of an - * explicit IOTLB flush call (akin to the DMA API's unmap method). - * - * It is unlikely that we will ever hook into flush_tlb_kernel_range() to - * do such IOTLB flushes automatically. - */ -#define SVM_FLAG_SUPERVISOR_MODE BIT(0) /* * The SVM_FLAG_GUEST_MODE flag is used when a PASID bind is for guest * processes. Compared to the host bind, the primary differences are: diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 32d448050bf7..fcc9d36b4b01 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -152,6 +152,19 @@ enum iommu_dev_features { #define IOMMU_PASID_INVALID (-1U) +/* + * The IOMMU_SVA_BIND_SUPERVISOR flag requests a PASID which can be used only + * for access to kernel addresses. No IOTLB flushes are automatically done + * for kernel mappings; it is valid only for access to the kernel's static + * 1:1 mapping of physical memory — not to vmalloc or even module mappings. + * A future API addition may permit the use of such ranges, by means of an + * explicit IOTLB flush call (akin to the DMA API's unmap method). + * + * It is unlikely that we will ever hook into flush_tlb_kernel_range() to + * do such IOTLB flushes automatically. + */ +#define IOMMU_SVA_BIND_SUPERVISOR BIT(0) + #ifdef CONFIG_IOMMU_API /** @@ -267,7 +280,7 @@ struct iommu_ops { int (*aux_get_pasid)(struct iommu_domain *domain, struct device *dev); struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm, - void *drvdata); + unsigned int flags); void (*sva_unbind)(struct iommu_sva *handle); u32 (*sva_get_pasid)(struct iommu_sva *handle); @@ -600,7 +613,7 @@ int iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev); struct iommu_sva *iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, - void *drvdata); + unsigned int flags); void iommu_sva_unbind_device(struct iommu_sva *handle); u32 iommu_sva_get_pasid(struct iommu_sva *handle); @@ -954,7 +967,7 @@ iommu_aux_get_pasid(struct iommu_domain *domain, struct device *dev) } static inline struct iommu_sva * -iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvdata) +iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, unsigned int flags) { return NULL; } -- 2.25.1 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.2 required=3.0 tests=BAYES_00,DATE_IN_PAST_06_12, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org 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by smtp4.osuosl.org (Postfix) with ESMTPS id EF4B0403C0 for ; Mon, 10 May 2021 22:02:04 +0000 (UTC) IronPort-SDR: JDlSxDnmQt0DlCaKlFHEeklJWXgjGa82iG5S91RRvkmhA7GRYmFTOoFbuRHlxENMr5kRmbWIXy mDhfaitvzrUQ== X-IronPort-AV: E=McAfee;i="6200,9189,9980"; a="263229068" X-IronPort-AV: E=Sophos;i="5.82,288,1613462400"; d="scan'208";a="263229068" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 10 May 2021 15:02:03 -0700 IronPort-SDR: WJywY7E4QZE787awLwdc1wnCIyxTgP51poMqJOjYh/KIm3x57xTa3EcdedETjSMtyVVUi1QIs+ cP9xbHMoy3PQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.82,288,1613462400"; d="scan'208";a="470919102" Received: from otc-wp-03.jf.intel.com ([10.54.39.79]) by orsmga001.jf.intel.com with ESMTP; 10 May 2021 15:01:27 -0700 From: Jacob Pan To: LKML , iommu@lists.linux-foundation.org, Joerg Roedel , "Lu Baolu" , Jean-Philippe Brucker Subject: [PATCH v4 1/2] iommu/sva: Tighten SVA bind API with explicit flags Date: Mon, 10 May 2021 06:25:07 -0700 Message-Id: <1620653108-44901-2-git-send-email-jacob.jun.pan@linux.intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1620653108-44901-1-git-send-email-jacob.jun.pan@linux.intel.com> References: <1620653108-44901-1-git-send-email-jacob.jun.pan@linux.intel.com> MIME-Version: 1.0 Cc: "Tian, Kevin" , Dave Jiang , Raj Ashok , vkoul@kernel.org, Christoph Hellwig , Jason Gunthorpe , zhangfei.gao@linaro.org X-BeenThere: iommu@lists.linux-foundation.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Development issues for Linux IOMMU support List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: iommu-bounces@lists.linux-foundation.org Sender: "iommu" VGhlIHZvaWQqIGRydmRhdGEgcGFyYW1ldGVyIGlzbid0IHJlYWxseSB1c2VkIGluwqBpb21tdV9z dmFfYmluZF9kZXZpY2UoKQpBUEksIHRoZSBjdXJyZW50IElEWEQgY29kZSAiYm9ycm93cyIgdGhl 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