From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10367C43461 for ; Tue, 18 May 2021 07:24:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E49E161059 for ; Tue, 18 May 2021 07:24:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347214AbhERHZn (ORCPT ); Tue, 18 May 2021 03:25:43 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:3008 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241161AbhERHZO (ORCPT ); Tue, 18 May 2021 03:25:14 -0400 Received: from dggems705-chm.china.huawei.com (unknown [172.30.72.59]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4FknTP6md1zQplm; Tue, 18 May 2021 15:20:25 +0800 (CST) Received: from dggema757-chm.china.huawei.com (10.1.198.199) by dggems705-chm.china.huawei.com (10.3.19.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2176.2; Tue, 18 May 2021 15:23:54 +0800 Received: from localhost.localdomain (10.69.192.56) by dggema757-chm.china.huawei.com (10.1.198.199) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 18 May 2021 15:23:54 +0800 From: Qi Liu To: , , CC: , , , Subject: [PATCH 7/9] drivers/perf: Remove redundant macro and functions in fsl_imx8_ddr_perf.c Date: Tue, 18 May 2021 15:23:46 +0800 Message-ID: <1621322628-9945-8-git-send-email-liuqi115@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1621322628-9945-1-git-send-email-liuqi115@huawei.com> References: <1621322628-9945-1-git-send-email-liuqi115@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To dggema757-chm.china.huawei.com (10.1.198.199) X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Remove IMX8_DDR_PMU_EVENT_ATTR and ddr_pmu_event_show(), as there is a general function for this. Signed-off-by: Qi Liu --- drivers/perf/fsl_imx8_ddr_perf.c | 80 ++++++++++++++++------------------------ 1 file changed, 32 insertions(+), 48 deletions(-) diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_perf.c index 2bbb931..8f2c4dd 100644 --- a/drivers/perf/fsl_imx8_ddr_perf.c +++ b/drivers/perf/fsl_imx8_ddr_perf.c @@ -212,55 +212,39 @@ static const struct attribute_group ddr_perf_cpumask_attr_group = { .attrs = ddr_perf_cpumask_attrs, }; -static ssize_t -ddr_pmu_event_show(struct device *dev, struct device_attribute *attr, - char *page) -{ - struct perf_pmu_events_attr *pmu_attr; - - pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr); - return sysfs_emit(page, "event=0x%02llx\n", pmu_attr->id); -} - -#define IMX8_DDR_PMU_EVENT_ATTR(_name, _id) \ - (&((struct perf_pmu_events_attr[]) { \ - { .attr = __ATTR(_name, 0444, ddr_pmu_event_show, NULL),\ - .id = _id, } \ - })[0].attr.attr) - static struct attribute *ddr_perf_events_attrs[] = { - IMX8_DDR_PMU_EVENT_ATTR(cycles, EVENT_CYCLES_ID), - IMX8_DDR_PMU_EVENT_ATTR(selfresh, 0x01), - IMX8_DDR_PMU_EVENT_ATTR(read-accesses, 0x04), - IMX8_DDR_PMU_EVENT_ATTR(write-accesses, 0x05), - IMX8_DDR_PMU_EVENT_ATTR(read-queue-depth, 0x08), - IMX8_DDR_PMU_EVENT_ATTR(write-queue-depth, 0x09), - IMX8_DDR_PMU_EVENT_ATTR(lp-read-credit-cnt, 0x10), - IMX8_DDR_PMU_EVENT_ATTR(hp-read-credit-cnt, 0x11), - IMX8_DDR_PMU_EVENT_ATTR(write-credit-cnt, 0x12), - IMX8_DDR_PMU_EVENT_ATTR(read-command, 0x20), - IMX8_DDR_PMU_EVENT_ATTR(write-command, 0x21), - IMX8_DDR_PMU_EVENT_ATTR(read-modify-write-command, 0x22), - IMX8_DDR_PMU_EVENT_ATTR(hp-read, 0x23), - IMX8_DDR_PMU_EVENT_ATTR(hp-req-nocredit, 0x24), - IMX8_DDR_PMU_EVENT_ATTR(hp-xact-credit, 0x25), - IMX8_DDR_PMU_EVENT_ATTR(lp-req-nocredit, 0x26), - IMX8_DDR_PMU_EVENT_ATTR(lp-xact-credit, 0x27), - IMX8_DDR_PMU_EVENT_ATTR(wr-xact-credit, 0x29), - IMX8_DDR_PMU_EVENT_ATTR(read-cycles, 0x2a), - IMX8_DDR_PMU_EVENT_ATTR(write-cycles, 0x2b), - IMX8_DDR_PMU_EVENT_ATTR(read-write-transition, 0x30), - IMX8_DDR_PMU_EVENT_ATTR(precharge, 0x31), - IMX8_DDR_PMU_EVENT_ATTR(activate, 0x32), - IMX8_DDR_PMU_EVENT_ATTR(load-mode, 0x33), - IMX8_DDR_PMU_EVENT_ATTR(perf-mwr, 0x34), - IMX8_DDR_PMU_EVENT_ATTR(read, 0x35), - IMX8_DDR_PMU_EVENT_ATTR(read-activate, 0x36), - IMX8_DDR_PMU_EVENT_ATTR(refresh, 0x37), - IMX8_DDR_PMU_EVENT_ATTR(write, 0x38), - IMX8_DDR_PMU_EVENT_ATTR(raw-hazard, 0x39), - IMX8_DDR_PMU_EVENT_ATTR(axid-read, 0x41), - IMX8_DDR_PMU_EVENT_ATTR(axid-write, 0x42), + PMU_EVENT_ATTR_ID(cycles, EVENT_CYCLES_ID), + PMU_EVENT_ATTR_ID(selfresh, 0x01), + PMU_EVENT_ATTR_ID(read-accesses, 0x04), + PMU_EVENT_ATTR_ID(write-accesses, 0x05), + PMU_EVENT_ATTR_ID(read-queue-depth, 0x08), + PMU_EVENT_ATTR_ID(write-queue-depth, 0x09), + PMU_EVENT_ATTR_ID(lp-read-credit-cnt, 0x10), + PMU_EVENT_ATTR_ID(hp-read-credit-cnt, 0x11), + PMU_EVENT_ATTR_ID(write-credit-cnt, 0x12), + PMU_EVENT_ATTR_ID(read-command, 0x20), + PMU_EVENT_ATTR_ID(write-command, 0x21), + PMU_EVENT_ATTR_ID(read-modify-write-command, 0x22), + PMU_EVENT_ATTR_ID(hp-read, 0x23), + PMU_EVENT_ATTR_ID(hp-req-nocredit, 0x24), + PMU_EVENT_ATTR_ID(hp-xact-credit, 0x25), + PMU_EVENT_ATTR_ID(lp-req-nocredit, 0x26), + PMU_EVENT_ATTR_ID(lp-xact-credit, 0x27), + PMU_EVENT_ATTR_ID(wr-xact-credit, 0x29), + PMU_EVENT_ATTR_ID(read-cycles, 0x2a), + PMU_EVENT_ATTR_ID(write-cycles, 0x2b), + PMU_EVENT_ATTR_ID(read-write-transition, 0x30), + PMU_EVENT_ATTR_ID(precharge, 0x31), + PMU_EVENT_ATTR_ID(activate, 0x32), + PMU_EVENT_ATTR_ID(load-mode, 0x33), + PMU_EVENT_ATTR_ID(perf-mwr, 0x34), + PMU_EVENT_ATTR_ID(read, 0x35), + PMU_EVENT_ATTR_ID(read-activate, 0x36), + PMU_EVENT_ATTR_ID(refresh, 0x37), + PMU_EVENT_ATTR_ID(write, 0x38), + PMU_EVENT_ATTR_ID(raw-hazard, 0x39), + PMU_EVENT_ATTR_ID(axid-read, 0x41), + PMU_EVENT_ATTR_ID(axid-write, 0x42), NULL, }; -- 2.7.4 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC344C433ED for ; Tue, 18 May 2021 07:31:29 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 43E4D61261 for ; Tue, 18 May 2021 07:31:29 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 43E4D61261 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=tfRg0thvRlWOfczWtzS5bReNcQtS1Gx36T2aOWchZUM=; b=pKAQiR1bn13PSloOnsMmOjqUQ 730qFCEL/LGUla9PRNQYHT/xL9FPIMCAHCE0fXxb0Mwt18Zx7+qDwjFYNYstOyzlRveejcwHp4lgy 1TYBXnAYgdADZS14RgQMYcuw96Hd2zINhNakCu1aX9APPnsv6B4MJ51gD0X/y+UtedrOGwksRzmIS WfXmABlnUrzsxyTgddfnFaY/UpZubR1Go3/fqENOdKF3wZjIFFFNFar3n7jpVKq6v5WP9RcB5lQZ8 rX0qh2cmFKOJKdcFXocP1zgIS5vZOoBlqH1mwFI5zHlXynDAYZ6pE7/YK51V9VwnQ8QHxjrQe6oqU Oj1yvdn3w==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1liuAm-00HM5H-Mc; Tue, 18 May 2021 07:29:49 +0000 Received: from bombadil.infradead.org ([2607:7c80:54:e::133]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1liu5I-00HJm4-7N for linux-arm-kernel@desiato.infradead.org; Tue, 18 May 2021 07:24:08 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20210309; h=Content-Type:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:CC:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=y+ZtrhJ8SDNIHy36LhMwVlNebQk7a6iCuDGXCaWMCPs=; b=oi/LlsglULeL2m92Z3noBkx9A5 lQj0UMRoCnkH44Z8eHcU3q2or/U/E7VnCCPoIDeCo/6wrWjfiEBw95kqPKYJ8MMmrs+LfWkxaEDzN UTWfb1yCzrOb4KMFtcnEyT6WAEfnaYatj6BUqp747nWGzPEhv136r/4yWW5JgRVb701yMfUXHMCwf KREFkH3A58Z8WwypRZZX+GDi4z8wVB4lbCZgGAfcztfGeR7RmqJr+QrgSQQIiE5pnZJ0lUWqjiYof +lZpg8wPDIWP2MhqVqIWLPtSiYg8M58iAXrFkH+d9pTzK1Q/ymim/U/G1beSWgyPLL4kGysBP0qcs hUkyfT/A==; Received: from szxga05-in.huawei.com ([45.249.212.191]) by bombadil.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1liu5C-00EPNC-9M for linux-arm-kernel@lists.infradead.org; Tue, 18 May 2021 07:24:06 +0000 Received: from dggems705-chm.china.huawei.com (unknown [172.30.72.59]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4FknTP6md1zQplm; Tue, 18 May 2021 15:20:25 +0800 (CST) Received: from dggema757-chm.china.huawei.com (10.1.198.199) by dggems705-chm.china.huawei.com (10.3.19.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2176.2; Tue, 18 May 2021 15:23:54 +0800 Received: from localhost.localdomain (10.69.192.56) by dggema757-chm.china.huawei.com (10.1.198.199) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 18 May 2021 15:23:54 +0800 From: Qi Liu To: , , CC: , , , Subject: [PATCH 7/9] drivers/perf: Remove redundant macro and functions in fsl_imx8_ddr_perf.c Date: Tue, 18 May 2021 15:23:46 +0800 Message-ID: <1621322628-9945-8-git-send-email-liuqi115@huawei.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1621322628-9945-1-git-send-email-liuqi115@huawei.com> References: <1621322628-9945-1-git-send-email-liuqi115@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-ClientProxiedBy: dggems705-chm.china.huawei.com (10.3.19.182) To dggema757-chm.china.huawei.com (10.1.198.199) X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210518_002402_687928_B267D27D X-CRM114-Status: GOOD ( 10.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove IMX8_DDR_PMU_EVENT_ATTR and ddr_pmu_event_show(), as there is a general function for this. Signed-off-by: Qi Liu --- drivers/perf/fsl_imx8_ddr_perf.c | 80 ++++++++++++++++------------------------ 1 file changed, 32 insertions(+), 48 deletions(-) diff --git a/drivers/perf/fsl_imx8_ddr_perf.c b/drivers/perf/fsl_imx8_ddr_perf.c index 2bbb931..8f2c4dd 100644 --- a/drivers/perf/fsl_imx8_ddr_perf.c +++ b/drivers/perf/fsl_imx8_ddr_perf.c @@ -212,55 +212,39 @@ static const struct attribute_group ddr_perf_cpumask_attr_group = { .attrs = ddr_perf_cpumask_attrs, }; -static ssize_t -ddr_pmu_event_show(struct device *dev, struct device_attribute *attr, - char *page) -{ - struct perf_pmu_events_attr *pmu_attr; - - pmu_attr = container_of(attr, struct perf_pmu_events_attr, attr); - return sysfs_emit(page, "event=0x%02llx\n", pmu_attr->id); -} - -#define IMX8_DDR_PMU_EVENT_ATTR(_name, _id) \ - (&((struct perf_pmu_events_attr[]) { \ - { .attr = __ATTR(_name, 0444, ddr_pmu_event_show, NULL),\ - .id = _id, } \ - })[0].attr.attr) - static struct attribute *ddr_perf_events_attrs[] = { - IMX8_DDR_PMU_EVENT_ATTR(cycles, EVENT_CYCLES_ID), - IMX8_DDR_PMU_EVENT_ATTR(selfresh, 0x01), - IMX8_DDR_PMU_EVENT_ATTR(read-accesses, 0x04), - IMX8_DDR_PMU_EVENT_ATTR(write-accesses, 0x05), - IMX8_DDR_PMU_EVENT_ATTR(read-queue-depth, 0x08), - IMX8_DDR_PMU_EVENT_ATTR(write-queue-depth, 0x09), - IMX8_DDR_PMU_EVENT_ATTR(lp-read-credit-cnt, 0x10), - IMX8_DDR_PMU_EVENT_ATTR(hp-read-credit-cnt, 0x11), - IMX8_DDR_PMU_EVENT_ATTR(write-credit-cnt, 0x12), - IMX8_DDR_PMU_EVENT_ATTR(read-command, 0x20), - IMX8_DDR_PMU_EVENT_ATTR(write-command, 0x21), - IMX8_DDR_PMU_EVENT_ATTR(read-modify-write-command, 0x22), - IMX8_DDR_PMU_EVENT_ATTR(hp-read, 0x23), - IMX8_DDR_PMU_EVENT_ATTR(hp-req-nocredit, 0x24), - IMX8_DDR_PMU_EVENT_ATTR(hp-xact-credit, 0x25), - IMX8_DDR_PMU_EVENT_ATTR(lp-req-nocredit, 0x26), - IMX8_DDR_PMU_EVENT_ATTR(lp-xact-credit, 0x27), - IMX8_DDR_PMU_EVENT_ATTR(wr-xact-credit, 0x29), - IMX8_DDR_PMU_EVENT_ATTR(read-cycles, 0x2a), - IMX8_DDR_PMU_EVENT_ATTR(write-cycles, 0x2b), - IMX8_DDR_PMU_EVENT_ATTR(read-write-transition, 0x30), - IMX8_DDR_PMU_EVENT_ATTR(precharge, 0x31), - IMX8_DDR_PMU_EVENT_ATTR(activate, 0x32), - IMX8_DDR_PMU_EVENT_ATTR(load-mode, 0x33), - IMX8_DDR_PMU_EVENT_ATTR(perf-mwr, 0x34), - IMX8_DDR_PMU_EVENT_ATTR(read, 0x35), - IMX8_DDR_PMU_EVENT_ATTR(read-activate, 0x36), - IMX8_DDR_PMU_EVENT_ATTR(refresh, 0x37), - IMX8_DDR_PMU_EVENT_ATTR(write, 0x38), - IMX8_DDR_PMU_EVENT_ATTR(raw-hazard, 0x39), - IMX8_DDR_PMU_EVENT_ATTR(axid-read, 0x41), - IMX8_DDR_PMU_EVENT_ATTR(axid-write, 0x42), + PMU_EVENT_ATTR_ID(cycles, EVENT_CYCLES_ID), + PMU_EVENT_ATTR_ID(selfresh, 0x01), + PMU_EVENT_ATTR_ID(read-accesses, 0x04), + PMU_EVENT_ATTR_ID(write-accesses, 0x05), + PMU_EVENT_ATTR_ID(read-queue-depth, 0x08), + PMU_EVENT_ATTR_ID(write-queue-depth, 0x09), + PMU_EVENT_ATTR_ID(lp-read-credit-cnt, 0x10), + PMU_EVENT_ATTR_ID(hp-read-credit-cnt, 0x11), + PMU_EVENT_ATTR_ID(write-credit-cnt, 0x12), + PMU_EVENT_ATTR_ID(read-command, 0x20), + PMU_EVENT_ATTR_ID(write-command, 0x21), + PMU_EVENT_ATTR_ID(read-modify-write-command, 0x22), + PMU_EVENT_ATTR_ID(hp-read, 0x23), + PMU_EVENT_ATTR_ID(hp-req-nocredit, 0x24), + PMU_EVENT_ATTR_ID(hp-xact-credit, 0x25), + PMU_EVENT_ATTR_ID(lp-req-nocredit, 0x26), + PMU_EVENT_ATTR_ID(lp-xact-credit, 0x27), + PMU_EVENT_ATTR_ID(wr-xact-credit, 0x29), + PMU_EVENT_ATTR_ID(read-cycles, 0x2a), + PMU_EVENT_ATTR_ID(write-cycles, 0x2b), + PMU_EVENT_ATTR_ID(read-write-transition, 0x30), + PMU_EVENT_ATTR_ID(precharge, 0x31), + PMU_EVENT_ATTR_ID(activate, 0x32), + PMU_EVENT_ATTR_ID(load-mode, 0x33), + PMU_EVENT_ATTR_ID(perf-mwr, 0x34), + PMU_EVENT_ATTR_ID(read, 0x35), + PMU_EVENT_ATTR_ID(read-activate, 0x36), + PMU_EVENT_ATTR_ID(refresh, 0x37), + PMU_EVENT_ATTR_ID(write, 0x38), + PMU_EVENT_ATTR_ID(raw-hazard, 0x39), + PMU_EVENT_ATTR_ID(axid-read, 0x41), + PMU_EVENT_ATTR_ID(axid-write, 0x42), NULL, }; -- 2.7.4 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel