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From: Hawking Zhang <Hawking.Zhang@amd.com>
To: <amd-gfx@lists.freedesktop.org>
Cc: Hawking Zhang <Hawking.Zhang@amd.com>
Subject: [PATCH 5/8] drm/amdgpu: add psp runtime db structures
Date: Fri, 11 Jun 2021 15:05:43 +0800	[thread overview]
Message-ID: <1623395146-2162-5-git-send-email-Hawking.Zhang@amd.com> (raw)
In-Reply-To: <1623395146-2162-1-git-send-email-Hawking.Zhang@amd.com>

PSP runtime database is used to share various
boot up information with driver.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: John Clements <john.clements@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h | 54 +++++++++++++++++++++++++
 1 file changed, 54 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
index 46a5328e00e0..4dad9b539f06 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
@@ -226,6 +226,60 @@ struct psp_memory_training_context {
 	u32 training_cnt;
 };
 
+/** PSP runtime DB **/
+#define PSP_RUNTIME_DB_SIZE_IN_BYTES		0x10000
+#define PSP_RUNTIME_DB_OFFSET			0x100000
+#define PSP_RUNTIME_DB_COOKIE_ID		0x0ed5
+#define PSP_RUNTIME_DB_VER_1			0x0100
+#define PSP_RUNTIME_DB_DIAG_ENTRY_MAX_COUNT	0x40
+
+enum psp_runtime_entry_type {
+	PSP_RUNTIME_ENTRY_TYPE_INVALID		= 0x0,
+	PSP_RUNTIME_ENTRY_TYPE_TEST		= 0x1,
+	PSP_RUNTIME_ENTRY_TYPE_MGPU_COMMON	= 0x2,  /* Common mGPU runtime data */
+	PSP_RUNTIME_ENTRY_TYPE_MGPU_WAFL	= 0x3,  /* WAFL runtime data */
+	PSP_RUNTIME_ENTRY_TYPE_MGPU_XGMI	= 0x4,  /* XGMI runtime data */
+	PSP_RUNTIME_ENTRY_TYPE_BOOT_CONFIG	= 0x5,  /* Boot Config runtime data */
+};
+
+/* PSP runtime DB header */
+struct psp_runtime_data_header {
+	/* determine the existence of runtime db */
+	uint16_t cookie;
+	/* version of runtime db */
+	uint16_t version;
+};
+
+/* PSP runtime DB entry */
+struct psp_runtime_entry {
+	/* type of runtime db entry */
+	uint32_t entry_type;
+	/* offset of entry in bytes */
+	uint16_t offset;
+	/* size of entry in bytes */
+	uint16_t size;
+};
+
+/* PSP runtime DB directory */
+struct psp_runtime_data_directory {
+	/* number of valid entries */
+	uint16_t			entry_count;
+	/* db entries*/
+	struct psp_runtime_entry	entry_list[PSP_RUNTIME_DB_DIAG_ENTRY_MAX_COUNT];
+};
+
+/* PSP runtime DB boot config feature bitmask */
+enum psp_runtime_boot_cfg_feature {
+	BOOT_CFG_FEATURE_GECC                       = 0x1,
+	BOOT_CFG_FEATURE_TWO_STAGE_DRAM_TRAINING    = 0x2,
+};
+
+/* PSP runtime DB boot config entry */
+struct psp_runtime_boot_cfg_entry {
+	uint32_t boot_cfg_bitmask;
+	uint32_t reserved;
+};
+
 struct psp_context
 {
 	struct amdgpu_device            *adev;
-- 
2.17.1

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  parent reply	other threads:[~2021-06-11  7:05 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-11  7:05 [PATCH 1/8] drm/amdgpu: update psp gfx i/f to support dynamic GECC Hawking Zhang
2021-06-11  7:05 ` [PATCH 2/8] drm/amdgpu: allow different boot configs Hawking Zhang
2021-06-11  7:05 ` [PATCH 3/8] drm/amdgpu: add helper function to query gecc status in boot config Hawking Zhang
2021-06-11  7:05 ` [PATCH 4/8] drm/amdgpu: enable dynamic GECC support (v2) Hawking Zhang
2021-06-11  7:05 ` Hawking Zhang [this message]
2021-06-11  7:05 ` [PATCH 6/8] drm/amdgpu: add helper function to query psp runtime db entry (v2) Hawking Zhang
2021-06-30 11:08   ` Michel Dänzer
2021-06-11  7:05 ` [PATCH 7/8] drm/amdgpu: cache psp runtime boot_cfg_bitmask in sw_int Hawking Zhang
2021-06-11  7:05 ` [PATCH 8/8] drm/amdgpu: disable DRAM memory training when GECC is enabled Hawking Zhang

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