From: Stephen Boyd <sboyd@kernel.org>
To: liambeguin@gmail.com, mturquette@baylibre.com
Cc: julia.lawall@inria.fr, linux-clk@vger.kernel.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
robh+dt@kernel.org
Subject: Re: [PATCH v5 2/3] clk: lmk04832: add support for digital delay
Date: Sun, 27 Jun 2021 18:10:58 -0700 [thread overview]
Message-ID: <162484265822.3259633.1205812088952427742@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20210423004057.283926-3-liambeguin@gmail.com>
Quoting Liam Beguin (2021-04-22 17:40:56)
> From: Liam Beguin <lvb@xiphos.com>
>
> The digital delay allows outputs to be delayed from 8 to 1023 VCO
> cycles. The delay step can be as small as half the period of the clock
> distribution path. For example, a 3.2-GHz VCO frequency results in
> 156.25-ps steps. The digital delay value takes effect on the clock
> output phase after a SYNC event.
>
> This is required to support JESD204B subclass 1.
>
> Signed-off-by: Liam Beguin <lvb@xiphos.com>
> ---
Applied to clk-next
next prev parent reply other threads:[~2021-06-28 1:11 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-23 0:40 [PATCH v5 0/3] add support for the lmk04832 Liam Beguin
2021-04-23 0:40 ` [PATCH v5 1/3] clk: " Liam Beguin
2021-06-28 1:10 ` Stephen Boyd
2021-04-23 0:40 ` [PATCH v5 2/3] clk: lmk04832: add support for digital delay Liam Beguin
2021-06-28 1:10 ` Stephen Boyd [this message]
2021-04-23 0:40 ` [PATCH v5 3/3] dt-bindings: clock: add ti,lmk04832 bindings Liam Beguin
2021-04-23 17:42 ` Rob Herring
2021-06-28 1:11 ` Stephen Boyd
2021-05-04 14:19 ` [PATCH v5 0/3] add support for the lmk04832 Liam Beguin
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