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From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Will Deacon" <will@kernel.org>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.BUILD: failure for Restricted DMA (rev5)
Date: Tue, 06 Jul 2021 18:57:14 -0000	[thread overview]
Message-ID: <162559783435.25116.12093904609929913106@emeril.freedesktop.org> (raw)
In-Reply-To: <20210624155526.2775863-1-tientzu@chromium.org>

== Series Details ==

Series: Restricted DMA (rev5)
URL   : https://patchwork.freedesktop.org/series/91883/
State : failure

== Summary ==

Applying: swiotlb: Refactor swiotlb init functions
Applying: swiotlb: Refactor swiotlb_create_debugfs
Applying: swiotlb: Set dev->dma_io_tlb_mem to the swiotlb pool used
error: sha1 information is lacking or useless (kernel/dma/swiotlb.c).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0003 swiotlb: Set dev->dma_io_tlb_mem to the swiotlb pool used
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".


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  parent reply	other threads:[~2021-07-06 18:57 UTC|newest]

Thread overview: 246+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-24 15:55 [PATCH v15 00/12] Restricted DMA Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 01/12] swiotlb: Refactor swiotlb init functions Claire Chang
2021-06-24 15:55   ` [Intel-gfx] " Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 02/12] swiotlb: Refactor swiotlb_create_debugfs Claire Chang
2021-06-24 15:55   ` [Intel-gfx] " Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 03/12] swiotlb: Set dev->dma_io_tlb_mem to the swiotlb pool used Claire Chang
2021-06-24 15:55   ` [Intel-gfx] " Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 04/12] swiotlb: Update is_swiotlb_buffer to add a struct device argument Claire Chang
2021-06-24 15:55   ` [Intel-gfx] " Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 05/12] swiotlb: Update is_swiotlb_active " Claire Chang
2021-06-24 15:55   ` [Intel-gfx] " Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 06/12] swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing Claire Chang
2021-06-24 15:55   ` [Intel-gfx] " Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-30  1:43   ` Nathan Chancellor
2021-06-30  1:43     ` [Intel-gfx] " Nathan Chancellor
2021-06-30  1:43     ` Nathan Chancellor
2021-06-30  1:43     ` Nathan Chancellor
2021-06-30  1:43     ` Nathan Chancellor
2021-06-30  9:17     ` Claire Chang
2021-06-30  9:17       ` Claire Chang
2021-06-30  9:17       ` [Intel-gfx] " Claire Chang
2021-06-30  9:17       ` Claire Chang
2021-06-30  9:17       ` Claire Chang
2021-06-30  9:17       ` Claire Chang
2021-06-30 11:43       ` Will Deacon
2021-06-30 11:43         ` [Intel-gfx] " Will Deacon
2021-06-30 11:43         ` Will Deacon
2021-06-30 11:43         ` Will Deacon
2021-06-30 11:43         ` Will Deacon
2021-06-30 15:56         ` Nathan Chancellor
2021-06-30 15:56           ` [Intel-gfx] " Nathan Chancellor
2021-06-30 15:56           ` Nathan Chancellor
2021-06-30 15:56           ` Nathan Chancellor
2021-06-30 15:56           ` Nathan Chancellor
2021-07-01  7:40           ` Will Deacon
2021-07-01  7:40             ` [Intel-gfx] " Will Deacon
2021-07-01  7:40             ` Will Deacon
2021-07-01  7:40             ` Will Deacon
2021-07-01  7:40             ` Will Deacon
2021-07-01  7:52             ` Nathan Chancellor
2021-07-01  7:52               ` [Intel-gfx] " Nathan Chancellor
2021-07-01  7:52               ` Nathan Chancellor
2021-07-01  7:52               ` Nathan Chancellor
2021-07-01  7:52               ` Nathan Chancellor
2021-07-02 13:58               ` Will Deacon
2021-07-02 13:58                 ` [Intel-gfx] " Will Deacon
2021-07-02 13:58                 ` Will Deacon
2021-07-02 13:58                 ` Will Deacon
2021-07-02 13:58                 ` Will Deacon
2021-07-02 15:13                 ` Robin Murphy
2021-07-02 15:13                   ` [Intel-gfx] " Robin Murphy
2021-07-02 15:13                   ` Robin Murphy
2021-07-02 15:13                   ` Robin Murphy
2021-07-02 15:13                   ` Robin Murphy
2021-07-03  5:55                   ` Nathan Chancellor
2021-07-03  5:55                     ` [Intel-gfx] " Nathan Chancellor
2021-07-03  5:55                     ` Nathan Chancellor
2021-07-03  5:55                     ` Nathan Chancellor
2021-07-03  5:55                     ` Nathan Chancellor
2021-07-05  7:29                     ` Claire Chang
2021-07-05  7:29                       ` Claire Chang
2021-07-05  7:29                       ` [Intel-gfx] " Claire Chang
2021-07-05  7:29                       ` Claire Chang
2021-07-05  7:29                       ` Claire Chang
2021-07-05  7:29                       ` Claire Chang
2021-07-05 18:25                       ` Nathan Chancellor
2021-07-05 18:25                         ` [Intel-gfx] " Nathan Chancellor
2021-07-05 18:25                         ` Nathan Chancellor
2021-07-05 18:25                         ` Nathan Chancellor
2021-07-05 18:25                         ` Nathan Chancellor
2021-07-05 19:03                     ` Will Deacon
2021-07-05 19:03                       ` [Intel-gfx] " Will Deacon
2021-07-05 19:03                       ` Will Deacon
2021-07-05 19:03                       ` Will Deacon
2021-07-05 19:03                       ` Will Deacon
2021-07-06  4:48                       ` Christoph Hellwig
2021-07-06  4:48                         ` [Intel-gfx] " Christoph Hellwig
2021-07-06  4:48                         ` Christoph Hellwig
2021-07-06  4:48                         ` Christoph Hellwig
2021-07-06 13:24                         ` Will Deacon
2021-07-06 13:24                           ` [Intel-gfx] " Will Deacon
2021-07-06 13:24                           ` Will Deacon
2021-07-06 13:24                           ` Will Deacon
2021-07-06 13:24                           ` Will Deacon
2021-07-06 14:01                           ` Robin Murphy
2021-07-06 14:01                             ` [Intel-gfx] " Robin Murphy
2021-07-06 14:01                             ` Robin Murphy
2021-07-06 14:01                             ` Robin Murphy
2021-07-06 14:01                             ` Robin Murphy
2021-07-06 14:05                             ` Christoph Hellwig
2021-07-06 14:05                               ` [Intel-gfx] " Christoph Hellwig
2021-07-06 14:05                               ` Christoph Hellwig
2021-07-06 14:05                               ` Christoph Hellwig
2021-07-06 14:46                               ` Konrad Rzeszutek Wilk
2021-07-06 14:46                                 ` [Intel-gfx] " Konrad Rzeszutek Wilk
2021-07-06 14:46                                 ` Konrad Rzeszutek Wilk
2021-07-06 14:46                                 ` Konrad Rzeszutek Wilk
2021-07-06 14:46                                 ` Konrad Rzeszutek Wilk
2021-07-06 16:57                                 ` Will Deacon
2021-07-06 16:57                                   ` [Intel-gfx] " Will Deacon
2021-07-06 16:57                                   ` Will Deacon
2021-07-06 16:57                                   ` Will Deacon
2021-07-06 16:57                                   ` Will Deacon
2021-07-06 16:59                                   ` Konrad Rzeszutek Wilk
2021-07-06 16:59                                     ` [Intel-gfx] " Konrad Rzeszutek Wilk
2021-07-06 16:59                                     ` Konrad Rzeszutek Wilk
2021-07-06 16:59                                     ` Konrad Rzeszutek Wilk
2021-07-06 16:59                                     ` Konrad Rzeszutek Wilk
2021-07-12 13:56                                     ` Will Deacon
2021-07-12 13:56                                       ` [Intel-gfx] " Will Deacon
2021-07-12 13:56                                       ` Will Deacon
2021-07-12 13:56                                       ` Will Deacon
2021-07-12 13:56                                       ` Will Deacon
2021-07-14  0:06                                       ` Konrad Rzeszutek Wilk
2021-07-14  0:06                                         ` [Intel-gfx] " Konrad Rzeszutek Wilk
2021-07-14  0:06                                         ` Konrad Rzeszutek Wilk
2021-07-14  0:06                                         ` Konrad Rzeszutek Wilk
2021-07-14  0:06                                         ` Konrad Rzeszutek Wilk
2021-07-06 15:39                               ` Robin Murphy
2021-07-06 15:39                                 ` [Intel-gfx] " Robin Murphy
2021-07-06 15:39                                 ` Robin Murphy
2021-07-06 15:39                                 ` Robin Murphy
2021-07-06 15:39                                 ` Robin Murphy
2021-07-06 17:06                                 ` Will Deacon
2021-07-06 17:06                                   ` [Intel-gfx] " Will Deacon
2021-07-06 17:06                                   ` Will Deacon
2021-07-06 17:06                                   ` Will Deacon
2021-07-06 17:06                                   ` Will Deacon
2021-07-06 19:14                                   ` Nathan Chancellor
2021-07-06 19:14                                     ` [Intel-gfx] " Nathan Chancellor
2021-07-06 19:14                                     ` Nathan Chancellor
2021-07-06 19:14                                     ` Nathan Chancellor
2021-07-06 19:14                                     ` Nathan Chancellor
2021-07-08 16:44                                     ` Will Deacon
2021-07-08 16:44                                       ` [Intel-gfx] " Will Deacon
2021-07-08 16:44                                       ` Will Deacon
2021-07-08 16:44                                       ` Will Deacon
2021-07-08 16:44                                       ` Will Deacon
2021-06-24 15:55 ` [PATCH v15 07/12] swiotlb: Move alloc_size to swiotlb_find_slots Claire Chang
2021-06-24 15:55   ` [Intel-gfx] " Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 08/12] swiotlb: Refactor swiotlb_tbl_unmap_single Claire Chang
2021-06-24 15:55   ` [Intel-gfx] " Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 09/12] swiotlb: Add restricted DMA alloc/free support Claire Chang
2021-06-24 15:55   ` [Intel-gfx] " Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 10/12] swiotlb: Add restricted DMA pool initialization Claire Chang
2021-06-24 15:55   ` [Intel-gfx] " Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-08-24 14:26   ` Guenter Roeck
2021-08-24 14:26     ` Guenter Roeck
2021-08-24 14:26     ` [Intel-gfx] " Guenter Roeck
2021-08-24 14:26     ` Guenter Roeck
2021-08-27  3:50     ` Claire Chang
2021-08-27  3:50       ` Claire Chang
2021-08-27  3:50       ` [Intel-gfx] " Claire Chang
2021-08-27  3:50       ` Claire Chang
2021-08-27  3:50       ` Claire Chang
2021-08-27  3:50       ` Claire Chang
2021-08-27  6:58   ` Andy Shevchenko
2021-08-27  6:58     ` Andy Shevchenko
2021-08-27  6:58     ` [Intel-gfx] " Andy Shevchenko
2021-08-27  6:58     ` Andy Shevchenko
2021-08-27  6:58     ` Andy Shevchenko
2021-06-24 15:55 ` [PATCH v15 11/12] dt-bindings: of: Add restricted DMA pool Claire Chang
2021-06-24 15:55   ` [Intel-gfx] " Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 12/12] of: Add plumbing for " Claire Chang
2021-06-24 15:55   ` [Intel-gfx] " Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-06-24 15:55   ` Claire Chang
2021-07-02  3:08   ` Guenter Roeck
2021-07-02  3:08     ` [Intel-gfx] " Guenter Roeck
2021-07-02  3:08     ` Guenter Roeck
2021-07-02  3:08     ` Guenter Roeck
2021-07-02  3:08     ` Guenter Roeck
2021-07-02 11:39     ` Robin Murphy
2021-07-02 11:39       ` [Intel-gfx] " Robin Murphy
2021-07-02 11:39       ` Robin Murphy
2021-07-02 11:39       ` Robin Murphy
2021-07-02 11:39       ` Robin Murphy
2021-07-02 13:18       ` Will Deacon
2021-07-02 13:18         ` [Intel-gfx] " Will Deacon
2021-07-02 13:18         ` Will Deacon
2021-07-02 13:18         ` Will Deacon
2021-07-02 13:18         ` Will Deacon
2021-07-02 13:48         ` Guenter Roeck
2021-07-02 13:48           ` [Intel-gfx] " Guenter Roeck
2021-07-02 13:48           ` Guenter Roeck
2021-07-02 13:48           ` Guenter Roeck
2021-07-02 13:48           ` Guenter Roeck
2021-06-24 16:42 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Restricted DMA Patchwork
2021-06-24 19:19 ` [PATCH v15 00/12] " Konrad Rzeszutek Wilk
2021-06-24 19:19   ` [Intel-gfx] " Konrad Rzeszutek Wilk
2021-06-24 19:19   ` Konrad Rzeszutek Wilk
2021-06-24 19:19   ` Konrad Rzeszutek Wilk
2021-06-24 19:19   ` Konrad Rzeszutek Wilk
2021-06-25  0:41   ` Claire Chang
2021-06-25  0:41     ` Claire Chang
2021-06-25  0:41     ` [Intel-gfx] " Claire Chang
2021-06-25  0:41     ` Claire Chang
2021-06-25  0:41     ` Claire Chang
2021-06-25  0:41     ` Claire Chang
2021-06-25 12:30   ` Will Deacon
2021-06-25 12:30     ` [Intel-gfx] " Will Deacon
2021-06-25 12:30     ` Will Deacon
2021-06-25 12:30     ` Will Deacon
2021-06-25 12:30     ` Will Deacon
2021-07-02 15:48 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Restricted DMA (rev2) Patchwork
2021-07-05  7:57 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Restricted DMA (rev3) Patchwork
2021-07-06 18:57 ` Patchwork [this message]
  -- strict thread matches above, loose matches on Subject: below --
2021-05-18  6:42 [PATCH v7 00/15] Restricted DMA Claire Chang
2021-06-01 19:42 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Restricted DMA (rev5) Patchwork

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