From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C88ADC636C8 for ; Fri, 16 Jul 2021 00:28:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A9044613DF for ; Fri, 16 Jul 2021 00:28:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229583AbhGPAbY (ORCPT ); Thu, 15 Jul 2021 20:31:24 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:17592 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231434AbhGPAbR (ORCPT ); Thu, 15 Jul 2021 20:31:17 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1626395303; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=2XDnWPtxNALFw+XFLQEUfwnpXm6xLIqUHX4HkOTE1nA=; b=ks3Nz/ryepSB3pJQQHIKoAN67gXmpIDcUCeDCsc9+aNVEvlJfqeHcJ4fIXGQUOSX+nMxb31Y 3hCShSomn9lWk8+ha2zueBCJSdF5S86k5+4qvmMMHYO1lMi8j6RDAJrndkg0xNFkVfVH5/ac MBzSWk1eLv3gwU+jn6kP+jCR8oA= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n05.prod.us-west-2.postgun.com with SMTP id 60f0d299fcf9fe7b7880c2c2 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Fri, 16 Jul 2021 00:28:09 GMT Sender: bbhatt=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 56F0FC43217; Fri, 16 Jul 2021 00:28:09 +0000 (UTC) Received: from malabar-linux.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: bbhatt) by smtp.codeaurora.org (Postfix) with ESMTPSA id 60C98C433D3; Fri, 16 Jul 2021 00:28:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 60C98C433D3 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=bbhatt@codeaurora.org From: Bhaumik Bhatt To: manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, hemantk@codeaurora.org, quic_jhugo@quicinc.com, linux-kernel@vger.kernel.org, loic.poulain@linaro.org, Bhaumik Bhatt Subject: [PATCH v1 1/2] bus: mhi: core: Read serial number during pre-powerup phase Date: Thu, 15 Jul 2021 17:27:55 -0700 Message-Id: <1626395276-24171-2-git-send-email-bbhatt@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626395276-24171-1-git-send-email-bbhatt@codeaurora.org> References: <1626395276-24171-1-git-send-email-bbhatt@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In some cases, device may boot straight to the mission mode execution environment and skip the PBL transition or firmware load procedure. Serial number and OEM PK hash values would remain unpopulated in those scenarios. Move the reads for those to the power up preparation phase such that controllers always have them populated. Signed-off-by: Bhaumik Bhatt --- drivers/bus/mhi/core/boot.c | 17 +---------------- drivers/bus/mhi/core/init.c | 17 ++++++++++++++++- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/bus/mhi/core/boot.c b/drivers/bus/mhi/core/boot.c index 8100cf5..213307ab 100644 --- a/drivers/bus/mhi/core/boot.c +++ b/drivers/bus/mhi/core/boot.c @@ -394,28 +394,13 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) void *buf; dma_addr_t dma_addr; size_t size; - int i, ret; + int ret; if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) { dev_err(dev, "Device MHI is not in valid state\n"); return; } - /* save hardware info from BHI */ - ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_SERIALNU, - &mhi_cntrl->serial_number); - if (ret) - dev_err(dev, "Could not capture serial number via BHI\n"); - - for (i = 0; i < ARRAY_SIZE(mhi_cntrl->oem_pk_hash); i++) { - ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_OEMPKHASH(i), - &mhi_cntrl->oem_pk_hash[i]); - if (ret) { - dev_err(dev, "Could not capture OEM PK HASH via BHI\n"); - break; - } - } - /* wait for ready on pass through or any other execution environment */ if (mhi_cntrl->ee != MHI_EE_EDL && mhi_cntrl->ee != MHI_EE_PBL) goto fw_load_ready_state; diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c index aeb1e3c..8b4336e 100644 --- a/drivers/bus/mhi/core/init.c +++ b/drivers/bus/mhi/core/init.c @@ -1065,7 +1065,7 @@ int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl) { struct device *dev = &mhi_cntrl->mhi_dev->dev; u32 bhi_off, bhie_off; - int ret; + int i, ret; mutex_lock(&mhi_cntrl->pm_mutex); @@ -1124,6 +1124,21 @@ int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl) mutex_unlock(&mhi_cntrl->pm_mutex); + /* save hardware info from BHI */ + ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_SERIALNU, + &mhi_cntrl->serial_number); + if (ret) + dev_err(dev, "Could not capture serial number via BHI\n"); + + for (i = 0; i < ARRAY_SIZE(mhi_cntrl->oem_pk_hash); i++) { + ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_OEMPKHASH(i), + &mhi_cntrl->oem_pk_hash[i]); + if (ret) { + dev_err(dev, "Could not capture OEM PK HASH via BHI\n"); + break; + } + } + return 0; error_reg_offset: -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project