From: Catalin Marinas <catalin.marinas@arm.com>
To: Peter Collingbourne <pcc@google.com>,
Will Deacon <will@kernel.org>,
Vincenzo Frascino <vincenzo.frascino@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
Evgenii Stepanov <eugenis@google.com>
Subject: Re: [PATCH v2] arm64: mte: avoid TFSR related operations unless in async mode
Date: Tue, 27 Jul 2021 19:06:52 +0100 [thread overview]
Message-ID: <162740920310.32489.14971613526461289684.b4-ty@arm.com> (raw)
In-Reply-To: <20210709023532.2133673-1-pcc@google.com>
On Thu, 8 Jul 2021 19:35:32 -0700, Peter Collingbourne wrote:
> There is no reason to touch TFSR nor issue a DSB unless our task is
> in asynchronous mode. Since these operations (especially the DSB)
> may be expensive on certain microarchitectures, only perform them
> if necessary.
>
> Furthermore, stop clearing TFSR on entry because it will be cleared
> on exit and it is not necessary to have any particular value in TFSR
> between entry and exit.
Applied to arm64 (for-next/mte), thanks!
[1/1] arm64: mte: avoid TFSR related operations unless in async mode
https://git.kernel.org/arm64/c/42b6b10a54f0
--
Catalin
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prev parent reply other threads:[~2021-07-27 18:17 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-09 2:35 [PATCH v2] arm64: mte: avoid TFSR related operations unless in async mode Peter Collingbourne
2021-07-27 17:19 ` Catalin Marinas
2021-07-27 18:06 ` Catalin Marinas [this message]
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